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/spi/exynos_spi.c
I tested this driver is working at the exynos5250
Tested-by: jy0922.s...@samsung.com
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int lpddr3phy_con3;
+ unsigned int pll_div2_sel;
+ unsigned char res109b[0xf5e4];
};
#endif
-
#endif
--
1.7.4.4
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)
+ MPLL_FOUT_SEL_MASK;
+ if (mpll_fout_sel == 0)
+ fout /= 2;
+ }
+
I think BPLL also needs this.
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:
- Modified Clocks as per Exynos5250 Rev 1.0.
Changes in V4:
- None
arch/arm/include/asm/arch-exynos/clock.h | 234
--
1 files changed, 126 insertions(+), 108 deletions(-)
Acked-by: Joonyoung Shim jy0922.s...@samsung.com
--
- Joonyoung Shim
| 26 --
arch/arm/include/asm/arch-exynos/clk.h | 1 +
arch/arm/include/asm/arch-exynos/clock.h | 2 ++
3 files changed, 23 insertions(+), 6 deletions(-)
Acked-by: Joonyoung Shim jy0922.s...@samsung.com
--
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];
};
#endif
+
+#define MPLL_FOUT_SEL_SHIFT 4
+#define MPLL_FOUT_SEL_MASK 0x1
#endif
--
1.7.4.4
Acked-by: Joonyoung Shim jy0922.s...@samsung.com
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Acked-by: Joonyoung Shim jy0922.s...@samsung.com
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|6 +
7 files changed, 690 insertions(+), 2 deletions(-)
--
1.7.4.4
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U
:
- Removed #define for I2C cahnnels from hearder file except for I2C0.
- Incorporated review comments from Simon Glass.
Changes in V3:
- Incorporated review comments from Joonyoung Shim.
- Reduced the number of #ifdef by modifying get_i2c_base function.
- Removed
On 07/19/2012 08:40 PM, Rajeshwari Shinde wrote:
This enables I2C support on smdk5250.
Pinmux setting moved to board file to avoid repeated setting of
gpio lines.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Rajeshwari
|
31 +
arch/arm/lib/cache-cp15.c --
Albert.
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On 01/11/2013 10:06 PM, Amarendra Reddy wrote:
Hi Simon / Jaehoon,
Thanks for review comments.
Please find the responses below.
Thanks Regards
Amarendra Reddy
On 11 January 2013 11:14, Simon Glass s...@chromium.org wrote:
Hi Jaehoon,
On Thu, Jan 10, 2013 at 8:12 PM, Jaehoon Chung
+
struct s3c24x0_i2c {
u32 iiccon;
u32 iicstat;
--
1.7.4.4
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= MAX77686_I2C_ADDR;
+ p-hw.i2c.tx_num = 1;
+ p-bus = I2C_PMIC;
If board supports I2C_MULTI_BUS, bus number of pmic can be other value,
so let's add function parameter for bus number.
Thanks.
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-- This will be used in Multi bus also which other boards can use.
But, this will cause compile errors at the s3c24xx.
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2012/6/19 Rajeshwari Birje rajeshwari.bi...@gmail.com:
Hi Joonyoung Shim,
Thank you for comments.
On Fri, Jun 15, 2012 at 12:45 PM, Joonyoung Shim dofm...@gmail.com wrote:
Hi,
2012/6/7 Rajeshwari Shinde rajeshwar...@samsung.com:
This adds multiple i2c channel support for I2C.
Signed-off
hearder file except for I2C0.
- Incorporated review comments from Simon Glass.
Changes in V3:
- Incorporated review comments from Joonyoung Shim.
- Reduced the number of #ifdef by modifying get_i2c_base function.
- Removed duplicate code.
Changes in V4
PM, Minkyu Kang proms...@gmail.com wrote:
Dear Rajeshwari Birje,
On 19 June 2012 19:57, Rajeshwari Birje rajeshwari.bi...@gmail.com wrote:
Hi Joonyoung Shim,
On Tue, Jun 19, 2012 at 1:20 PM, Joonyoung Shim dofm...@gmail.com wrote:
Hi,
I add some comments at the below.
-- ok
And current
The pheripheral port address(0x7000 - 0x7fff) exists at only
S3C64XX cpu. The pheripheral port setup codes should be executed by only
S3C64XX cpu.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
cpu/arm1176/start.S |2 ++
1 files changed, 2 insertions(+), 0 deletions
On 2/8/2010 7:55 PM, Joonyoung Shim wrote:
The pheripheral port address(0x7000 - 0x7fff) exists at only
S3C64XX cpu. The pheripheral port setup codes should be executed by only
S3C64XX cpu.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
cpu/arm1176/start.S |2 ++
1
The s3c6400.h file is only for S3C64XX cpu and the pheripheral port
address(0x7000 - 0x7fff) exists at only S3C64XX cpu, so they
should be included by only S3C64XX cpu.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
cpu/arm1176/cpu.c |2 ++
cpu/arm1176/start.S |4
This patch is for onenand support of s5p6442 SoC.
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
drivers/mtd/onenand/samsung.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git
This patch is for serial support of s5p6442 SoC.
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
common/serial.c |2 +-
drivers/serial/Makefile |1 +
drivers/serial/serial_s5p.c
This patch adds the new board SMDK6442 that uses s5p6442 SoC.
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
MAKEALL|1 +
Makefile |3
2010/3/29 Minkyu Kang proms...@gmail.com:
Dear Joonyoung Shim,
On 29 March 2010 11:56, Joonyoung Shim jy0922.s...@samsung.com wrote:
This patch adds the new board SMDK6442 that uses s5p6442 SoC.
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off
2010/3/29 Minkyu Kang proms...@gmail.com:
Dear Joonyoung Shim,
On 29 March 2010 11:56, Joonyoung Shim jy0922.s...@samsung.com wrote:
This patch is for serial support of s5p6442 SoC.
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Joonyoung
#define EXYNOS4_PRO_ID 0x1000
#define EXYNOS4_SYSREG_BASE0x1001
--
1.7.5.4
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Hi,
2012/10/12 Minkyu Kang proms...@gmail.com:
Dear Piotr and Joonyoung,
On 11 October 2012 17:14, Piotr Wilczek p.wilc...@samsung.com wrote:
Hi Joonyoung,
-Original Message-
From: Joonyoung Shim [mailto:dofm...@gmail.com]
Sent: Thursday, October 11, 2012 3:11 AM
To: Piotr
MMC of exynos5420 can select SPLL as source clock, so add to support
SPLL in exynos5420_get_mmc_clk(). It was tested on Odroid-XU3 board.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/cpu
Hi,
On 02/04/2015 03:30 PM, Akshay Saraswat wrote:
Hi,
Hi Akshay,
On 02/03/2015 05:27 PM, Akshay Saraswat wrote:
Cleaning up soc_get_periph_rate to make the logic easy to
comprehend.
Could you give more detailed description?
We did just a cleanup here by removing I2C sepecific
Hi Akshay,
On 02/03/2015 05:27 PM, Akshay Saraswat wrote:
Cleaning up soc_get_periph_rate to make the logic easy to
comprehend.
Could you give more detailed description?
Signed-off-by: Akshay Saraswat aksha...@samsung.com
---
Changes since v4:
- New patch.
/arch-exynos/clk.h | 4 +
2 files changed, 296 insertions(+), 327 deletions(-)
I have minor comments about patch 7/7. Apart from that, this patchset is
Acked-by: Joonyoung Shim jy0922.s...@samsung.com
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Hi,
On 02/02/2015 09:19 PM, Akshay Saraswat wrote:
We have assumed and kept mask bits for divider and pre-divider
as 0xf and 0xff, respectively. But these mask bits change from
one peripheral to another, and hence, need to be specified in
accordance with the peripherals.
Signed-off-by:
Hi,
On 01/14/2015 10:35 PM, Akshay Saraswat wrote:
Replacing SoC and peripheral specific function calls with generic
clock_get_periph_rate calls to get the peripheral clocks.
Signed-off-by: Akshay Saraswat aksha...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 60
Hi,
On 01/14/2015 10:35 PM, Akshay Saraswat wrote:
We planned to fetch peripheral rate through one generic API per
peripheral. These generic peripheral functions are in turn
expected to fetch apt values from a function refactored as
per SoC versions. This patch adds suuport for fetching
Hi,
On 01/14/2015 10:35 PM, Akshay Saraswat wrote:
Apparently, members of clk_bit_info array do not map correctly
to the members of enum periph_id. This mapping got broken after
we changed periph_id(s) to reflect interrupt number instead of
their position in a sequence. This patch intends to
Hi,
On 01/15/2015 10:31 PM, Akshay Saraswat wrote:
Moving exynos5420_get_pll_clk function definition up in the
code to keep it together with rest of SoC_get_pll_clk functions.
This makes code more legible and also removes the need of
declaration when called before the position of definition
Hi,
On 01/15/2015 10:31 PM, Akshay Saraswat wrote:
We planned to fetch peripheral rate through one generic API per
peripheral. These generic peripheral functions are in turn
expected to fetch apt values from a function refactored as
per SoC versions. This patch adds support for fetching
Hi,
On 01/16/2015 01:58 PM, Joonyoung Shim wrote:
Hi,
On 01/15/2015 10:31 PM, Akshay Saraswat wrote:
We planned to fetch peripheral rate through one generic API per
peripheral. These generic peripheral functions are in turn
expected to fetch apt values from a function refactored as
per
Hi,
On 01/16/2015 02:48 PM, Akshay Saraswat wrote:
We planned to fetch peripheral rate through one generic API per
peripheral. These generic peripheral functions are in turn
expected to fetch apt values from a function refactored as
per SoC versions. This patch adds support for fetching
Some exynos boards require special handling of nRESET_OUT line for eMMC
memory to perform complete reboot e.g. Odroid X2/U3/XU3 boards.
This will support eMMC reset using DT from reset_misc of samsung common
board file.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
board/samsung
from DT.
This patchset is based on http://git.denx.de/u-boot-dm.git gpio-working
branch.
Thanks.
Changes from v1:
- s/SD4_nRESET_OUT/nRESET_OUT
- Remove codes for non DT case
- Add comments about eMMC reset delay time
Joonyoung Shim (3):
samsung: board: support eMMC reset using DT
This needs for special handling of nRESET_OUT line(GPK1-2 gpio) for eMMC
memory to perform complete reboot on Odroid X2/U3 boards.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
arch/arm/dts/exynos4412-odroid.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts
This needs for special handling of nRESET_OUT line(GPD1-0 gpio) for eMMC
memory to perform complete reboot on Odroid XU3 board.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
arch/arm/dts/exynos5422-odroidxu3.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts
Exynos5420 has different registers with other exynos5 SoCs to control
usb device phy, so need separated function to enable exynos5420 usb
device phy.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
I used usbdev instead of usbdrd on function name because registers
name prefix is usbdev_
The dwc3_set_mode function is used only in
drivers/usb/host/xhci-exynos5.c so make it to static.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
drivers/usb/host/xhci-exynos5.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/host/xhci-exynos5.c b/drivers
Hi Simon,
On 01/28/2015 01:09 PM, Simon Glass wrote:
Hi,
On 15 January 2015 at 23:09, Joonyoung Shim jy0922.s...@samsung.com wrote:
Hi,
On 01/16/2015 02:48 PM, Akshay Saraswat wrote:
We planned to fetch peripheral rate through one generic API per
peripheral. These generic peripheral
Hi Suriyan,
On 01/23/2015 10:46 AM, Suriyan Ramasami wrote:
On Thu, Jan 22, 2015 at 9:51 AM, Kevin Hilman khil...@kernel.org wrote:
Suriyan Ramasami suriya...@gmail.com writes:
Hello Kevin,
On Wed, Jan 21, 2015 at 4:54 PM, Kevin Hilman khil...@kernel.org wrote:
Hi Surijan,
Suriyan
Hi Simon,
On 01/28/2015 02:01 PM, Simon Glass wrote:
Hi Joonyoung,
On 27 January 2015 at 21:46, Joonyoung Shim jy0922.s...@samsung.com wrote:
Hi Simon,
On 01/28/2015 01:09 PM, Simon Glass wrote:
Hi,
On 15 January 2015 at 23:09, Joonyoung Shim jy0922.s...@samsung.com wrote:
Hi,
On 01
Hi Simon,
On 01/28/2015 02:15 PM, Simon Glass wrote:
Hi Joonyoung,
On 27 January 2015 at 22:12, Joonyoung Shim jy0922.s...@samsung.com wrote:
Hi Simon,
On 01/28/2015 02:01 PM, Simon Glass wrote:
Hi Joonyoung,
On 27 January 2015 at 21:46, Joonyoung Shim jy0922.s...@samsung.com wrote:
Hi
G2D core should be provided 200MHz clock rate.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
board/samsung/odroid/odroid.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
index b7d2381..1554b9d
Hi Sjoerd,
On 01/09/2015 04:50 PM, Sjoerd Simons wrote:
On Fri, 2015-01-09 at 16:42 +0900, Joonyoung Shim wrote:
Hi,
On 01/09/2015 01:21 PM, Jaehoon Chung wrote:
On 01/09/2015 08:23 AM, Sjoerd Simons wrote:
On Thu, 2015-01-08 at 14:44 +0900, Joonyoung Shim wrote:
Some exynos boards require
On 01/09/2015 08:13 PM, Jaehoon Chung wrote:
On 01/09/2015 04:31 PM, Joonyoung Shim wrote:
+Cc Jaehoon,
On 01/09/2015 03:18 AM, Simon Glass wrote:
Hi Joonyoung,
On 7 January 2015 at 22:44, Joonyoung Shim jy0922.s...@samsung.com wrote:
Some exynos boards require special handling
On 01/12/2015 10:45 AM, Jaehoon Chung wrote:
On 01/11/2015 02:46 AM, Simon Glass wrote:
Hi,
On 9 January 2015 at 23:53, Joonyoung Shim jy0922.s...@samsung.com wrote:
On 01/09/2015 08:13 PM, Jaehoon Chung wrote:
On 01/09/2015 04:31 PM, Joonyoung Shim wrote:
+Cc Jaehoon,
On 01/09/2015 03
+Cc Jaehoon,
On 01/09/2015 03:18 AM, Simon Glass wrote:
Hi Joonyoung,
On 7 January 2015 at 22:44, Joonyoung Shim jy0922.s...@samsung.com wrote:
Some exynos boards require special handling of SD4_nRESET_OUT line for
eMMC memory to perform complete reboot e.g. Odroid X2/U3/XU3 boards
+Cc Jaehoon,
On 01/09/2015 03:20 AM, Simon Glass wrote:
Hi,
On 7 January 2015 at 22:44, Joonyoung Shim jy0922.s...@samsung.com wrote:
This needs for special handling of SD4_nRESET_OUT line for eMMC memory
to perform complete reboot on Odroid X2/U3 boards.
Signed-off-by: Joonyoung Shim
Hi,
On 12/02/2014 10:56 AM, Hyungwon Hwang wrote:
Dear Sjoerd,
Thanks for this work. I think it is better to squash patch #1, #3, #4
into my patchs, because these patches remove the code which needlessly
being added by my patches. I will include patch #2 also from next
version.
On Mon,
Hi,
On 01/13/2015 11:27 AM, Simon Glass wrote:
Hi,
On 12 January 2015 at 18:24, Joonyoung Shim jy0922.s...@samsung.com wrote:
Hi,
I found below compile warnings,
CC arch/arm/cpu/armv7/exynos/clock.o
arch/arm/cpu/armv7/exynos/clock.c: In function ‘clock_get_periph_rate’:
arch/arm
Hi,
On 01/13/2015 11:47 AM, Simon Glass wrote:
Hi,
On 12 January 2015 at 18:36, Joonyoung Shim jy0922.s...@samsung.com wrote:
Hi,
On 01/13/2015 11:27 AM, Simon Glass wrote:
Hi,
On 12 January 2015 at 18:24, Joonyoung Shim jy0922.s...@samsung.com wrote:
Hi,
I found below compile
Hi,
I found below compile warnings,
CC arch/arm/cpu/armv7/exynos/clock.o
arch/arm/cpu/armv7/exynos/clock.c: In function ‘clock_get_periph_rate’:
arch/arm/cpu/armv7/exynos/clock.c:265:47: warning: array subscript is above
array bounds [-Warray-bounds]
struct clk_bit_info *bit_info =
Hi Akshay,
Thanks for fast posting. I look at this patch briefly.
On 01/13/2015 09:03 PM, Akshay Saraswat wrote:
Apparently, members of clk_bit_info array do not map correctly
to the members of enum periph_id. This mapping got broken after
we changed periph_id(s) to reflect interrupt number
Hi,
On 01/13/2015 01:16 PM, Simon Glass wrote:
Hi,
On 7 January 2015 at 23:33, Jaehoon Chung jh80.ch...@samsung.com wrote:
This api is wrong array bounds.
arch/arm/cpu/armv7/exynos/clock.c: In function 'clock_get_periph_rate':
arch/arm/cpu/armv7/exynos/clock.c:265:47: warning: array
Hi Akshay,
On 01/13/2015 02:40 PM, Akshay Saraswat wrote:
Hi,
Hi,
On 01/13/2015 11:56 AM, Simon Glass wrote:
Hi,
On 12 January 2015 at 18:51, Joonyoung Shim jy0922.s...@samsung.com wrote:
Hi,
On 01/13/2015 11:47 AM, Simon Glass wrote:
Hi,
On 12 January 2015 at 18:36, Joonyoung
Hi Akshay,
On 02/04/2015 07:30 PM, Akshay Saraswat wrote:
Since we have src, div and pre-div mask bits defined corresponding
to peripherals, calculation of clock specific to I2C appears
redundant and confusing. Using clk_bit_info struct we can write
calculations generic to all peripherals
/clock.c | 617
-
arch/arm/include/asm/arch-exynos/clk.h | 4 +
2 files changed, 298 insertions(+), 323 deletions(-)
This v6 is fine to me even if there are style problems of checkpatch.pl
from 7/7 patch.
Acked-by: Joonyoung Shim jy0922.s...@samsung.com
Hi Sjoerd,
On 01/07/2015 06:25 PM, Sjoerd Simons wrote:
On Wed, 2015-01-07 at 17:31 +0900, Joonyoung Shim wrote:
Hi,
On 12/02/2014 10:56 AM, Hyungwon Hwang wrote:
Dear Sjoerd,
Thanks for this work. I think it is better to squash patch #1, #3, #4
into my patchs, because these patches
-by: Joonyoung Shim jy0922.s...@samsung.com
---
board/samsung/common/board.c | 27 ++
board/samsung/odroid/odroid.c | 2 +-
doc/device-tree-bindings/exynos/emmc-reset.txt | 15 ++
3 files changed, 43 insertions(+), 1 deletion
This needs for special handling of SD4_nRESET_OUT line for eMMC memory
to perform complete reboot on Odroid X2/U3 boards.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
arch/arm/dts/exynos4412-odroid.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/exynos4412
will get gpio
from DT.
This patchset based on http://git.denx.de/u-boot-dm.git gpio-working
branch.
Thanks.
Joonyoung Shim (3):
samsung: board: support eMMC reset using DT
Odroid: Add eMMC-reset node on DT
Odroid-XU3: Add eMMC-reset node on DT
arch/arm/dts/exynos4412-odroid.dts
This needs for special handling of SD4_nRESET_OUT line for eMMC memory
to perform complete reboot on Odroid XU3 board.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
arch/arm/dts/exynos5422-odroidxu3.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/exynos5422
makes
cros_ec
keyboard working again on Samsung Chromebook (snow).
Signed-off-by: Guillaume GARDET guillaume.gar...@free.fr
Cc: Akshay Saraswat aksha...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Joonyoung Shim jy0922.s...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 4
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