From: Sricharan R r.sricha...@ti.com
SGX clocks should be enabled only for OMAP5 ES1.0.
So this can be removed.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c |6 --
1 file changed, 6 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c
Misc cleanup.
And also adding a Generic bus init and write functions
for PMIC.
This series is applied on top of u-boot-ti:
git://git.denx.de/u-boot-ti.git
Lokesh Vutla (2):
ARM: OMAP4+: Cleanup header files
ARM: OMAP4+: pmic: Make generic bus init and write functions
Sricharan R (1):
ARM
After having the u-boot clean up series, there are
many definitions that are unused in header files.
Removing all those unused ones.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap4/prcm-regs.c |3 +++
arch/arm/cpu/armv7/omap5/prcm-regs.c |2 ++
arch/arm
Voltage scaling can be done in two ways:
- Using SR I2C
- Using GP I2C
In order to support both, have a function pointer in pmic_data
so that we can call as per our requirement.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap-common/clocks-common.c |6 ++
arch
verified.
Balaji T K (1):
mmc: omap_hsmmc: add mmc1 pbias, ldo1
Lokesh Vutla (6):
ARM: DRA7xx: Add control id code for DRA7xx
ARM: DRA7xx: power Add support for tps659038 PMIC
ARM: DRA7xx: clocks: Fixing i2c_init for PMIC
ARM: DRA7xx: Do not enable srcomp for DRA7xx Soc's
ARM: DRA7xx
In DRA7xx Soc's voltage scaling is done using GPI2C.
So i2c_init should happen before scaling. I2C driver
uses __udelay which needs timer to be initialized.
So moving timer_init just before voltage scaling.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap-common/clocks
From: Balaji T K balaj...@ti.com
add dra mmc pbias support and ldo1 power on
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/include/asm/arch-omap5/omap.h |3 ++-
drivers/mmc/omap_hsmmc.c | 26
Slew rate compensation cells are not present for DRA7xx
Soc's. So return from function srcomp_enable() if soc is not
OMAP54xx.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap5/hwinit.c |3 +++
arch/arm/include/asm/omap_common.h |8
2 files changed, 11
From: Sricharan R r.sricha...@ti.com
Serial UART is connected to UART1. So add the change
for the same.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
include/configs/dra7xx_evm.h |3 +++
include/configs/omap5_common.h |4
include/configs/omap5_uevm.h |4
3 files
TPS659038 is the power IC used in DRA7XX boards.
Adding support for this and also adding pmic data
for DRA7XX boards.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap-common/clocks-common.c | 23 ++
arch/arm/cpu/armv7/omap5/hw_data.c | 38
The registers that are used for device identification
are changed from OMAP5 to DRA7xx.
Using the correct registers for DRA7xx.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/include/asm/arch-omap5/clocks.h | 11 +++
arch/arm/include/asm/arch-omap5/omap.h |3 ---
2
From: Nishanth Menon n...@ti.com
DRA752 now uses AVS Class 0 voltages which are voltages in efuse.
This means that we can now use the optimized voltages which are
stored as mV values in efuse and program PMIC accordingly.
This allows us to go with higher OPP as needed in the system without
the
Updating pinmux data as specified in the latest DM
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Balaji T K balaj...@ti.com
---
arch/arm/include/asm/arch-omap5/mux_dra7xx.h |7 +++--
board/ti/dra7xx/mux_data.h | 38 --
2 files
From: Sricharan R r.sricha...@ti.com
The sys_clk on the dra evm board is 20MHZ.
Changing the configuration for the same.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
include/configs/dra7xx_evm.h |4
include/configs/omap5_common.h |1 -
include/configs/omap5_uevm.h |3
Update PLL values.
SYS_CLKSEL value for 20MHz is changed to 2. In other platforms
SYS_CLKSEL value 2 represents reserved. But in sys_clk array
ind 1 is used for 13Mhz. Since other platforms are not using
13Mhz, reusing index 1 for 20MHz.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off
From: Sricharan R r.sricha...@ti.com
NON SECURE SRAM is 512KB in DRA7xx devices.
So fixing it here.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/include/asm/arch-omap5/omap.h |7 ---
include/configs/dra7xx_evm.h |3 +++
include/configs/omap5_uevm.h
From: Sricharan R r.sricha...@ti.com
DRA7 EVM board has the below configuration. Adding the
settings for the same here.
2Gb_1_35V_DDR3L part * 2 on EMIF1
2Gb_1_35V_DDR3L part * 4 on EMIF2
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Hi,
On Wednesday 29 May 2013 06:42 PM, Tom Rini wrote:
On Wed, May 29, 2013 at 04:32:35PM +0530, Lokesh Vutla wrote:
This series update support for DRA7xx family Socs and the data for
DRA752 ES1.0 soc.
This is on top of my recent Misc cleanup series:
http://u-boot.10912.n7.nabble.com/PATCH-0-3
for renaming arch-omap*/clocks.h to
arch-omap*/clock.h
Lokesh Vutla (3):
ARM: OMAP4+: Cleanup header files
ARM: OMAP2+: Rename asm/arch/clocks.h asm/arch/clock.h
ARM: OMAP4+: pmic: Make generic bus init and write functions
Sricharan R (1):
ARM: OMAP5: clocks: Do not enable sgx clocks
arch/arm
After having the u-boot clean up series, there are
many definitions that are unused in header files.
Removing all those unused ones.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap4/prcm-regs.c |3 +++
arch/arm/cpu/armv7/omap5/prcm-regs.c |2 ++
arch/arm
From: Sricharan R r.sricha...@ti.com
SGX clocks should be enabled only for OMAP5 ES1.0.
So this can be removed.
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c |6 --
1 file changed, 6 deletions(-)
diff
To be consistent with other ARM platforms,
renaming asm/arch-omap*/clocks.h to asm/arch-omap*/clock.h
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap-common/clocks-common.c |2 +-
arch/arm/cpu/armv7/omap-common/emif-common.c |2 +-
arch/arm/cpu/armv7
Voltage scaling can be done in two ways:
- Using SR I2C
- Using GP I2C
In order to support both, have a function pointer in pmic_data
so that we can call as per our requirement.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap-common/clocks-common.c |6 ++
arch
The registers that are used for device identification
are changed from OMAP5 to DRA7xx.
Using the correct registers for DRA7xx.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/include/asm/arch-omap5/omap.h | 11 +--
include/configs/dra7xx_evm.h |3 ++-
2 files
From: Sricharan R r.sricha...@ti.com
Serial UART is connected to UART1. So add the change
for the same.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
include/configs/dra7xx_evm.h |3 +++
include/configs/omap5_common.h |4
include/configs/omap5_uevm.h |4
3 files
Slew rate compensation cells are not present for DRA7xx
Soc's. So return from function srcomp_enable() if soc is not
OMAP54xx.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap5/hwinit.c |3 +++
arch/arm/include/asm/omap_common.h |8
2 files changed, 11
From: Balaji T K balaj...@ti.com
add dra mmc pbias support and ldo1 power on
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/include/asm/arch-omap5/omap.h |3 ++-
drivers/mmc/omap_hsmmc.c | 26
TPS659038 is the power IC used in DRA7XX boards.
Adding support for this and also adding pmic data
for DRA7XX boards.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap-common/clocks-common.c | 23 ++
arch/arm/cpu/armv7/omap5/hw_data.c | 38
the need for implementing complex AVS logic.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap-common/clocks-common.c | 58 +++-
arch/arm/cpu/armv7/omap5/hw_data.c | 10
arch/arm/include/asm
Update PLL values.
SYS_CLKSEL value for 20MHz is changed to 2. In other platforms
SYS_CLKSEL value 2 represents reserved. But in sys_clk array
ind 1 is used for 13Mhz. Since other platforms are not using
13Mhz, reusing index 1 for 20MHz.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off
From: Sricharan R r.sricha...@ti.com
DRA7 EVM board has the below configuration. Adding the
settings for the same here.
2Gb_1_35V_DDR3L part * 2 on EMIF1
2Gb_1_35V_DDR3L part * 4 on EMIF2
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
In DRA7xx Soc's voltage scaling is done using GPI2C.
So i2c_init should happen before scaling. I2C driver
uses __udelay which needs timer to be initialized.
So moving timer_init just before voltage scaling.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap-common/clocks
From: Sricharan R r.sricha...@ti.com
NON SECURE SRAM is 512KB in DRA7xx devices.
So fixing it here.
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/include/asm/arch-omap5/omap.h | 11 ++-
1 file changed, 6 insertions(+), 5
Updating pinmux data as specified in the latest DM
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Balaji T K balaj...@ti.com
---
arch/arm/include/asm/arch-omap5/mux_dra7xx.h |7 +++--
board/ti/dra7xx/mux_data.h | 38 --
2 files
From: Sricharan R r.sricha...@ti.com
The sys_clk on the dra evm board is 20MHZ.
Changing the configuration for the same.
And also moving V_SCLK, V_OSCK defines to
arch/clock.h for OMAP4+ boards.
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
MAKEALL for armv7 and omap boards.
Changes from v1:
* Addressed comments from Tom Rini
Balaji T K (1):
mmc: omap_hsmmc: add mmc1 pbias, ldo1
Lokesh Vutla (6):
ARM: DRA7xx: Add control id code for DRA7xx
ARM: DRA7xx: power Add support for tps659038 PMIC
ARM: DRA7xx: clocks: Fixing i2c_init
Hi Lubomir,
On Thursday 30 May 2013 07:56 PM, Lubomir Popov wrote:
Hi Lokesh,
On 30/05/13 16:19, Lokesh Vutla wrote:
From: Balaji T K balaj...@ti.com
add dra mmc pbias support and ldo1 power on
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
From: Balaji T K balaj...@ti.com
add dra mmc pbias support and ldo1 power on
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
Changes since V2:
* Addressed comments from lpo...@mm-sol.com
* Rebased on top of
http://patchwork.ozlabs.org/patch
Hi Lubomir,,
On Tuesday 04 June 2013 01:28 AM, Lubomir Popov wrote:
Hi Lokesh,
Hi Lubomir,
On Thursday 30 May 2013 07:56 PM, Lubomir Popov wrote:
Hi Lokesh,
On 30/05/13 16:19, Lokesh Vutla wrote:
From: Balaji T K balaj...@ti.com
add dra mmc pbias support and ldo1 power on
Signed-off
On Wednesday 05 June 2013 02:36 AM, Tom Rini wrote:
On Mon, Jun 03, 2013 at 10:58:27PM +0300, Lubomir Popov wrote:
Hi Lokesh,
Hi Lubomir,
On Thursday 30 May 2013 07:56 PM, Lubomir Popov wrote:
Hi Lokesh,
On 30/05/13 16:19, Lokesh Vutla wrote:
From: Balaji T K balaj...@ti.com
add dra mmc
From: Balaji T K balaj...@ti.com
add dra mmc pbias support and ldo1 power on
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
Changes since V3:
* Addressed comments from Tom
arch/arm/include/asm/arch-omap5/omap.h |2 +-
drivers/mmc/omap_hsmmc.c
,
Hi Lubomir,
On Thursday 30 May 2013 07:56 PM, Lubomir Popov wrote:
Hi Lokesh,
On 30/05/13 16:19, Lokesh Vutla wrote:
From: Balaji T K balaj...@ti.com
add dra mmc pbias support and ldo1 power on
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Hi Tom,
On Thursday 30 May 2013 06:49 PM, Lokesh Vutla wrote:
This series update support for DRA7xx family Socs and the data for
DRA752 ES1.0 soc.
This is on top of my recent Misc cleanup series:
http://u-boot.10912.n7.nabble.com/PATCH-V2-0-4-ARM-OMAP2-Misc-Cleanup-tt155949.html
Do you have any
Hi,
On Thursday 06 June 2013 07:07 PM, Lubomir Popov wrote:
Hi Tom,
On 06/06/13 16:26, Tom Rini wrote:
On Thu, Jun 06, 2013 at 04:58:44PM +0530, Lokesh Vutla wrote:
Hi Tom,
On Thursday 30 May 2013 06:49 PM, Lokesh Vutla wrote:
This series update support for DRA7xx family Socs and the data
From: Balaji T K balaj...@ti.com
Update pbias programming sequence for OMAP5 ES2.0/DRA7
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
Changes since V4:
* Rebased on top of http://patchwork.ozlabs.org/patch/249430/
arch/arm/include/asm/arch-omap5
Adding Maintainer for DRA7xx.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
MAINTAINERS |4
1 file changed, 4 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index d86f0f1..2f4ea84 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -960,6 +960,10 @@ Hugo Villeneuve hugo.villene
Adding CPU detection support for the DRA752 ES1.0 soc.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: R Sricharan r.sricha...@ti.com
---
arch/arm/cpu/armv7/omap-common/hwinit-common.c |9 +++--
arch/arm/cpu/armv7/omap5/hwinit.c |3 +++
arch/arm/include/asm
DRA752 uses DDR3. Populating the corresponding structures
with DDR3 data.
Writing into MA registers if only MA is present in that soc.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: R Sricharan r.sricha...@ti.com
---
arch/arm/cpu/armv7/omap-common/emif-common.c |2 +-
arch/arm
PRCM register addresses are changed from OMAP5 ES2.0 to DRA7XX.
So adding the necessary register changes for DRA7XX socs.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: R Sricharan r.sricha...@ti.com
---
arch/arm/cpu/armv7/omap4/hw_data.c |2 +-
arch/arm/cpu/armv7/omap4
Control module register addresses are changed from OMAP5
to DRA7XX socs.
So adding the necessary changes for the same.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: R Sricharan r.sricha...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c |5 ++-
arch/arm/cpu/armv7/omap5/prcm
A new DPLL DDR is added in DRA7XX socs. Now clocks to
EMIF CD is from DPLL DDR. So DPLL DDR should be locked
before initializing RAM.
Also adding other dpll data which are different from OMAP5 ES2.0.
SYS_CLK running at 20MHz is introduced in DRA7xx socs.
Signed-off-by: Lokesh Vutla lokeshvu
@lists.denx.de/msg105592.html
This series against OMAP5 ES2.0 series is available here:
git://gitorious.org/u-boot-shared/u-boot.git omap5_es2
Tested on DRA pre silicon platform, OMAP5430 ES2.0,
OMAP4430 ES2.1, OMAP4460 panda.
MAKEALL for all armv7 board has been verified.
Lokesh Vutla (7):
arm: dra7xx
Adding new board files for DRA7XX socs.
The pad registers layout is changed completely from OMAP5
So introducing the new structure here and also adding the
minimal data.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Nishant Kamat nska...@ti.com
Signed-off-by: R Sricharan r.sricha
Adding the build support for dra7xx_evm.
Reusing omap5_evm.h config by moving it to omap5_common.h
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: R Sricharan r.sricha...@ti.com
---
boards.cfg |1 +
include/configs/dra7xx_evm.h
On Friday 15 February 2013 10:06 PM, Tom Rini wrote:
On Wed, Feb 13, 2013 at 12:59:09PM +0530, Lokesh Vutla wrote:
Adding the build support for dra7xx_evm.
Reusing omap5_evm.h config by moving it to omap5_common.h
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: R Sricharan
PRCM register addresses are changed from OMAP5 ES2.0 to DRA7XX.
So adding the necessary register changes for DRA7XX socs.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: R Sricharan r.sricha...@ti.com
---
[v2] Removed hard coded constants for PRM_DEVICE_BASE
and using
Adding the build support for dra7xx_evm.
Reusing omap5_evm.h config by moving it to omap5_common.h
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: R Sricharan r.sricha...@ti.com
---
[v2] Addressed Tom Rini's tr...@ti.com comments
boards.cfg
On Tuesday 12 March 2013 12:05 AM, Tom Rini wrote:
On Tue, Feb 12, 2013 at 09:29:08PM -, Lokesh Vutla wrote:
Adding new board files for DRA7XX socs.
The pad registers layout is changed completely from OMAP5
So introducing the new structure here and also adding the
minimal data.
Signed-off
During SDRAM_AUTO_DETECTION MA is not configured.
For Soc's OMAP4460 MA is present. So populating
MA for the same.
Tested on OMAP4430 PANDA, OMAP4460 PANDA.
Reported-by: Dan Murphy dmur...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap-common/emif-common.c
Hi Heiko,
On Thursday 20 June 2013 09:22 AM, Heiko Schocher wrote:
Hello Tom,
Am 14.06.2013 16:58, schrieb Tom Rini:
On Fri, Jun 14, 2013 at 07:59:26AM +0200, Heiko Schocher wrote:
Hello Tom,
Am 13.06.2013 17:53, schrieb Tom Rini:
On Thu, Jun 13, 2013 at 05:53:17AM +0200, Heiko Schocher
Locking sequence for all the dplls is same.
In the current code same sequence is done repeatedly
for each dpll. Instead have a generic function
for locking dplls and pass dpll data to that function.
This is derived from OMAP4 boards.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm
There are many musb prints in SPL and U-Boot log.
These prints are required only during musb debug.
So replacing printk with pr_debug in musb_core.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
drivers/usb/musb-new/musb_core.c | 18 +++---
1 file changed, 7 insertions(+), 11
boards.
This series is on top of u-boot merged with u-boot-arm.
Heiko Schocher (1):
ARM: AM33xx: Move s_init to a common place
Lokesh Vutla (3):
ARM: AM33xx: Cleanup dplls data
ARM: AM33xx: Cleanup clocks layer
musb: Disable extra prints
arch/arm/cpu/armv7/am33xx/Makefile
From: Heiko Schocher h...@denx.de
s_init has the same outline for all the AM33xx based
board. So making it generic.
This also helps in addition of new Soc with minimal changes.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Heiko Schocher h...@denx.de
Signed-off-by: Tom Rini tr
Cleaning up the clocks layer.
This helps in addition of new Soc with minimal
changes.
This is derived from OMAP4 boards.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/am33xx/board.c |6 -
arch/arm/cpu/armv7/am33xx/clock.c | 62 +-
arch/arm
Hi Heiko,
On Monday 24 June 2013 09:46 PM, Heiko Schocher wrote:
Hello Lokesh,
Am 24.06.2013 06:01, schrieb Lokesh Vutla:
Hi Heiko,
On Thursday 20 June 2013 09:22 AM, Heiko Schocher wrote:
Hello Tom,
Am 14.06.2013 16:58, schrieb Tom Rini:
On Fri, Jun 14, 2013 at 07:59:26AM +0200, Heiko
Hi Heiko,
On Tuesday 25 June 2013 12:42 AM, Heiko Schocher wrote:
Hello Lokesh,
Am 24.06.2013 15:15, schrieb Lokesh Vutla:
Locking sequence for all the dplls is same.
In the current code same sequence is done repeatedly
for each dpll. Instead have a generic function
for locking dplls and pass
Hi Heiko,
On Tuesday 25 June 2013 10:24 AM, Heiko Schocher wrote:
Hello Lokesh,
Am 25.06.2013 05:48, schrieb Lokesh Vutla:
Hi Heiko,
On Tuesday 25 June 2013 12:42 AM, Heiko Schocher wrote:
Hello Lokesh,
Am 24.06.2013 15:15, schrieb Lokesh Vutla:
Locking sequence for all the dplls is same
Hi Heiko,
On Tuesday 25 June 2013 12:35 PM, Heiko Schocher wrote:
Hello Lokesh,
Am 25.06.2013 07:39, schrieb Lokesh Vutla:
Hi Heiko,
On Tuesday 25 June 2013 10:24 AM, Heiko Schocher wrote:
Hello Lokesh,
Am 25.06.2013 05:48, schrieb Lokesh Vutla:
Hi Heiko,
On Tuesday 25 June 2013 12:42 AM
Hi Tom,
On Monday 24 June 2013 06:45 PM, Lokesh Vutla wrote:
This series tries to cleanup code for AM33xx,
inorder to ensure code reusabilty by moving the
duplicated code to common place.
This also helps in addition of new Soc with minimal
changes.
Testing:
Boot tested on BeagleBone White/Black
On Wednesday 26 June 2013 05:39 PM, Tom Rini wrote:
On Wed, Jun 26, 2013 at 09:54:00AM +0530, Lokesh Vutla wrote:
Hi Tom,
On Monday 24 June 2013 06:45 PM, Lokesh Vutla wrote:
This series tries to cleanup code for AM33xx,
inorder to ensure code reusabilty by moving the
duplicated code to common
Hi Antoine,
On Wednesday 19 June 2013 03:38 PM, TENART Antoine wrote:
Signed-off-by: Antoine Tenart aten...@adeneo-embedded.com
---
MAINTAINERS |4 +
board/ti/ti816x/Makefile | 47
board/ti/ti816x/evm.c| 249
Hi Dan,
On Tuesday 09 July 2013 02:29 AM, Dan Murphy wrote:
From: Govindraj.R govindraj.r...@ti.com
* Enable all usb ehci related clocks.
* Add ehci support to omap5 board file and arch specific
sysc reg mask values.
* Enable config options for usb support and ethernet support
Hi Dan,
On Tuesday 09 July 2013 02:29 AM, Dan Murphy wrote:
Add code to configure the USB EHCI host controller.
This enumerates an ethernet controller through USB3 using
the HSIC lines.
Signed-off-by: Dan Murphy dmur...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c | 15 +++
On Wednesday 10 July 2013 04:55 PM, Sourav Poddar wrote:
From: Matt Porter mpor...@ti.com
Add QSPI definitions and clock configuration support.
Signed-off-by: Matt Porter mpor...@ti.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c |7
On Wednesday 10 July 2013 04:55 PM, Sourav Poddar wrote:
From: Matt Porter mpor...@ti.com
Enables support for SPI SPL, QSPI and Spansion serial flash device
on the EVM. Configures pin muxes for QSPI mode.
Signed-off-by: Matt Porter mpor...@ti.com
Signed-off-by: Sourav Poddar
On Thursday 11 July 2013 01:35 AM, Dan Murphy wrote:
* Enable the OMAP5 EHCI host clocks
* Add OMAP5 EHCI register definitions
* Add OMAP5 ES2 host revision
Signed-off-by: Dan Murphy dmur...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c | 13 ++
Adding a new CONFIG_OMAP_COMMON which is included by all boards
that needs to build cpu/armv7/omap-common folder.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
Makefile|2 +-
arch/arm/config.mk |2 +-
arch/arm/cpu/armv7/omap
Add board specific information for AM43xx.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
board/ti/am43xx/Makefile | 46 ++
board/ti/am43xx/board.c | 55 ++
board/ti/am43xx/board.h | 25
Adding the following data:
- Prcm structure
- Base addresses
- Pin mux structure.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/include/asm/arch-am33xx/cpu.h | 164 +++-
arch/arm/include/asm/arch-am33xx/hardware.h|8 +-
arch/arm/include/asm
.nabble.com/PATCH-0-4-ARM-AM33xx-Cleanup-clocks-and-hwinit-tt157703.html
Testing:
Tested on pre-silicon platform
verified ./MAKEALL --cpu=armv7
./MAKEALL -s omap/am33xx
Lokesh Vutla (6):
ARM: AM43xx: Add Board files
ARM: AM43xx: Add header files
ARM: AM43xx: clocks: Add dpll and clock data
Add dpll and clock data for AM43xx
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/am33xx/Makefile |7 +-
arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 120 ++
2 files changed, 126 insertions(+), 1 deletion(-)
create mode 100644 arch/arm
Add config file
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
boards.cfg |1 +
include/configs/am43xx_evm.h | 143 ++
2 files changed, 144 insertions(+)
create mode 100644 include/configs/am43xx_evm.h
diff --git a/boards.cfg b
Add AM43xx support in the required places
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/Makefile |2 +-
arch/arm/cpu/armv7/omap-common/boot-common.c |3 ++-
drivers/serial/ns16550.c |5 +++--
3 files changed, 6 insertions
On Monday 22 July 2013 08:12 PM, Tom Rini wrote:
From: Steve Kipisz s-kipi...@ti.com
In Errata 1.0.24, if the board is running at OPP50 and has a warm reset,
the boot ROM sets the frequencies for OPP100. This patch attempts to
drop the frequencies back to OPP50 as soon as possible in the
Locking sequence for all the dplls is same.
In the current code same sequence is done repeatedly
for each dpll. Instead have a generic function
for locking dplls and pass dpll data to that function.
This is derived from OMAP4 boards.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm
Since V1:
- Rebased on top of u-boot-ti
- Created a function get_dpll_ddr_params() for getting
ddr dpll params from board files.
- Updated License header for newly created files.
Heiko Schocher (1):
ARM: AM33xx: Move s_init to a common place
Lokesh Vutla (3):
ARM: AM33xx: Cleanup dplls data
There are many musb prints in SPL and U-Boot log.
These prints are required only during musb debug.
So replacing printk with pr_debug in musb_core.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
drivers/usb/musb-new/musb_core.c | 20
1 file changed, 8 insertions(+), 12
From: Heiko Schocher h...@denx.de
s_init has the same outline for all the AM33xx based
board. So making it generic.
This also helps in addition of new Soc with minimal changes.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Heiko Schocher h...@denx.de
Signed-off-by: Tom Rini tr
Cleaning up the clocks layer.
This helps in addition of new Soc with minimal
changes.
This is derived from OMAP4 boards.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/am33xx/board.c |6 -
arch/arm/cpu/armv7/am33xx/clock.c | 62 +-
arch/arm
Add AM43xx support in the required places
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/Makefile |2 +-
arch/arm/cpu/armv7/omap-common/boot-common.c |3 ++-
drivers/serial/ns16550.c |5 +++--
3 files changed, 6 insertions
-ARM-AM33xx-Cleanup-clocks-and-hwinit-tt160272.html
Testing:
Tested on pre-silicon platform
verified ./MAKEALL --cpu=armv7
./MAKEALL -s am33xx
Changes Since V1:
- Rebased on top of u-boot-ti + V2 of AM33xx Cleanup
- Updated License header for new files.
Lokesh Vutla (6):
ARM: AM43xx: Add
Adding the following data:
- Prcm structure
- Base addresses
- Pin mux structure.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/include/asm/arch-am33xx/cpu.h | 164 +++-
arch/arm/include/asm/arch-am33xx/hardware.h|8 +-
arch/arm/include/asm
Adding a new CONFIG_OMAP_COMMON which is included by all boards
that needs to build cpu/armv7/omap-common folder.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
Makefile|2 +-
arch/arm/config.mk |2 +-
arch/arm/cpu/armv7/omap
Add dpll and clock data for AM43xx
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/am33xx/Makefile |7 +-
arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 110 ++
board/ti/am43xx/board.c |3 +-
3 files changed, 118
Add board specific information for AM43xx.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
board/ti/am43xx/Makefile | 38 +++
board/ti/am43xx/board.c | 56 ++
board/ti/am43xx/board.h | 17 ++
board/ti
Add config file
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
boards.cfg |1 +
include/configs/am43xx_evm.h | 135 ++
2 files changed, 136 insertions(+)
create mode 100644 include/configs/am43xx_evm.h
diff --git a/boards.cfg b
Hi Taras,
On Tuesday 06 August 2013 05:48 PM, Taras Kondratiuk wrote:
From: Lubomir Popov lpo...@mm-sol.com
OMAP4470 SDP SoM has EDB8164B3PF PoP memory on board.
This memory has 4Gb x 2CS = 8Gb configuration.
Add configuration for runtime calculation and precalculated cases.
Patch is
Hi,
On Tuesday 06 August 2013 09:27 PM, Taras Kondratiuk wrote:
On 08/06/2013 05:21 PM, Lokesh Vutla wrote:
Hi Taras,
On Tuesday 06 August 2013 05:48 PM, Taras Kondratiuk wrote:
From: Lubomir Popov lpo...@mm-sol.com
OMAP4470 SDP SoM has EDB8164B3PF PoP memory on board.
This memory has 4Gb x
Hi Mark,
On Friday 23 August 2013 02:58 PM, Mark Jackson wrote:
On 30/07/13 06:18, Lokesh Vutla wrote:
From: Heiko Schocher h...@denx.de
s_init has the same outline for all the AM33xx based
board. So making it generic.
This also helps in addition of new Soc with minimal changes.
Signed
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