Hi,
I want to start an U-Boot port to a custom Uniprocessor Cortex-A9 based SoC to
boot a Device Tree enabled 4.4 kernel,
but I'm struggling to find a good starting point/example code in order to do it
"the right way".
I was present at the Dublin's ELC prosentation on Driver Model, and it
Mainline 4.14-rc4 with the Video Pipeline disables,
since it currently depends on Power Domains initialization from Vendor u-boot.
Dedicated reset and init code for the Video Pipeline for mainline Linux is in
the work.
Neil Armstrong (3):
ARM: dts: Synchronize Amlogic from Linux Mainline 4.13.5
Add the Amlogic Meson GXL pinctrl support based on the GXBB driver and
the synchronized DTS from Linux 4.13.5
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
drivers/pinctrl/meson/Kconfig | 4 +
drivers/pinctrl/meson/Makefile| 1 +
drivers/pinctrl
Synchronize the Amlogic ARM64 dts from mainline Linux 4.13.5
In the preparation of the support of the Amlogic P212 board,
import the corresponding meson-gxl-s905x-p212.dts file.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/dts/Makefile | 3 +-
This adds platform code for the Amlogic P212 reference board based on a
Meson GXL (S905X) SoC with the Meson GXL configuration.
This initial submission only supports UART and MMC/SDCard, support for the
internal Ethernet PHY in Work In Progress.
Signed-off-by: Neil Armstrong <narm
On Amlogic Meson GXL/GXM, supplementary ethernet configuration registers
were added to configure the internal RMII PHY interface.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/include/asm/arch-meson/gxbb.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/ar
This patch adds support for the Internal RMII Ethernet PHY on the
Amlogic P212 Reference Board.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
board/amlogic/p212/p212.c | 39 ++-
configs/p212_defconfig| 4
include/configs/p212.h
The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.
The PHY acts as a generic PHY but needs a slight configuration right
before it's configuration.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
drivers/net/phy/Kconfig | 3 +++
drivers/net/phy/Ma
This patchset aims to add support for the Internal RMII Ethernet PHY of the
Amlogic Meson GXL S905X SoC on the Amlogic P212 Reference board.
The Internal PHY needs a specific config then acts as a generic PHY.
Neil Armstrong (3):
net: phy: Add Amlogic Meson GXL Internal PHY support
arm
://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/include/asm/arch-meson/gxbb.h | 15 ++
arch/arm/mach-meson/board.c| 99 +++---
include/configs/meson-gxbb-co
Hi Łukasz,
On 23/11/2017 20:55, Lukasz Majewski wrote:
> Hi Neil,
>
>> Hi,
>>
>> I'm having a strange issue while porting the DART-MX6 and it's
>> carrier board to mainline U-Boot.
>>
>> Everything works as expected except "fatls" where I get the following
>> output :
>
> Please look into:
>
oC cache line.
Fixes: 09fa964bba80 ("fs/fat: Fix 'CACHE: Misaligned operation at range'
warnings")
Suggested-by: Lukasz Majewski <lu...@denx.de>
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
fs/fat/fat.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
Hi Simon,
On 21/11/2017 05:08, Simon Glass wrote:
> Hi Neil,
>
> On 20 November 2017 at 08:04, Neil Armstrong <narmstr...@baylibre.com> wrote:
>> This adds platform code for the Libre Computer CC "Le Potato" board based on
>> a
>> Meson GXL (
size from registers
- USB DWC3 Host Support with PHY support
Changes since v1:
- Add common ethernet init function
- Switch P212 and Odroid-C2 to use this ethernet init function
- Fix typos in READMEs
- Drop #define CONFIG_CONS_INDEX
Neil Armstrong (5):
ARM: arch-meson: add ethernet common init
On 21/11/2017 05:09, Simon Glass wrote:
> Hi Neil,
>
> On 20 November 2017 at 08:04, Neil Armstrong <narmstr...@baylibre.com> wrote:
>> This adds platform code for the Khadas VIM board based on a
>> Meson GXL (S905X) SoC with the Meson GXL configuration.
>>
&g
Switch Odroid-C2 Ethernet init to the common Ethernet init function.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
board/amlogic/odroid-c2/odroid-c2.c | 11 ++-
1 file changed, 2 insertions(+), 9 deletions(-)
diff --git a/board/amlogic/odroid-c2/odroid-c2.c
b
as of 4.13.8.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/meson-gxl-s905x-khadas-vim.dts | 137
arch/arm/mach-meson/Kconfig | 9 ++
board/amlogic/khadas-vim/K
Switch P212 Ethernet init to the common Ethernet init function.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
board/amlogic/p212/p212.c | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/board/amlogic/p212/p212.c b/board/amlogic/p212/p212.c
the linux 4.13
stable tree as of 4.13.8.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 171 ++
arch/arm/mach-meson/Kconfig | 9 +
Introduce a generic common Ethernet Hardware init function
common to all Amlogic GX SoCs with support for the
Internal PHY enable for GXL SoCs.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/include/asm/arch-meson/eth.h | 15 ++
arch/arm/mach-meson/Ma
ng data cache ?
Thanks,
Neil
--
Neil Armstrong
Embedded Linux Software Engineer
BayLibre - At the Heart of Embedded Linux
www.baylibre.com
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On 26/11/2017 12:39, Simon Glass wrote:
> Hi Neil,
>
> On 25 November 2017 at 02:45, Neil Armstrong <narmstr...@baylibre.com> wrote:
>> Hi Simon,
>>
>> Le 24/11/2017 23:35, Simon Glass a écrit :
>>> Hi Neil,
>>>
>>> On 22 November 2017 a
as of 4.13.8.
Reviewed-by: Simon Glass <s...@chromium.org>
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/meson-gxl-s905x-khadas-vim.dts | 137
arch/arm/mach-meson/Kconfig
Switch P212 Ethernet init to the common Ethernet init function.
Reviewed-by: Simon Glass <s...@chromium.org>
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
board/amlogic/p212/p212.c | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/b
-boot" README typos
- Added Simon's tags
Changes since v1:
- Add common ethernet init function
- Switch P212 and Odroid-C2 to use this ethernet init function
- Fix typos in READMEs
- Drop #define CONFIG_CONS_INDEX
Neil Armstrong (5):
ARM: arch-meson: add ethernet common init function
board:
Switch Odroid-C2 Ethernet init to the common Ethernet init function.
Reviewed-by: Simon Glass <s...@chromium.org>
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
board/amlogic/odroid-c2/odroid-c2.c | 11 ++-
1 file changed, 2 insertions(+), 9 deletions(-)
diff -
Introduce a generic common Ethernet Hardware init function
common to all Amlogic GX SoCs with support for the
Internal PHY enable for GXL SoCs.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/include/asm/arch-meson/eth.h | 23 +++
arch/arm/mach-meson/Ma
the linux 4.13
stable tree as of 4.13.8.
Reviewed-by: Simon Glass <s...@chromium.org>
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 171 ++
arch/
mem table and efi reserve memory
- replaced in_le32 by readl()
Reviewed-by: Simon Glass <s...@chromium.org>
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/include/asm/arch-meson/gxbb.h| 17 +++
arch/arm/include/asm/arch-meson/mem.h | 16 +++
arch/
Hi Simon,
Le 24/11/2017 23:35, Simon Glass a écrit :
> Hi Neil,
>
> On 20 November 2017 at 08:36, Neil Armstrong <narmstr...@baylibre.com> wrote:
>> As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware
>> and a secondary BL32 firmware.
>> Si
Hi Tom, Simon,
Le 22/11/2017 14:25, Neil Armstrong a écrit :
> This patchset aimed to add minimal support for the following Amlogic GXL SoC
> based board:
> - LibreTech-CC
> - Khadas VIM
>
> The initial support is composed of :
> - Minimal boot support with serial, MMC
Hi Simon,
Le 24/11/2017 23:35, Simon Glass a écrit :
> Hi Neil,
>
> On 22 November 2017 at 06:25, Neil Armstrong <narmstr...@baylibre.com> wrote:
>> Introduce a generic common Ethernet Hardware init function
>> common to all Amlogic GX SoCs with support for the
>
Le 24/11/2017 23:35, Simon Glass a écrit :
> Hi Neil,
>
> On 22 November 2017 at 06:25, Neil Armstrong <narmstr...@baylibre.com> wrote:
>> This adds platform code for the Libre Computer CC "Le Potato" board based on
>> a
>> Meson GXL (
On 12/12/2017 16:03, Neil Armstrong wrote:
> From: Jerome Brunet <jbru...@baylibre.com>
>
> This patch is ported from the Linux patch posted at [1] and applied to
> net tree as commit f1e2400a80ff.
>
> The purpose of this change is to fix the incorrect detection o
On 12/12/2017 14:23, Neil Armstrong wrote:
> From: Hans Verkuil <hans.verk...@cisco.com>
>
> Using writel causes a "Synchronous Abort". Invert the arguments.
>
> Signed-off-by: Hans Verkuil <hans.verk...@cisco.com>
> Signed-off-by: Neil Armstrong <narm
-C2 static memory mapping as exception
Changes since RFC v1:
- switch to fdt rsv mem table and efi reserve memory
- replaced in_le32 by readl()
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/include/asm/arch-meson/gxbb.h| 17 +++
arch/arm/mach-meson/board.c
the linux 4.13
stable tree as of 4.13.8.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/meson-gxl-s905x-libretech-cc.dts | 171 ++
arch/arm/mach-meson/Kconfig | 9 +
in the board README.
The following work will be pushed later on :
- Support for dynamic reading of DDR memory size from registers
- USB DWC3 Host Support with PHY support
Neil Armstrong (2):
arm: Add LibreTech CC support based on Meson GXL family
arm: Add Khadas VIM support based on Meson GXL
as of 4.13.8.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/meson-gxl-s905x-khadas-vim.dts | 137
arch/arm/mach-meson/Kconfig | 9 ++
board/amlogic/khadas-vim/K
On 19/10/2017 20:38, Ben Dooks wrote:
> On 2017-10-19 14:22, Neil Armstrong wrote:
>> As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware
>> and a secondary BL32 firmware.
>> Since mid-2017, the reserved memory address of the BL31 firmware was moved
>
uot;meson-clk: probed at addr %p\n", priv->addr);
> +
> + return 0;
> +}
> +
> +static struct clk_ops meson_clk_ops = {
> + .disable= meson_clk_disable,
> + .enable = meson_clk_enable,
> + .get_rate = meson_clk_get_rate,
> +};
> +
> +static const struct udevice_id meson_clk_ids[] = {
> + { .compatible = "amlogic,gxbb-clkc" },
> + { .compatible = "amlogic,gxl-clkc" },
> + { }
> +};
> +
> +U_BOOT_DRIVER(meson_clk) = {
> + .name = "meson_clk",
> + .id = UCLASS_CLK,
> + .of_match = meson_clk_ids,
> + .priv_auto_alloc_size = sizeof(struct meson_clk),
> + .ops= _clk_ops,
> + .probe = meson_clk_probe,
> +};
>
Ok for now to only handle the gates with the clock measure function.
Reviewed-by: Neil Armstrong <narmstr...@baylibre.com>
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9
> +#define CLKID_SD_EMMC_B_CLK0 122
> +#define CLKID_SD_EMMC_C_CLK0 125
> +#define CLKID_VPU_0_SEL 126
> +#define CLKID_VPU_0 128
> +#define CLKID_VPU_1_SEL 129
> +#define CLKID_VPU_1 131
> +#define CLKID_VPU132
return -ETIMEDOUT;
> + }
> + }
> +
> + /* Disable measuring */
> + clrbits_le32(MSR_CLK_REG0, BIT(16));
> +
> + mhz = ((readl(MSR_CLK_REG2) + 31) & 0xf) >> 6;
> + return mhz * 100;
> +}
>
I'm skeptical about this, but it simplifies a lot the clock driver !
Anyway, it can be changed later if we want to control the PLLs and so on.
Reviewed-by: Neil Armstrong <narmstr...@baylibre.com>
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On 03/12/2017 10:17, Beniamino Galvani wrote:
> Use the clk framework to initialize clocks from drivers that need them
> instead of having hardcoded frequencies and initializations from board
> code.
>
> Signed-off-by: Beniamino Galvani
> ---
>
bre.com>
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
This patch has been tested on LibreTech-CC and adapted to U-Boot PHY calls.
Comments from Jerome from the original patch :
""
I suppose this patch probably seems a bit hacky, especially the part
about the link par
From: Hans Verkuil <hans.verk...@cisco.com>
Using writel causes a "Synchronous Abort". Invert the arguments.
Signed-off-by: Hans Verkuil <hans.verk...@cisco.com>
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/mach-meson/eth.c | 4 ++--
1 file
Le 29/10/2017 10:09, Beniamino Galvani a écrit :
> Signed-off-by: Beniamino Galvani
> ---
> arch/arm/include/asm/arch-meson/gxbb.h | 1 +
> board/amlogic/odroid-c2/odroid-c2.c| 1 +
> configs/odroid-c2_defconfig| 3 +++
> 3 files changed, 5 insertions(+)
>
Le 29/10/2017 13:04, Tom Rini a écrit :
> On Thu, Oct 26, 2017 at 03:39:17PM +0200, Neil Armstrong wrote:
>> On 22/10/2017 16:36, Simon Glass wrote:
>>> On 18 October 2017 at 10:02, Neil Armstrong <narmstr...@baylibre.com> wrote:
>>>> The Amlogic Meson GXL/
DIV_ROUND_UP(clk_rate, speed * 4);
> +
> + /* clock divider has 12 bits */
> + if (div >= (1 << 12)) {
> + debug("meson i2c: requested bus frequency too low\n");
> + div = (1 << 12) - 1;
> + }
> +
> + cl
Add the regmap_update_bits() to simply the read/modify/write of registers
in a single command. The function is taken from Linux regmap
implementation.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
drivers/core/regmap.c | 14 ++
include/regmap.h | 10 +++
from include to regmap.c
- added a sandbox test
Neil Armstrong (2):
regmap: add regmap_update_bits() helper
test: regmap: add read/modify/write test
drivers/core/regmap.c | 14 ++
include/regmap.h | 10 ++
test/dm/regmap.c | 24
3 files
Add calls to regmap_read/modify_bits/write even if the proper memory
read/write calls are not executed in sandbox.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
test/dm/regmap.c | 24
1 file changed, 24 insertions(+)
diff --git a/test/dm/regmap.c b/t
Hi,
On 26/04/2018 16:40, Simon Glass wrote:
> Hi Neil,
>
> On 23 April 2018 at 08:18, Neil Armstrong <narmstr...@baylibre.com> wrote:
>> Add an 'adc' cli command to get adc devices informations and read single
>> shots datas.
>>
>> Signed-off-by:
Hi Mario,
On 27/04/2018 14:51, Mario Six wrote:
> The regmap functions currently assume that all register map accesses
> have a data width of 32 bits, but there are maps that have different
> widths.
>
> Implement a size parameter for the regmap_read and regmap_write
> functions to specify the
Add an 'adc' cli command to get adc devices informations and read single
shots datas.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
cmd/Kconfig | 8
cmd/Makefile | 1 +
cmd/adc.c| 121 +++
3 files change
Hi,
On 27/04/2018 14:53, Mario Six wrote:
> Some reset lines are implemented by toggling the line via a GPIO.
>
> Add a driver to properly drive such reset lines.
You are defining a "gpio-reset" binding which has always been rejected
under Linux, so I'm not sure it's a good idea to add it in
Add USB as boot target depending on the configuration.
Signed-off-by: Neil Armstrong
---
include/configs/meson-gx-common.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/configs/meson-gx-common.h
b/include/configs/meson-gx-common.h
index 6e61b70..7435f34 100644
From: Beniamino Galvani
Introduce a basic clock driver for Amlogic Meson SoCs which supports
enabling/disabling clock gates and getting their frequency.
Signed-off-by: Beniamino Galvani
Signed-off-by: Neil Armstrong
---
arch/arm/include/asm/arch-meson/clock.h | 117 ++
arch/arm/mach
Enable USB on all Amlogic Meson GXL based board.
Enable Regulator support on all boards.
Enable ADC support on the LibreTech-CC board.
Signed-off-by: Neil Armstrong
---
configs/khadas-vim_defconfig | 14 ++
configs/libretech-cc_defconfig | 17 +
configs/odroid
From: Beniamino Galvani
Use the clk framework to initialize clocks from drivers that need them
instead of having hardcoded frequencies and initializations from board
code.
Signed-off-by: Beniamino Galvani
Signed-off-by: Neil Armstrong
---
arch/arm/include/asm/arch-meson/gx.h | 10
The SARADC driver was merged after the following commit :
commit d35812368a59 ("regmap: change regmap_init_mem() to take ofnode instead
udevice")
Thus breaking build, this patch fixes the regmap_init_mem accordingly.
Signed-off-by: Neil Armstrong
---
drivers/adc/meson-saradc.c | 2
i (2):
clk: add Amlogic meson clock driver
meson: use the clock driver
Neil Armstrong (3):
adc: meson-saradc: fix regmap_init_mem call
config: meson-gx-common: Enable USB boot
configs: Update Meson GX configs
arch/arm/include/asm/arch-meson/clock.h | 117 +
arch/arm/include/asm/
Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.17.0
This will enable USB on Amlogic Meson GXL Boards like Khadas VIM, P212 or
LibreTech-CC.
Signed-off-by: Neil Armstrong
---
arch/arm/dts/meson-gx.dtsi| 40 +--
arch/arm/dts/meson-gxbb
-by: Thomas McKahan
Signed-off-by: Neil Armstrong
---
arch/arm/dts/Makefile | 1 +
arch/arm/mach-meson/Kconfig | 8 +++
board/amlogic/nanopi-k2/Kconfig | 12 +
board/amlogic/nanopi-k2/MAINTAINERS | 6 +++
board/amlogic/nanopi-k2/Makefile| 7 +++
board/amlogic/nanopi-k2
Get the meson-gxbb-nanopi-k2.dts file from Linux 4.17.
Signed-off-by: Neil Armstrong
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/meson-gxbb-nanopi-k2.dts | 323 ++
2 files changed, 324 insertions(+)
create mode 100644 arch/arm/dts/meson-gxbb
necessary.
Neil Armstrong (1):
ARM: dts: sync meson-gxbb-nanopi-k2 from Linux 4.17
Thomas McKahan (1):
boards: amlogic: Add FriendlyElec NanoPi K2 board support
arch/arm/dts/Makefile | 2 +
arch/arm/dts/meson-gxbb-nanopi-k2.dts | 323 ++
arch/arm
Fix typos and update the supported devices for all Amlogic boards.
Signed-off-by: Neil Armstrong
---
arch/arm/mach-meson/Kconfig | 2 +-
board/amlogic/khadas-vim/README | 8 +++-
board/amlogic/libretech-cc/README | 12 +---
board/amlogic/odroid-c2/README| 5
Hi,
On 26/04/2018 16:40, Simon Glass wrote:
> Hi Neil,
>
> On 23 April 2018 at 08:16, Neil Armstrong <narmstr...@baylibre.com> wrote:
>> Add the regmap_update_bits() to simply the read/modify/write of registers
>> in a single command. The function is taken from Lin
On 19/10/2017 12:45, Ben Dooks wrote:
> On 2017-10-19 10:04, Neil Armstrong wrote:
>> As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware
>> and a secondary BL32 firmware.
>> Since mid-2017, the reserved memory address of the BL31 firmware was moved
>
] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html
Changes since v1:
- switch to fdt rsv mem table and efi reserve memory
- replaced in_le32 by readl()
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/include/asm/arch-meson/gxbb.h | 17 +
ar
On 22/10/2017 16:36, Simon Glass wrote:
> On 18 October 2017 at 10:02, Neil Armstrong <narmstr...@baylibre.com> wrote:
>> The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.
>>
>> The PHY acts as a generic PHY but needs a slight configuration right
&
Khadas VIM is an Open Source DIY Box manufactured by Shenzhen Wesion NOT
'Tomato'
The fix was provided by Khadas Team member 'numbqq'.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
board/amlogic/khadas-vim/README | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Processing Unit Power Domain clock setup.
Signed-off-by: Neil Armstrong
---
drivers/clk/clk_meson.c | 533 +++-
1 file changed, 528 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/clk_meson.c b/drivers/clk/clk_meson.c
index 3850128..be1cc66
the setup
of the VPU and VAPB clocks configured from DT using assigned-clocks entries.
Neil Armstrong (2):
power: domain: Add the VPU Power Domain driver
clk: clk_meson: Add mux and div support for reparent and rate setting
drivers/clk/clk_meson.c | 533
te setting if "0" is passed as clock rate.
[1]
https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/clock/clock-bindings.txt#L135
Fixes: f4fcba5c5baa "clk: implement clk_set_defaults()"
Signed-off-by: Neil Armstrong
---
drivers/clk/clk-uclass.c |
the setup
of the VPU and VAPB clocks configured from DT using assigned-clocks entries.
Signed-off-by: Neil Armstrong
---
drivers/power/domain/Kconfig | 7 ++
drivers/power/domain/Makefile| 1 +
drivers/power/domain/meson-gx-pwrc-vpu.c | 198 +++
3
Hi Tom,
On 05/08/2018 01:39, Tom Rini wrote:
> On Thu, Jul 26, 2018 at 03:54:04PM +0200, Neil Armstrong wrote:
>
>> This patch adds support for :
>> - Rate calculation through muxes and generic dividers
>> - Basic gate setting propagation
>> - Reparenting for
On 02/08/2018 22:36, Simon Glass wrote:
> Hi Neil,
>
> On 26 July 2018 at 07:54, Neil Armstrong wrote:
>> The Amlogic Meson SoCs embeds a specific Power Domain dedicated to the
>> Video Processing Unit.
>> This patch implements support for this power domain in p
Processing Unit Power Domain clock setup.
Reviewed-by: Simon Glass
Signed-off-by: Neil Armstrong
---
drivers/clk/clk_meson.c | 533 +++-
1 file changed, 528 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/clk_meson.c b/drivers/clk/clk_meson.c
the setup
of the VPU and VAPB clocks configured from DT using assigned-clocks entries.
Reviewed-by: Simon Glass
Signed-off-by: Neil Armstrong
---
drivers/power/domain/Kconfig | 7 ++
drivers/power/domain/Makefile| 1 +
drivers/power/domain/meson-gx-pwrc-vpu.c | 198
the setup
of the VPU and VAPB clocks configured from DT using assigned-clocks entries.
Changes since v1:
- Fixed "format '%d' expects argument of type 'int', but argument 4 has type
'long unsigned int'" in clk_meson.c
Neil Armstrong (2):
power: domain: Add the VPU Power Domain driver
clk:
/* Reset PHY on GPIOZ_14 */
> - clrbits_le32(GX_GPIO_EN(3), BIT(14));
> - clrbits_le32(GX_GPIO_OUT(3), BIT(14));
> - mdelay(10);
> - setbits_le32(GX_GPIO_OUT(3), BIT(14));
> -
> if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
>
On 16/08/2018 10:15, Beniamino Galvani wrote:
> On Mon, Aug 06, 2018 at 02:49:19PM +0200, Neil Armstrong wrote:
>> The Amlogic Meson SoCs embeds a specific Power Domain dedicated to the
>> Video Processing Unit.
>> This patch implements support for this power domain in prepara
Hi Beniamino,
On 14/08/2018 15:07, Beniamino Galvani wrote:
> Clean up board files by moving the duplicate environment
> initialization to arch code.
>
> Signed-off-by: Beniamino Galvani
> ---
> arch/arm/include/asm/arch-meson/sm.h | 1 +
> arch/arm/mach-meson/sm.c | 27
Hi Tom,
On 20/07/2018 14:35, Tom Rini wrote:
> On Mon, Jun 25, 2018 at 04:50:17PM +0200, Neil Armstrong wrote:
>
>> From: Thomas McKahan
>>
>> This adds platform code for the FriendlyElec NanoPi K2 board based on a
>> Meson GXBB (S905) SoC with the Meson GXBB con
Hi Loic,
On 10/07/2018 15:15, Loic Devulder wrote:
> Fix documentation to be able to cross-compile U-Boot on Khadas VIM board.
>
> Signed-off-by: Loic Devulder
> ---
> board/amlogic/khadas-vim/README | 32 +---
> 1 file changed, 25 insertions(+), 7 deletions(-)
>
>
eson-gxl-s905x-p212.dtsi
> +++ b/arch/arm/dts/meson-gxl-s905x-p212.dtsi
> @@ -189,3 +189,10 @@
> {
> status = "okay";
> };
> +
> +_phy0 {
> +/*
> + * HDMI_5V is also used as supply for the USB VBUS
gt; Igor Opaniuk 8197 (6.9%)
> Tom Rini 5556 (4.7%)
> Miquel Raynal 3987 (3.4%)
> Jagan Teki 3308 (2.8%)
> Alex Kiernan 2702 (2.3%)
> Alexander Graf2190 (1.9%)
> Neil Armstrong1978 (1.7%)
> + > python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
>
> > $FIPDIR/blx_fix.sh \
> fip/bl2_acs.bin \
>
Acked-by: Neil Armstrong
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Hi Loic,
On 09/07/2018 17:34, Loic Devulder wrote:
> Enable power supply for USB Amlogic Meson GXL P212 based boards.
>
> Signed-off-by: Loic Devulder
We like to keep the u-boot and linux DTS synced, this changed was backported on
Linux v4.17.5,
can you instead precise you backported the last
set
> +CONFIG_CMD_ADC=y
> CONFIG_CMD_GPIO=y
> # CONFIG_CMD_LOADS is not set
> CONFIG_CMD_MMC=y
> CONFIG_CMD_USB=y
> # CONFIG_CMD_SETEXPR is not set
> CONFIG_CMD_REGULATOR=y
> +CONFIG_ADC=y
> +CONFIG_SARADC_MESON=y
> CONFIG_OF_CONTROL=y
>
of resets
of the sandbox reset controller has been bumped to 101 for the "other" reset
line to be valid.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/sandbox/include/asm/reset.h | 4
drivers/reset/sandbox-reset-test.c | 29 +
dri
merged.
The second patch adds the bulk reset API tests for the sandbox test suite.
Changes since v1 :
- Add sandbox tests
Neil Armstrong (2):
reset: Add get/assert/deassert/release for bulk of reset signals
reset: add sandbox test for bulk API
arch/sandbox/include/asm/reset.h | 4 ++
This patch adds a "bulk" API to the reset API in order to get/deassert/
assert/release a group of reset signals associated with a device.
This bulk API will avoid adding a copy of the same code to manage
a group of reset signals in drivers.
Signed-off-by: Neil Armstrong <narmstr...
cond patch adds the bulk clock API tests for the sandbox test suite.
Changes since v1 :
- Add sandbox tests
Neil Armstrong (2):
clk: Add get/enable/disable/release for a bulk of clocks
clk: add sandbox test for bulk API
arch/sandbox/include/asm/clk.h | 32 +++
drive
This patch adds the bulk clock API tests for the sandbox test suite.
It's very similar to the main test but only uses the _bulk() API and
checks if the clocks are correctly enabled/disabled.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/sandbox/include/asm/clk.
This patch adds a "bulk" API to the clock API in order to get/enable/disable
/release a group of clocks associated with a device.
This bulk API will avoid adding a copy of the same code to manage
a group of clocks in drivers.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com&
On 08/04/2018 15:50, Simon Glass wrote:
> Hi,
>
> On 28 March 2018 at 05:54, Neil Armstrong <narmstr...@baylibre.com> wrote:
>> The Amlogic SoCs have a registers containing the die revision
>> and packaging type to determine the SoC family and package marketing
>>
Hi Marek,
On 11/04/2018 16:37, Marek Vasut wrote:
> On 04/11/2018 04:29 PM, Neil Armstrong wrote:
>> This is a port of the dwc3-of-simple driver from Linux to enable/deassert
>> clock and resets of a simple DWC3 Controller HW glue.
>>
>> Signed-off-by: Neil Armstro
Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.16.0.
Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>
---
arch/arm/dts/meson-gx.dtsi| 87 ++-
arch/arm/dts/meson-gxbb-odroidc2.dts | 56 --
arch/arm/dts
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