Enable pcf driver to control the pcf chip present
at address 0x21 on i2c1.
Signed-off-by: Vignesh R vigne...@ti.com
---
include/configs/dra7xx_evm.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index dee2b11056e7
on pcf857x driver available in Linux 4.0 kernel.
It supports basic reading and writing of gpio pins.
Signed-off-by: Vignesh R vigne...@ti.com
---
drivers/gpio/Makefile | 1 +
drivers/gpio/pcf8575.c | 248 +
include/pcf8575.h | 25 +
3
On DRA72 EVM cpsw slave1 is muxed with VIN, therefore switch cpsw to use
slave0 using pcf driver.
DRA72 has only one cpsw phy(phy#3). Hence, set phy_id to 3 for slave0,
in case of DRA72 EVM.
Signed-off-by: Vignesh R vigne...@ti.com
---
board/ti/dra7xx/evm.c | 13 +++--
1 file changed, 11
.
Vignesh R (3):
gpio: pcf8575: Add pcf8575 driver to control gpio lines
ARM: dra7xx_evm: Enable pcf driver
ARM: DRA7-EVM: switch cpsw to use slave0
board/ti/dra7xx/evm.c| 13 ++-
drivers/gpio/Makefile| 1 +
drivers/gpio/pcf8575.c | 248
On Tuesday 10 March 2015 09:33 PM, Tom Rini wrote:
On Tue, Mar 10, 2015 at 08:41:21PM +0530, Vignesh R wrote:
TI's pcf8575 is a 16-bit I2C based GPIO expander.The device features a
16-bit quasi-bidirectional I/O ports. Each quasi-bidirectional I/O can
be used as an input or output without
Enable CONFIG_TI_EDMA3 for am43xx, this increases read performance by 1.5x.
Also add EDMA3 base address for am43xx.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 3 +++
include/configs/am43xx_evm.h | 2 ++
2 files changed
From: Kishon Vijay Abraham I kis...@ti.com
Add do_disable_clocks() to disable clock domains and module clocks.
These clocks are enabled using do_enable_clocks().
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/cpu/armv7/am33xx/clock.c
Adds functions to enable and disable edma3 clocks which can be invoked
by drivers using edma3 to control the clocks.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c | 41
arch/arm/cpu/armv7/omap5/prcm-regs.c | 4
arch
From: Tom Rini tr...@ti.com
When doing a memory mapped copy we may have DMA available and thus need
to have this copy abstracted so that the driver can do it, rather than a
simple memcpy.
Signed-off-by: Vignesh R vigne...@ti.com
---
drivers/mtd/spi/sf_ops.c | 8 +++-
include/spi.h
From: Kishon Vijay Abraham I kis...@ti.com
Add do_disable_clocks() to disable clock domains and module clocks.
These clocks are enabled using do_enable_clocks().
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/cpu/armv7/omap-common
Adds functions to enable and disable edma3 clocks which can be invoked
by drivers using edma3 to control the clocks.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 36
1 file changed, 36 insertions(+)
diff --git a/arch
ti_qspi uses memory map mode for faster read. Enabling DMA will increase
read speed by 3x @48MHz on DRA74 EVM.
Signed-off-by: Vignesh R vigne...@ti.com
---
drivers/spi/ti_qspi.c | 93 +++
1 file changed, 93 insertions(+)
diff --git a/drivers/spi
-declaration]
Signed-off-by: Vignesh R vigne...@ti.com
---
drivers/dma/ti-edma3.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/dma/ti-edma3.c b/drivers/dma/ti-edma3.c
index 8184ded9fa81..638cf525a278 100644
--- a/drivers/dma/ti-edma3.c
+++ b/drivers/dma/ti-edma3.c
@@ -13,6 +13,8
From: Ravi Babu ravib...@ti.com
Use memalign() with ARCH_DMA_MINALIGN to allocate read buffers.
This is required because, flash drivers may use DMA for read operations
and may have to invalidate the buffer before read.
Signed-off-by: Ravi Babu ravib...@ti.com
Signed-off-by: Vignesh R vigne
From: Ravi Babu ravib...@ti.com
Use memalign() with ARCH_DMA_MINALIGN to allocate read buffers.
This is required because, flash drivers may use DMA for read operations
and may have to invalidate the buffer before read.
Signed-off-by: Ravi Babu ravib...@ti.com
Signed-off-by: Vignesh R vigne
for disabling clocks in uboot
Ravi Babu (2):
sf: allocate cache aligned buffers to copy from flash
env: use cache line aligned memory for flash read
Tom Rini (1):
sf: ops: Add spi_flash_copy_mmap function
Vignesh R (6):
ARM: OMAP5: Add functions to enable and disable EDMA3 clocks
ARM: AM43XX
Enable TI_EDMA3 and SPL_DMA support, so as to reduce boot time. With
DMA enabled there is almost 3x improvement in read performance. This
helps in reducing boot time in qspiboot mode
Also add EDMA3 base address for DRA7XX and AM57XX.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/include
On Saturday 04 July 2015 06:23 PM, R, Vignesh wrote:
On 7/3/2015 5:12 PM, Tom Rini wrote:
On Fri, Jul 03, 2015 at 04:46:10PM +0530, Vignesh R wrote:
ti_qspi uses memory map mode for faster read. Enabling DMA will increase
read speed by 3x @48MHz on DRA74 EVM.
Signed-off-by: Vignesh R
On 07/30/2015 11:04 AM, Vignesh R wrote:
This patch series enables DMA for QSPI on dra7xx and am43xx.
Patch 1 and 2 make sure the buffers are mem aligned for dma operation.
Patch 3-6 add support for enabling and disabling of edma3 clocks on
am43xx and dra7xx. Patch 7-9 add dma
ti_qspi uses memory map mode for faster read. Enabling DMA will increase
read speed by 3x @48MHz on DRA74 EVM.
Signed-off-by: Vignesh R vigne...@ti.com
Reviewed-by: Jagan Teki jt...@openedev.com
---
* Added a TODO comment
drivers/spi/ti_qspi.c | 25 +
1 file changed, 25
From: Kishon Vijay Abraham I kis...@ti.com
Add do_disable_clocks() to disable clock domains and module clocks.
These clocks are enabled using do_enable_clocks().
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Vignesh R vigne...@ti.com
Reviewed-by: Jagan Teki jt
From: Ravi Babu ravib...@ti.com
Use memalign() with ARCH_DMA_MINALIGN to allocate read buffers.
This is required because, flash drivers may use DMA for read operations
and may have to invalidate the buffer before read.
Signed-off-by: Ravi Babu ravib...@ti.com
Signed-off-by: Vignesh R vigne
From: Ravi Babu ravib...@ti.com
Use memalign() with ARCH_DMA_MINALIGN to allocate read buffers.
This is required because, flash drivers may use DMA for read operations
and may have to invalidate the buffer before read.
Signed-off-by: Ravi Babu ravib...@ti.com
Signed-off-by: Vignesh R vigne
line aligned memory for flash read
Tom Rini (1):
sf: ops: Add spi_flash_copy_mmap function
Vignesh R (5):
ARM: OMAP5: Add functions to enable and disable EDMA3 clocks
ARM: AM43XX: Add functions to enable and disable EDMA3 clocks
dma: ti-edma3: Add helper function to support edma3 transfer
Signed-off-by: Vignesh R vigne...@ti.com
Reviewed-by: Jagan Teki jt...@openedev.com
---
arch/arm/include/asm/ti-common/ti-edma3.h | 2 +
drivers/dma/ti-edma3.c| 78 +++
2 files changed, 80 insertions(+)
diff --git a/arch/arm/include/asm/ti-common
From: Tom Rini tr...@ti.com
When doing a memory mapped copy we may have DMA available and thus need
to have this copy abstracted so that the driver can do it, rather than a
simple memcpy.
Signed-off-by: Tom Rini tr...@ti.com
Signed-off-by: Vignesh R vigne...@ti.com
Reviewed-by: Jagan Teki jt
Enable TI_EDMA3 and SPL_DMA support, so as to reduce boot time. With
DMA enabled there is almost 3x improvement in read performance. This
helps in reducing boot time in qspiboot mode
Also add EDMA3 base address for DRA7XX and AM57XX.
Signed-off-by: Vignesh R vigne...@ti.com
Reviewed-by: Jagan
Adds functions to enable and disable edma3 clocks which can be invoked
by drivers using edma3 to control the clocks.
Signed-off-by: Vignesh R vigne...@ti.com
Reviewed-by: Tom Rini tr...@konsulko.com
Reviewed-by: Jagan Teki jt...@openedev.com
---
arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 36
Adds functions to enable and disable edma3 clocks which can be invoked
by drivers using edma3 to control the clocks.
Signed-off-by: Vignesh R vigne...@ti.com
Reviewed-by: Tom Rini tr...@konsulko.com
---
* dropped #ifdefs in header file.
arch/arm/cpu/armv7/omap5/hw_data.c | 41
ti_qspi uses memory map mode for faster read. Enabling DMA will increase
read speed by 3x @48MHz on DRA74 EVM.
Signed-off-by: Vignesh R vigne...@ti.com
Reviewed-by: Jagan Teki jt...@openedev.com
---
drivers/spi/ti_qspi.c | 23 +++
1 file changed, 23 insertions(+)
diff --git
From: Kishon Vijay Abraham I kis...@ti.com
Add do_disable_clocks() to disable clock domains and module clocks.
These clocks are enabled using do_enable_clocks().
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Vignesh R vigne...@ti.com
Reviewed-by: Jagan Teki jt
From: Kishon Vijay Abraham I kis...@ti.com
Add do_disable_clocks() to disable clock domains and module clocks.
These clocks are enabled using do_enable_clocks().
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/cpu/armv7/omap-common
Adds functions to enable and disable edma3 clocks which can be invoked
by drivers using edma3 to control the clocks.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 36
1 file changed, 36 insertions(+)
diff --git a/arch
Enable TI_EDMA3 and SPL_DMA support, so as to reduce boot time. With
DMA enabled there is almost 3x improvement in read performance. This
helps in reducing boot time in qspiboot mode
Also add EDMA3 base address for DRA7XX and AM57XX.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/include
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/include/asm/ti-common/ti-edma3.h | 2 +
drivers/dma/ti-edma3.c| 78 +++
2 files changed, 80 insertions(+)
diff --git a/arch/arm/include/asm/ti-common/ti-edma3.h
b/arch/arm/include/asm/ti
ti_qspi uses memory map mode for faster read. Enabling DMA will increase
read speed by 3x @48MHz on DRA74 EVM.
Signed-off-by: Vignesh R vigne...@ti.com
---
drivers/spi/ti_qspi.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi
From: Tom Rini tr...@ti.com
When doing a memory mapped copy we may have DMA available and thus need
to have this copy abstracted so that the driver can do it, rather than a
simple memcpy.
Signed-off-by: Tom Rini tr...@ti.com
Signed-off-by: Vignesh R vigne...@ti.com
---
drivers/mtd/spi/sf_ops.c
From: Ravi Babu ravib...@ti.com
Use memalign() with ARCH_DMA_MINALIGN to allocate read buffers.
This is required because, flash drivers may use DMA for read operations
and may have to invalidate the buffer before read.
Signed-off-by: Ravi Babu ravib...@ti.com
Signed-off-by: Vignesh R vigne
From: Kishon Vijay Abraham I kis...@ti.com
Add do_disable_clocks() to disable clock domains and module clocks.
These clocks are enabled using do_enable_clocks().
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/cpu/armv7/am33xx/clock.c
From: Ravi Babu ravib...@ti.com
Use memalign() with ARCH_DMA_MINALIGN to allocate read buffers.
This is required because, flash drivers may use DMA for read operations
and may have to invalidate the buffer before read.
Signed-off-by: Ravi Babu ravib...@ti.com
Signed-off-by: Vignesh R vigne
Adds functions to enable and disable edma3 clocks which can be invoked
by drivers using edma3 to control the clocks.
Signed-off-by: Vignesh R vigne...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c | 41
arch/arm/cpu/armv7/omap5/prcm-regs.c | 4
arch
: Add support for disabling clocks in uboot
ARM: OMAP5: Add support for disabling clocks in uboot
Ravi Babu (2):
sf: allocate cache aligned buffers to copy from flash
env: use cache line aligned memory for flash read
Tom Rini (1):
sf: ops: Add spi_flash_copy_mmap function
Vignesh R (5
This adds support to update firmware on qspi flash present on
am437x-sk-evm and am43xx-epos-evm via DFU.
On device:
=> setenv dfu_alt_info ${dfu_alt_info_qspi}
=> dfu 0 sf 0:0
On host:
$ sudo dfu-util -l
$ sudo dfu-util -D u-boot.bin -a u-boot.bin
Signed-off-by: Vignesh R <vigne.
On 10/24/2015 09:09 AM, Jagan Teki wrote:
> Replace numerical bit shift with BIT macro
> in ti_qspi
>
> :%s/(1 << nr)/BIT(nr)/g
> where nr = 0, 1, 2 .... 31
>
> Cc: Vignesh R <vigne...@ti.com>
> Reviewed-by: Tom Rini <tr...@konsulko.com>
>
On 10/22/2015 11:30 AM, Vignesh R wrote:
> This adds support to update firmware on qspi flash present on
> am437x-sk-evm and am43xx-epos-evm via DFU.
>
> On device:
> => setenv dfu_alt_info ${dfu_alt_info_qspi}
> => dfu 0 sf 0:0
>
> On host:
> $ sudo dfu-util -
Hi Lokesh,
On 10/21/2015 06:10 PM, Lokesh Vutla wrote:
> Hi Vignesh,
>
> On Wednesday 21 October 2015 10:10 AM, Vignesh R wrote:
>> This adds support to update firmware on qspi flash present on
>> am437x-sk-evm and am43xx-epos-evm via DFU.
>>
>> On
Enable TI_EDMA3 and QUAD read support for ti_qspi on am43xx, this
increases read performance to 4 MB/s.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 3 +++
include/configs/am43xx_evm.h | 2 ++
2 files chan
This patchset enables QUAD mode and DMA support for qspi read on
am437x. This increases the througput to 4 MB/s.
Tested on am437x-sk and am437x-idk evm.
Vignesh R (2):
spi: ti_qspi: Add dummy readl for bus sync
ARM: am437xx: Enable QUAD read and EDMA support for ti_qspi
arch/arm/include
Add dummy readl after invalidating cmd field of QSPI_CMD_REG to ensure
bus sync. Without this device's CS is not deactivated reliably leading
to failure to enumerate flash or failure to set quad enable bit on
Macronix flash present on am437x-sk and am437x-idk evms.
Signed-off-by: Vignesh R <vi
Hi,
With commit 7ae8350f67eea("ti: armv7: Move SPL SDRAM init to the right
place, drop unused CONFIG_SPL_STACK") QSPI XIP boot appears to be broken
on AM437x SK EVM.
Following UART initialization code (as indicated by TODO) causes the XIP
boot failure.
In arch/arm/cpu/armv7/am33xx/board.c:
@@
Hi Albert,
On 11/16/2015 05:16 PM, Albert ARIBAUD wrote:
> Hello Vignesh,
>
[...]
Do you see any issues with above change?
>>>
>>> (1) So your s_init runs even before board_init_f_mem(), right?
>>>
>>> Your working fix seems to imply that as long as s_init() is run after
>>>
On 11/10/2015 11:52 AM, Vignesh R wrote:
> This patchset enables QUAD mode and DMA support for qspi read on
> am437x. This increases the througput to 4 MB/s.
>
> Tested on am437x-sk and am437x-idk evm.
>
> Vignesh R (2):
> spi: ti_qspi: Add dummy readl for bus sync
>
On 11/17/2015 11:33 AM, Jagan Teki wrote:
> On 10 November 2015 at 11:52, Vignesh R <vigne...@ti.com> wrote:
>> Add dummy readl after invalidating cmd field of QSPI_CMD_REG to ensure
>> bus sync. Without this device's CS is not deactivated reliably leading
>> to
On 10/22/2015 11:30 AM, Vignesh R wrote:
> This adds support to update firmware on qspi flash present on
> am437x-sk-evm and am43xx-epos-evm via DFU.
>
> On device:
> => setenv dfu_alt_info ${dfu_alt_info_qspi}
> => dfu 0 sf 0:0
>
> On host:
> $ sudo dfu-util -
util -D MLO -a MLO and
sudo dfu-util -a 0 -D MLO are correct.
I used the above format as its easier for reading. Thanks!
>>
>> Signed-off-by: Vignesh R <vigne...@ti.com>
>> ---
>> include/configs/dra7xx_evm.h | 16 +++-
>> 1 file chan
-off-by: Vignesh R <vigne...@ti.com>
---
drivers/dfu/dfu_sf.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c
index 7646c6b7270c..9702eeea202a 100644
--- a/drivers/dfu/dfu_sf.c
+++ b/drivers/dfu/dfu_sf.c
@@ -115,8 +115,10 @@
This adds support to update firmware on qspi flash using DFU.
On device:
=> setenv dfu_alt_info ${dfu_alt_info_qspi}
=> dfu 0 sf 0:0
On host:
$ sudo dfu-util -l
$ sudo dfu-util -D MLO -a MLO
$ sudo dfu-util -D u-boot.img -a u-boot.img
Signed-off-by: Vignesh R <vigne...@ti.com>
using
via DFU and then booting the board in QSPI boot mode.
Vignesh R (2):
dfu: dfu_sf: Pass duplicate devstr to parse_dev
ARM: dra7xx_evm: Add DFU support for qspi flash
drivers/dfu/dfu_sf.c | 4 +++-
include/configs/dra7xx_evm.h | 16 +++-
2 files changed, 18
This adds support to update firmware on qspi flash present on
am437x-sk-evm and am43xx-epos-evm via DFU.
On device:
=> setenv dfu_alt_info ${dfu_alt_info_qspi}
=> dfu 0 sf 0:0
On host:
$ sudo dfu-util -l
$ sudo dfu-util -D u-boot.img -a u-boot.img
Signed-off-by: Vignesh R <vigne.
On 07/03/2015 05:12 PM, Tom Rini wrote:
On Fri, Jul 03, 2015 at 04:46:10PM +0530, Vignesh R wrote:
ti_qspi uses memory map mode for faster read. Enabling DMA will increase
read speed by 3x @48MHz on DRA74 EVM.
Signed-off-by: Vignesh R vigne...@ti.com
This ignores the feedback from
On 12/03/2015 05:55 PM, Jagan Teki wrote:
> On Thursday 03 December 2015 05:51 PM, Vignesh R wrote:
>>
>>
>> On 12/03/2015 05:25 PM, Jagan Teki wrote:
>>> On 23 November 2015 at 17:43, Vignesh R <vigne...@ti.com> wrote:
>>>> ti-qspi driver c
On 12/03/2015 05:25 PM, Jagan Teki wrote:
> On 23 November 2015 at 17:43, Vignesh R <vigne...@ti.com> wrote:
>> ti-qspi driver currently uses 3-byte addressing mode(and opcodes) for
>> memory-mapped read. This restricts maximum addressable flash size to
>> 16MB.
>
XIP boot.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
arch/arm/cpu/armv7/am33xx/board.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index bd14326cf479..1633ddc6b096 100644
--- a/arch/arm/cpu/armv7/am33xx/b
vib...@ti.com>
[vigne...@ti.com: Re-word commit description]
Signed-off-by: Vignesh R <vigne...@ti.com>
---
Tested on DRA74 EVM with Spansion flash and AM437X IDK EVM with Macronix
flash.
drivers/spi/ti_qspi.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a
On Tuesday 10 May 2016 11:58 AM, Vignesh R wrote:
> In case of DT boot, don't read default speed and mode for SPI from
> CONFIG_*, instead read from DT node. This will make sure that boards
> with multiple SPI/QSPI controllers can be probed at different
> bus frequencies a
On 05/04/2016 04:49 PM, Vignesh R wrote:
>
> This series converts davinci_spi driver to adapt to driver model
> framework. And enables the driver on k2l, k2e, k2hk evms. Also,
> added support for davinci_spi on k2g evm.
>
> Tested on k2l, k2e, k2hk and k2g evms.
>
> Re
On Tuesday 24 May 2016 09:54 AM, Vignesh R wrote:
> Convert davinci_spi driver so that it complies with SPI DM framework.
>
> Signed-off-by: Vignesh R <vigne...@ti.com>
> ---
>
> v6: Fix retval on dev_map_physmem() failure.
Gentle ping
>
> d
On Friday 17 June 2016 03:40 AM, Jagan Teki wrote:
> On Jun 16, 2016 4:12 PM, Vignesh R <vigne...@ti.com> wrote:
>>
>>
>>
>> On Tuesday 24 May 2016 09:54 AM, Vignesh R wrote:
>>> Convert davinci_spi driver so that it complies with SPI DM framework
According to Data Manual(SPRS915P) of AM572x, TI QSPI controller on
DRA74 EVM(rev 1.1+) can support up to 64MHz in MODE-0, whereas MODE-3 is
limited to 48MHz. Hence, switch to MODE-0 for better throughput.
Also, add IODelay parameters for the same.
Signed-off-by: Vignesh R <vigne...@ti.
CONFIG_SF_DEFAULT_MODE is used to select default SPI mode when using
sf commands. Therefore fix am43xx to use CONFIG_SF_DEFAULT_MODE instead
of CONFIG_DEFAULT_SPI_MODE.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
include/configs/am43xx_evm.h | 2 +-
1 file changed, 1 insertion(+), 1 de
In case of DT boot, don't read default speed and mode for SPI from
CONFIG_*, instead read from DT node. This will make sure that boards
with multiple SPI/QSPI controllers can be probed at different
bus frequencies and modes.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
cm
In case of DT boot, don't read default speed for SPI from
CONFIG_*, instead read from DT node. This will make sure that boards
with multiple SPI/QSPI controllers can be probed at different
bus frequencies.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
v2: Initialize speed, mode to 0 i
In case of DT boot, don't read default speed and mode for SPI from
CONFIG_*, instead read from DT node. This will make sure that boards
with multiple SPI/QSPI controllers can be probed at different
bus frequencies and SPI modes.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
v3: Update
On 04/13/2016 03:37 PM, Vignesh R wrote:
> In case of DT boot, don't read default speed for SPI from
> CONFIG_*, instead read from DT node. This will make sure that boards
> with multiple SPI/QSPI controllers can be probed at different
> bus frequencies.
>
> Signed-off-by
-by: Vignesh R <vigne...@ti.com>
---
drivers/spi/cadence_qspi.c | 3 ++-
drivers/spi/cadence_qspi.h | 2 +-
drivers/spi/cadence_qspi_apb.c | 10 +-
3 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index 4f7fd5
AHB address can be as long as 32 bit, hence remove the
CQSPI_REG_INDIRECTRDSTARTADDR mask. Since AHB address is passed from DT
and read as u32 value, it anyway does not make sense to mask upper bits.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/spi/cadence_qspi_apb.c | 5 ++---
K2G SoC has a Cadence QSPI controller to communicate with NOR flash
devices. Add DT nodes to support the same.
Also, K2G EVM has a s25fl512s flash connect to QSPI bus at CS 0. Add nor
flash slave node for the same.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
arch/arm/dts/k2g-evm.dt
the driver.
Depends on [1] to enable SPI driver model support on K2G and [2] to
support different bus frequencies for two different SPI controllers
present on K2G EVM.
[1]https://www.mail-archive.com/u-boot@lists.denx.de/msg209556.html
[2]https://patchwork.ozlabs.org/patch/609947/
Vignesh R (4
On 04/12/2016 10:54 PM, Tom Rini wrote:
> On Tue, Apr 12, 2016 at 05:03:19PM +0530, Vignesh R wrote:
>
>> Add aliases for SPI nodes in order for it to be probed by the DM
>> framework.
>>
>> Signed-off-by: Vignesh R <vigne...@ti.com>
>
>
Enable Cadence QSPI controller support to use QSPI on K2G SoC. Also
enable Spansion flash support to access s25fl512s flash present on K2G
QSPI bus.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
configs/k2g_evm_defconfig | 2 ++
include/configs/k2g_evm.h | 6 ++
2 files chan
This series converts davinci_spi driver to adapt to driver model
framework. And enables the driver on k2l, k2e, k2hk evms. Also,
added support for davinci_spi on k2g evm.
Tested on k2l, k2e, k2hk and k2g evms.
Vignesh R (11):
spi: davinci_spi: Convert to driver to adapt to DM
keystone2: spi
Since Keystone2 devices do not have support DM in SPL, do not define
DM_SPI and DM_SPI_FLASH for SPL build.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
include/configs/ti_armv7_keystone2.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/configs/ti_armv7_keystone2.h
b/i
Convert davinci_spi driver to comply with SPI DM framework.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/spi/davinci_spi.c | 326 +-
1 file changed, 237 insertions(+), 89 deletions(-)
diff --git a/drivers/spi/davinci_spi.c b/drive
Enable SPI and SPI Flash driver model as K2G SPI controller driver
supports driver model.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
configs/k2g_evm_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 054581
Now that davinci_spi driver has been converted to DM framework, enable
the same in DT. Also add "spi-flash" as compatible property to
n25q128a11 node as it is required for flash device to be probed in
U-Boot.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
arch/arm/dts/k2l-evm.dts
Enable SPI and SPI Flash driver model as K2L SPI controller driver
supports driver model.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
configs/k2l_evm_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index d2ebb1
K2G SoC has 4 SPI instances that are compatible with davinci_spi
controller(same as previous generation of Keystone2 devices). Add DT
nodes for the same. K2G EVM has a N25Q128A13 SPI NOR flash connected on
SPI-1. Add DT bindings for the same.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
Now that davinci_spi driver has been converted to DM framework, enable
the same in DT. Also add "spi-flash" as compatible property to
n25q128a11 node as it is required for flash device to be probed in
U-Boot.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
arch/arm/dts/k2e-evm.dts
Enable SPI and SPI Flash driver model as K2E SPI controller driver
supports driver model.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
configs/k2e_evm_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index a3fa75
Now that davinci_spi driver has been converted to DM framework, enable
the same in DT. Also add "spi-flash" as compatible property to
n25q128a11 node as it is required for flash device to be probed in
U-Boot.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
arch/arm/dts/k2hk-ev
Add aliases for SPI nodes in order for it to be probed by the DM
framework.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
arch/arm/dts/keystone.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/dts/keystone.dtsi b/arch/arm/dts/keystone.dtsi
index f39b969f8d43..be97f3
On 04/11/2016 11:18 AM, Mugunthan V N wrote:
> On Monday 11 April 2016 10:12 AM, Vignesh R wrote:
>>
>>
>> On 04/09/2016 01:15 AM, Tom Rini wrote:
>>> On Thu, Apr 07, 2016 at 09:02:26PM +0530, Vignesh R wrote:
>>>
>>>> In case of DT b
On 04/09/2016 01:15 AM, Tom Rini wrote:
> On Thu, Apr 07, 2016 at 09:02:26PM +0530, Vignesh R wrote:
>
>> In case of DT boot, don't read default speed and mode for SPI from
>> CONFIG_*, instead read from DT node. This will make sure that boards
>> with multiple
y: Marek Vasut <ma...@denx.de>
> Cc: Anatolij Gustschin <ag...@denx.de>
> Cc: Chin Liang See <cl...@altera.com>
> Cc: Dinh Nguyen <dingu...@opensource.altera.com>
> Cc: Jagan Teki <jt...@openedev.com>
> Cc: Pavel Machek <pa...@denx.de>
> Cc: Stef
Convert davinci_spi driver so that it complies with SPI DM framework.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
v2: Add comments to struct davinci_spi_slave members.
Use dev_map_physmem() added by previous patch.
drivers/spi/davinci_spi.c
This series converts davinci_spi driver to adapt to driver model
framework. And enables the driver on k2l, k2e, k2hk evms. Also,
added support for davinci_spi on k2g evm.
Tested on k2l, k2e, k2hk and k2g evms.
v1: http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/258285
Vignesh R (12
Since Keystone2 devices do not have support DM in SPL, do not define
DM_SPI and DM_SPI_FLASH for SPL build.
Signed-off-by: Vignesh R <vigne...@ti.com>
Reviewed-by: Tom Rini <tr...@konsulko.com>
---
include/configs/ti_armv7_keystone2.h | 4
1 file changed, 4 insertions(+)
Now that davinci_spi driver has been converted to DM framework, enable
the same in DT. Also add "spi-flash" as compatible property to
n25q128a11 node as it is required for flash device to be probed in
U-Boot.
Signed-off-by: Vignesh R <vigne...@ti.com>
Reviewed-by: Tom Rini <
This API helps to map physical register addresss pace of device to
virtual address space easily. Its just a wrapper around map_physmem()
with MAP_NOCACHE flag.
Signed-off-by: Vignesh R <vigne...@ti.com>
Suggested-by: Simon Glass <s...@chromium.org>
---
v2: New patch
drivers/core/d
Add aliases for SPI nodes in order for it to be probed by the DM
framework.
Signed-off-by: Vignesh R <vigne...@ti.com>
Reviewed-by: Tom Rini <tr...@konsulko.com>
---
arch/arm/dts/keystone.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/dts/keystone.dtsi b/
1 - 100 of 616 matches
Mail list logo
