xhci.h has now been moved to include/usb/ folder. Therefore, update the
path in the Cadence USB drivers.
Signed-off-by: Vignesh Raghavendra
---
drivers/usb/cdns3/core.c | 2 +-
drivers/usb/cdns3/host.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/cdns3
Add USB support for J721e SoC.
First patch fixes a compile issue with Cadence USB driver. Rest of the
patches add env, DT and configs related to USB.
Vignesh Raghavendra (4):
usb: cdns3: Fix include file path
environment: ti: Add DFU environment variables k3_dfu.h
arm: dts: k3-j721e: Add DT
Setup env variables for updating firmwares on eMMC/OSPI/MMC via DFU
Signed-off-by: Vignesh Raghavendra
---
include/configs/j721e_evm.h | 10 +++
include/environment/ti/k3_dfu.h | 46 +
2 files changed, 56 insertions(+)
create mode 100644 include
Enable USB host and device related configs.
Signed-off-by: Vignesh Raghavendra
---
configs/j721e_evm_a72_defconfig | 28
1 file changed, 28 insertions(+)
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index 748179e82317..0abbfc02e614
On 12/11/19 4:57 PM, Simon Goldschmidt wrote:
> On Tue, Nov 12, 2019 at 10:30 AM Tan, Ley Foon wrote:
>>
[...]
But, unfortunately, such stub does not exists for clk_get_rate().
So on platforms w/o CONFIG_CLK set:
arm-linux-gnueabihf-ld.bfd: drivers/spi/built-in.o: in
On 12/11/19 2:44 PM, Simon Goldschmidt wrote:
> On Tue, Nov 12, 2019 at 9:59 AM Tan, Ley Foon wrote:
>>
>>
>>
>>> -Original Message-
>>> From: Simon Goldschmidt
>>> Sent: Tuesday, November 12, 2019 5:43 AM
>>> To: Jaga
Drop local dma_map_single() and dma_unmap_single() and use arch specific
common implementation
Signed-off-by: Vignesh Raghavendra
---
drivers/mtd/nand/raw/denali.c | 34 +++---
1 file changed, 3 insertions(+), 31 deletions(-)
diff --git a/drivers/mtd/nand/raw
Now that arch specific dma mapping APIs take care of cache
flush/invalidate, drop local cache flush operation.
Signed-off-by: Vignesh Raghavendra
---
drivers/net/macb.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index
Drop local dma_map_single() and dma_unmap_single() and use arch specific
common implementation
Signed-off-by: Vignesh Raghavendra
---
drivers/mmc/tmio-common.c | 25 +++--
1 file changed, 3 insertions(+), 22 deletions(-)
diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc
etc..)
Update arch specific dma_map_single() and dma_unmap_single() APIs to do
cache flush/invalidate operations, so that drivers need not implement
them locally.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/include/asm/dma-mapping.h | 22 --
arch/nds32/include/asm/dma
Add stub for dma_memcpy() and dma_get_device when CONFIG_DMA is
disabled. This avoids ifdefs in driver code using DMA APIs
Signed-off-by: Vignesh Raghavendra
---
include/dma.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/dma.h b/include/dma.h
index d1c3d0df7d91
file so that per driver implementation of these APIs can
be avoided.
I don't have all the affected hardwares. Would greatly appreciate if
these patches work fine on the affected platforms.
Vignesh Raghavendra (4):
asm: dma-mapping.h: Fix dma mapping functions
mmc: tmio-common: Drop custom dma
Rename CONFIG_SPL_DMA_SUPPORT to CONFIG_SPL_DMA. This allows to use
macros such as CONFIG_IS_ENABLED() that allow conditional compilation of
code for SPL and U-Boot.
Signed-off-by: Vignesh Raghavendra
---
common/spl/Kconfig | 2 +-
configs/am57xx_evm_defconfig | 2
Hi Simon,
On 07/11/19 1:25 AM, Simon Goldschmidt wrote:
> Hi Vignesh,
>
> On Thu, Oct 17, 2019 at 2:31 PM Vignesh Raghavendra wrote:
>>
>> Hi Simon,
>>
>> On 17/10/19 4:50 PM, Simon Goldschmidt wrote:
>>> On Mon, Oct 14, 2019 at 3:27 PM Vignesh Raghaven
Hi JJ,
On 05/11/19 5:20 PM, Jean-Jacques Hiblot wrote:
> This will probe the multiplexer devices that have a "u-boot,mux-autoprobe"
> property. As a consequence they will be put in their idle state.
>
> Signed-off-by: Jean-Jacques Hiblot
>
> ---
[...]
> diff --git a/drivers/mux/mux-uclass.c
On 21-Nov-19 6:02 PM, Grygorii Strashko wrote:
On 18/11/2019 12:59, Vignesh Raghavendra wrote:
This patch enables networking support for TI's J721e SoC.
Patch 1 adds a new interface to DMA uclass to get channel specific
private/configuration data. Patch 2 to 4 use this interface to pass
Hi,
On 26/11/19 12:39 pm, Michal Simek wrote:
> On 19. 11. 19 15:20, Ashok Reddy Soma wrote:
>> Add dual parallel and dual stacked support in spi-nor framework.
>> Add dual flash support for nor-scan, read and write.
>>
How does the DT representation of these flashes look like?
Is it in
On K3 SoCs, DMA channels are shared across multiple entities, therefore
U-Boot DMA driver needs to query resource range from centralised
resource management controller i.e SystemFirmware and use DMA channels
allocated for A72 host. Add support for the same.
Signed-off-by: Vignesh Raghavendra
Get flow ID information for RX DMA channel using dma_get_cfg() interface
instead of reading from DT. This is required in order to avoid DT update
whenever there is change in the range of flow ID allocated to the host.
Signed-off-by: Vignesh Raghavendra
Acked-by: Joe Hershberger
Reviewed
Flush caches when pushing an element to ring and invalidate caches when
popping an element from ring in Exposed Ring mode. Otherwise DMA
transfers don't work properly in R5 SPL (with caches enabled) where the
core is not in coherency domain.
Signed-off-by: Vignesh Raghavendra
Reviewed
Add new compatible to handle J721e SoC
Signed-off-by: Vignesh Raghavendra
Acked-by: Joe Hershberger
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c| 2 +-
drivers/net/ti/am65-cpsw-nuss.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/ti/k3
and configs.
Depends on [1] for ethernet to work
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=146508
v3:
Add a debug print to print flow ID
v2:
Address comments from Grygorii.
Collect Acks
Vignesh Raghavendra (6):
dma: Introduce dma_get_cfg() interface
dma: ti: k3-udma: Implement
Exposed ring mode works well with 32 bit and 64 bit cores without need
for Proxies for 32 bit cores. Therefore switch to exposed ring mode.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
Enable configs related to DMA and Ethernet so as to support networking at
U-Boot prompt
Signed-off-by: Vignesh Raghavendra
Acked-by: Joe Hershberger
Reviewed-by: Grygorii Strashko
---
configs/j721e_evm_a72_defconfig | 8
1 file changed, 8 insertions(+)
diff --git a/configs
Import few basic bitmap functions (bitmap_{weight,fill,set,clear,or}())
and their dependencies from Linux. These are required for upcoming DMA
resource allocation support for TI's K3 SoCs.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
include/linux/bitmap.h | 133
Add new compatible to handle UDMA support for J721e SoC
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index 92c7af910406..cccffb600c4c 100644
Add DT nodes related to DMA and CPSW to -u-boot.dtsi to get networking
up on J721e EVM.
Signed-off-by: Vignesh Raghavendra
Acked-by: Joe Hershberger
Reviewed-by: Grygorii Strashko
---
.../k3-j721e-common-proc-board-u-boot.dtsi| 238 ++
1 file changed, 238 insertions
Remove redundant coherency checks before calling cache ops in UDMA
driver. This is now handled in arch specific cache operation
implementation based on Kconfig option
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 49
Fix up the debug prints that were dumping state of TCHAN RT registers to
use tchan for MEM_TO_DEV transfers.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/ti/k3
Instead of looking getting reference to SYSFW device using name which
is not guaranteed to be constant, use phandle supplied in the DT node to
get reference to SYSFW
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/soc/ti/k3-navss-ringacc.c | 3 ++-
1 file changed
. Clients can use unique configuration ID flags to get different
configuration data from DMA driver.
Signed-off-by: Vignesh Raghavendra
Acked-by: Joe Hershberger
Reviewed-by: Grygorii Strashko
---
drivers/dma/dma-uclass.c | 12
include/dma-uclass.h | 11 +++
include/dma.h
Cast pointers properly so as to avoid warnings when driver is built for
32 bit platforms
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/ti/k3-udma.c
v3:
Address comments by Grygorii and add R-by
Vignesh Raghavendra (10):
lib: Import few bitmap functions from Linux
dma: ti: k3-udma: Query DMA channels allocated from Resource Manager
soc: ti: k3-navss-ringacc: Flush/invalidate caches on ring push/pop
soc: ti: k3-navss-ringacc: Get
MA channel. In order for basic ethernet to work, CPSW slave must be
aware of the flow ID allocated for the RX channel by the DMA driver.
This interface allows CPSW to query flow ID from DMA provider and
configure it in CPSW HW.
Signed-off-by: Vignesh Raghavendra
Acked-by: Joe Hershberger
Reviewed-by
UDMA always expects 64 bit address pointer of the transfer descriptor in
the Ring. But on 32 bit cores like R5, pointer is always 32 bit in size.
Therefore copy over 32 bit pointer value to 64 bit variable before
pushing it over to the ring, so that upper 32 bits are 0s.
Signed-off-by: Vignesh
Flush caches when pushing an element to ring and invalidate caches when
popping an element from ring in Exposed Ring mode. Otherwise DMA
transfers don't work properly in R5 SPL (with caches enabled) where the
core is not in coherency domain.
Signed-off-by: Vignesh Raghavendra
Reviewed
v4:
Rebase onto latest master and fix a compliation error due to recent
changes in master.
v3:
Address comments by Grygorii and add R-by
Vignesh Raghavendra (10):
lib: Import few bitmap functions from Linux
dma: ti: k3-udma: Query DMA channels allocated from Resource Manager
soc: ti: k3
On K3 SoCs, DMA channels are shared across multiple entities, therefore
U-Boot DMA driver needs to query resource range from centralised
resource management controller i.e SystemFirmware and use DMA channels
allocated for A72 host. Add support for the same.
Signed-off-by: Vignesh Raghavendra
Import few basic bitmap functions (bitmap_{weight,fill,set,clear,or}())
and their dependencies from Linux. These are required for upcoming DMA
resource allocation support for TI's K3 SoCs.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
include/linux/bitmap.h | 133
Remove redundant coherency checks before calling cache ops in UDMA
driver. This is now handled in arch specific cache operation
implementation based on Kconfig option
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 49
Add new compatible to handle UDMA support for J721e SoC
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index 92c7af910406..cccffb600c4c 100644
Fix up the debug prints that were dumping state of TCHAN RT registers to
use tchan for MEM_TO_DEV transfers.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/ti/k3
Cast pointers properly so as to avoid warnings when driver is built for
32 bit platforms
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/ti/k3-udma.c
Exposed ring mode works well with 32 bit and 64 bit cores without need
for Proxies for 32 bit cores. Therefore switch to exposed ring mode.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
UDMA always expects 64 bit address pointer of the transfer descriptor in
the Ring. But on 32 bit cores like R5, pointer is always 32 bit in size.
Therefore copy over 32 bit pointer value to 64 bit variable before
pushing it over to the ring, so that upper 32 bits are 0s.
Signed-off-by: Vignesh
Instead of looking getting reference to SYSFW device using name which
is not guaranteed to be constant, use phandle supplied in the DT node to
get reference to SYSFW
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Grygorii Strashko
---
drivers/soc/ti/k3-navss-ringacc.c | 3 ++-
1 file changed
ase = (void *)base;
^
Fix this by using dev_read_addr_ptr() instead of dev_read_addr().
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Marek Vasut
---
drivers/phy/omap-usb2-phy.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/omap-usb2-phy.
Add env variables that set up dfu_alt_info for MMC/EMMC/OSPI. This
is required to allow update of firmware on these media.
Signed-off-by: Vignesh Raghavendra
---
include/configs/am65x_evm.h | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/include/configs/am65x_evm.h
AM654 SoC has USB2 PHY which is similar to existing USB2 PHYs on OMAP
SoCs. Add support for the same.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Marek Vasut
---
drivers/phy/omap-usb2-phy.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/phy/omap-usb2-phy.c b
Add support for USB0 and USB1 instances on the AM6 SoC.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am65-main.dtsi | 78 ++
1 file changed, 78 insertions(+)
diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi
index
Vignesh Raghavendra (8):
dwc3-generic: Add support for AM654 USB controller
phy: omap-usb2-phy: Fix warnings when built for ARM64
phy: omap-usb2-phy: Add support for AM654 USB2 PHY
arm: dts: k3-am65-main: add USB support
arm: dts: k3-am654-base-board: enable USB1
configs: am65x_evm
AM654 has DWC3 USB controller that is very similar to other TI SoCs. Add
a new compatible to enable the same.
Signed-off-by: Vignesh Raghavendra
Reviewed-by: Marek Vasut
---
drivers/usb/dwc3/dwc3-generic.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b
Enable USB keyboard to be used as input device at U-Boot prompt. Both
serial and USB keyboard will be active inputs simultaneously.
Signed-off-by: Vignesh Raghavendra
---
configs/am65x_evm_a53_defconfig | 3 +++
include/configs/am65x_evm.h | 1 +
2 files changed, 4 insertions(+)
diff --git
Enable configs related to USB Host mode, Peripheral mode and DFU.
Signed-off-by: Vignesh Raghavendra
---
configs/am65x_evm_a53_defconfig | 19 +++
1 file changed, 19 insertions(+)
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index cec99ee1e298
Add pinmux for USB1 and enable it as a peripheral port in U-Boot
specific dtsi since U-Boot does not support OTG.
Disable USB0 as its not available on the baseboard.
Signed-off-by: Vignesh Raghavendra
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 4 +++
arch/arm/dts/k3-am654-base
Make sure corresponding setup registers are updated depending on CS.
This ensures that driver can support QSPI flashes on ChipSelects other
than on CS0
Reported-by: Andreas Dannenberg
Signed-off-by: Vignesh Raghavendra
---
drivers/spi/ti_qspi.c | 21 +
1 file changed, 13
Since, commit 62f9b6544728 ("common: Move older CPU functions to their own
header")
cache ops functions are declared in a separate header. Include the same
to avoid build warnings.
Signed-off-by: Vignesh Raghavendra
---
drivers/usb/cdns3/ep0.c | 1 +
1 file changed, 1 insertion(+)
Add support for Octal flash devices. Octal flash devices use 8 IO lines
for data transfer. Currently only 1-1-8 Octal Read mode is supported.
Signed-off-by: Vignesh Raghavendra
---
drivers/mtd/spi/sf_internal.h | 3 ++-
drivers/mtd/spi/spi-nor-core.c | 20 +++-
drivers/spi/spi
Cadence OSPI is similar to QSPI IP except that it supports Octal IO
(8 IO lines) flashes. Add support for Cadence OSPI IP with existing
driver using new compatible
Signed-off-by: Vignesh Raghavendra
---
drivers/spi/cadence_qspi.c | 1 +
drivers/spi/cadence_qspi_apb.c | 8 ++--
2 files
This series adds Octal mode support for Micron's mt35x flash.
Also adds Octal mode support for Cadance OSPI/QSPI controller.
Currently only 1-1-8 mode is supported.
Vignesh Raghavendra (3):
mtd: spi-nor-core: Add octal mode support
spi: cadence-qspi: Add support for Cadence Octal SPI
TI's AM654 SoC has a Cadence OSPI IP. Add a new compatible string for
the same.
Signed-off-by: Vignesh Raghavendra
---
drivers/spi/cadence_qspi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index 6374d3976a4a..f8b69406d4b9 100644
On 14/11/19 5:31 am, Peter Robinson wrote:
> Add gd25q128 128Mbit chip to spi-nor id table.
>
> Tested on Pinebook Pro
>
> Signed-off-by: Peter Robinson
> ---
Acked-by: Vignesh Raghavendra
> drivers/mtd/spi/spi-nor-ids.c | 5 +
> 1 file changed, 5 inser
Hi Simon,
On 16/10/19 10:10 PM, Simon Glass wrote:
> Hi Vignesh,
>
> On Wed, 16 Oct 2019 at 04:28, Vignesh Raghavendra wrote:
>>
>> Hi Simon,
>>
>> On 12/10/19 10:03 AM, Bin Meng wrote:
>>> Hi Simon,
>>>
>>> On Sat, Oct 12, 2019 at 11:
On 18/10/19 7:52 AM, Simon Glass wrote:
> Hi,
>
> On Thu, 17 Oct 2019 at 08:28, Simon Glass wrote:
>>
>> Hi Vignesh,
>>
>> On Wed, 16 Oct 2019 at 04:28, Vignesh Raghavendra wrote:
>>>
>>> Hi Simon,
>>>
>>> On 12/10/19 10
Hi,
On 18/10/19 2:34 PM, Simon Goldschmidt wrote:
> On Thu, Oct 17, 2019 at 2:55 PM Simon Goldschmidt
> wrote:
>>
>> On Thu, Oct 17, 2019 at 2:44 PM Vignesh Raghavendra wrote:
>>>
>>> Hi,
>>>
>>> On 17/10/19 5:09 PM, Simon Goldschmi
Hi Simon,
On 12/10/19 10:03 AM, Bin Meng wrote:
> Hi Simon,
>
> On Sat, Oct 12, 2019 at 11:08 AM Simon Glass wrote:
>>
>> Hi Bin,
>>
>> On Wed, 9 Oct 2019 at 07:55, Bin Meng wrote:
>>>
>>> Hi Simon,
>>>
>>> On Wed, Sep 25, 2019 at 10:12 PM Simon Glass wrote:
On x86 platforms the SPI
Hi Tom,
On 10/10/19 11:22 AM, Vignesh Raghavendra wrote:
> This series adds support for HyperBus Memory Controller of TI's J721e
> and AM654 SoCs.
>
Stefan has provided Reviewed-bys for CFI related changes. Could you
please pull in this series if there no further comments?
Regard
Hi Sam,
On 24-Oct-19 7:16 PM, Sam Protsenko wrote:
> Putting Vignesh to "To:".
>
> Hi Vignesh,
>
> Please address Tero's comments below (I've marked with ^^^). Thanks.
>
> On Thu, Oct 24, 2019 at 3:54 PM Tero Kristo wrote:
>>
>> On 24/10/2019 13:32, Sam Protsenko wrote:
>>> Hi Tero,
>>>
>>>
Hi Andrew,
On 24/10/19 11:49 PM, Andrew F. Davis wrote:
> On 10/24/19 11:25 AM, Vignesh Raghavendra wrote:
>> Hi Sam,
>>
>> On 24-Oct-19 7:16 PM, Sam Protsenko wrote:
>>> Putting Vignesh to "To:".
>>>
>>> Hi Vignesh,
>>>
>
Hi Michal,
On 14/10/19 6:22 PM, Michal Simek wrote:
> From: T Karthik Reddy
>
> To add usb-3.0 support to peripheral device add BOS & SS capability
> descriptors to gadget composite framework.
>
How was this patch tested? With what gadget function driver was this tested?
I don't see *any*
x-idk: Configure the CDCE913 clock
synthesizer")
Reported-by: Sam Protsenko
Signed-off-by: Vignesh Raghavendra
---
drivers/usb/dwc3/dwc3-generic.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 40
On 18/10/19 6:12 PM, Simon Goldschmidt wrote:
> On Fri, Oct 18, 2019 at 2:40 PM Vignesh Raghavendra wrote:
>>
>> Hi,
>>
>> On 18/10/19 2:34 PM, Simon Goldschmidt wrote:
>>> On Thu, Oct 17, 2019 at 2:55 PM Simon Goldschmidt
>>> wrote:
>
H.
>
> This would prevent explicit adding of CONFIG_CMD_SF when
> DM_SPI_FLASH being enabled.
>
> Cc: Tom Rini
> Cc: Vignesh Raghavendra
> Signed-off-by: Jagan Teki
> ---
Acked-by: Vignesh Raghavendra
> cmd/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
DM_SPI_FLASH being used.
>
> Cc: Vignesh R
> Signed-off-by: Jagan Teki
> ---
Acked-by: Vignesh Raghavendra
> Changes for v2:
> - use imply than select
>
> drivers/mtd/spi/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mtd/spi/K
Hi Simon,
On 17/10/19 4:50 PM, Simon Goldschmidt wrote:
> On Mon, Oct 14, 2019 at 3:27 PM Vignesh Raghavendra wrote:
>>
>> Current Cadence QSPI driver has few limitations. It assumes all read
>> operations to be in Quad mode and thus does not support SFDP parsing.
>> A
Hi,
On 17/10/19 5:09 PM, Simon Goldschmidt wrote:
> On Mon, Oct 14, 2019 at 3:27 PM Vignesh Raghavendra wrote:
>>
>> Add support for Direct Access Controller mode of Cadence QSPI. This
>> allows MMIO access to SPI NOR flash providing better read performance.
>>
Hi Jagan,
On 23/10/19 12:00 AM, Jagan Teki wrote:
> Hi Vignesh,
>
> On Fri, Oct 11, 2019 at 1:28 PM Vignesh Raghavendra wrote:
>>
>> n25q* and mt25q* (both 256Mb and 512Mb) flashes support Flag status
>> register that indicates various errors that may be encoun
-off-by: Vignesh Raghavendra
---
v3: No change
v2: No change
drivers/mtd/Kconfig | 7 +++
drivers/mtd/Makefile | 1 +
drivers/mtd/hbmc-am654.c | 105 +++
3 files changed, 113 insertions(+)
create mode 100644 drivers/mtd/hbmc-am654.c
diff --git
Define CONFIG_SYS_MAX_FLASH_BANKS_DETECT so that number of flash banks
are automatically detected by CFI flash driver
Signed-off-by: Vignesh Raghavendra
---
v3: No change
include/configs/j721e_evm.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/configs/j721e_evm.h b/include
This series adds support for HyperBus Memory Controller of TI's J721e
and AM654 SoCs.
v3:
Rebase onto latest master branch
Vignesh Raghavendra (6):
mtd: cfi_flash: Use CONFIG_SYS_MONITOR_BASE only when defined
mtd: Add TI HyperBus Memory Controller driver
arm: dts: k3-j721e-mcu-wakeup: Add
-by: Vignesh Raghavendra
---
v3:
Rebase onto latest master
Increase functional clock frequency to 250MHz
v2: No change
arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
b/arch/arm/dts/k3
J721e SoM as a 64MB HyperFlash on board. Add pinmux and DT node for the
same.
Signed-off-by: Vignesh Raghavendra
---
v3: No change
arch/arm/dts/k3-j721e-som-p0.dtsi | 34 +++
1 file changed, 34 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-som-p0.dtsi
b/arch
Enable HBMC and HyperFlash in A72 SPL and A72 U-Boot
Signed-off-by: Vignesh Raghavendra
---
v3: No change
configs/j721e_evm_a72_defconfig | 12
1 file changed, 12 insertions(+)
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index 6729e03620c8
Make use of CONFIG_SYS_MONITOR_BASE only when available to avoid build
error when CONFIG_SYS_MONITOR_BASE is not defined.
Signed-off-by: Vignesh Raghavendra
---
v3: No change
v2: Make macro check consistent as pointed out by Stefan
drivers/mtd/cfi_flash.c | 6 --
1 file changed, 4
Hi Stefan,
On 23/10/19 8:06 AM, Stefan Roese wrote:
> Hi Vignesh,
>
> On 10.10.19 07:52, Vignesh Raghavendra wrote:
[...]
>> +
>> + hbmc: hyperbus@47034000 {
>> + compatible = "ti,j721e-hbmc", "ti,am654-hbmc";
Hi,
On 19/11/19 7:03 PM, Bin Meng wrote:
> +Vignesh
>
> On Mon, Oct 21, 2019 at 11:40 AM Simon Glass wrote:
>>
>> We don't normally need this on x86 unless the size of SPI flash devices is
>> larger than 16MB. This can be enabled by particular SoCs as needed, since
>> it adds to code size.
>>
Hi Marek,
On 18/11/19 7:42 PM, Marek Vasut wrote:
> On 11/18/19 2:46 PM, Vignesh Raghavendra wrote:
>> xhci.h has now been moved to include/usb/ folder. Therefore, update the
>
> s/folder/directory/ ; I can update it while applying.
Agree, Thanks!
>
>> path in
On 19/11/19 12:57 AM, Grygorii Strashko wrote:
>
>
> On 14/11/2019 11:14, Vignesh Raghavendra wrote:
>> On K3 SoCs, DMA channels are shared across multiple entities, therefore
>> U-Boot DMA driver needs to query resource range from centralised
>> resourc
On 20/11/19 2:46 PM, Grygorii Strashko wrote:
>
>
> On 20/11/2019 06:30, Lokesh Vutla wrote:
>>
>>
>> On 20/11/19 12:14 AM, Grygorii Strashko wrote:
>>> Move BOOTP_DNS2 and PHY_TI from dra7xx_evm.h to
>>> dra7xx_evm_defconfig.
>>>
>>> Signed-off-by: Grygorii Strashko
>>> ---
>>>
-by: Vignesh Raghavendra
---
v2: No change
drivers/spi/cadence_qspi.c | 136 +
drivers/spi/cadence_qspi.h | 9 +--
drivers/spi/cadence_qspi_apb.c | 124 --
3 files changed, 91 insertions(+), 178 deletions(-)
diff --git a/drivers/spi
in future.
For better performance, driver uses DMA to copy data from flash in
direct mode using dma_memcpy().
Signed-off-by: Vignesh Raghavendra
---
v2: Add DMA support and update commit message
drivers/spi/cadence_qspi.c | 40 -
drivers/spi/cadence_qspi.h | 19
://patchwork.ozlabs.org/patch/1195556/
Vignesh Raghavendra (2):
spi: cadence_qspi: Move to spi-mem framework
spi: cadence-qspi: Add direct mode support
drivers/spi/cadence_qspi.c | 148 +++---
drivers/spi/cadence_qspi.h | 24 +++--
drivers/spi/cadence_qspi_apb.c
MA channel. In order for basic ethernet to work, CPSW slave must be
aware of the flow ID allocated for the RX channel by the DMA driver.
This interface allows CPSW to query flow ID from DMA provider and
configure it in CPSW HW.
Signed-off-by: Vignesh Raghavendra
Acked-by: Joe Hershberger
---
drivers
Get flow ID information for RX DMA channel using dma_get_cfg() interface
instead of reading from DT. This is required in order to avoid DT update
whenever there is change in the range of flow ID allocated to the host.
Signed-off-by: Vignesh Raghavendra
Acked-by: Joe Hershberger
---
drivers/net
and configs.
Depends on [1] for ethernet to work
[1] http://patchwork.ozlabs.org/project/uboot/list/?series=145954
v2:
Address comments from Grygorii.
Collect Acks
Vignesh Raghavendra (6):
dma: Introduce dma_get_cfg() interface
dma: ti: k3-udma: Implement dma_get_cfg() interface
net: ti: am65
Add DT nodes related to DMA and CPSW to -u-boot.dtsi to get networking
up on J721e EVM.
Signed-off-by: Vignesh Raghavendra
Acked-by: Joe Hershberger
---
.../k3-j721e-common-proc-board-u-boot.dtsi| 239 ++
1 file changed, 239 insertions(+)
diff --git a/arch/arm/dts/k3-j721e
Vignesh Raghavendra (10):
lib: Import few bitmap functions from Linux
dma: ti: k3-udma: Query DMA channels allocated from Resource Manager
soc: ti: k3-navss-ringacc: Flush/invalidate caches on ring push/pop
soc: ti: k3-navss-ringacc: Get SYSFW reference from DT phandle
dma: ti: k3-udma
Add new compatible to handle J721e SoC
Signed-off-by: Vignesh Raghavendra
Acked-by: Joe Hershberger
---
drivers/dma/ti/k3-udma.c| 2 +-
drivers/net/ti/am65-cpsw-nuss.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3
Enable configs related to DMA and Ethernet so as to support networking at
U-Boot prompt
Signed-off-by: Vignesh Raghavendra
Acked-by: Joe Hershberger
---
configs/j721e_evm_a72_defconfig | 8
1 file changed, 8 insertions(+)
diff --git a/configs/j721e_evm_a72_defconfig b/configs
. Clients can use unique configuration ID flags to get different
configuration data from DMA driver.
Signed-off-by: Vignesh Raghavendra
Acked-by: Joe Hershberger
---
drivers/dma/dma-uclass.c | 12
include/dma-uclass.h | 11 +++
include/dma.h| 11 +++
3
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