Re: [U-Boot] [PATCH v5 1/3] ARM: Tegra: FDT: Add USB EHCI function for T30/T114

2013-11-13 Thread Andreas Müller 
On Fri, Jun 21, 2013 at 6:20 PM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 06/21/2013 05:05 AM, Jim Lin wrote:
 Add DT node for USB EHCI function.
 Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards.

 Changes in v5:
  - Move changes on fdtdec.h and fdtdec.c to patch 2/3
  - Modify PHY type to hsic for USB2 port

 HSIC is an odd choice; ULPI is much more common. Still, this isn't a big
 deal; this is simply a default value, so any board that enables USB2 can
 simply set the property to ulpi if needed.

Long time ago but now I am working on a board support for tegra30
which has ASIX-eth on USB2-HSIC and don't get it to work. Checking the
code leads me to the question:

Is it possible that phy_type = hsic is not handled at all?

Andreas
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[U-Boot] OMAP Reset fails when kernel governor 'ondemand' is active

2012-08-30 Thread Andreas Müller 
Hi,

hope somebody here might help:

I have tried with many combinations of

u-boot: 2011.09 / 2011.07
kernel 3.2.19 / 3.5 / 3.6rc3
gumstix OveroWater (TI OMAP 3530) / OveroFireStorm (TI DM3730))

All tested combinations share the same bug: As soon as I activate
governor 'ondemand' and try to restart the machine - either by
'shutdown -r' or by pressing reset - all next boots (from MMC) fail
before or during kernel uncompress. The only way out is powering off
and on again.

Help appreciated :)

Andreas
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Re: [U-Boot] [PATCH] omap_hsmmc: Wait for CMDI to be clear

2012-01-31 Thread Andreas Müller 
On Mon, Jan 30, 2012 at 10:22 PM, Tom Rini tr...@ti.com wrote:
 Before we can send a command we need both the DATI (command inhibit on
 mmc_dat line) bit and CMDI (command inhibit on mmc_cmd line) are clear.
 The previous behavior of only checking on DATI was insufficient on some
 cards and incorrect behavior in any case.  This makes the code check
 for both bits being clear and makes the error print more clear as
 to what happened.  DATI_CMDDIS is removed as it was unused elsewhere
 in the code and stood for 'DATI is set, cmds are disabled still'.

 Fix originally spotted by Peter Bigot.

 Tested-by: Peter A. Bigot big...@acm.org
 Tested-by: Robert Nelson robertcnel...@gmail.com
 Signed-off-by: Tom Rini tr...@ti.com
Tested-by: Andreas Müller schnitzelt...@googlemail.com
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Re: [U-Boot] [PATCH] omap: mmc: Raise timeout value to 20ms

2012-01-25 Thread Andreas Müller 
On Wednesday, January 11, 2012 04:34:05 PM Tom Rini trini at ti.com wrote:
 I ordered the same card Peter sees failure on and it arrived
 yesterday.  I'm formatting it now and will see if I can duplicate the
 problem here today.
ping?

Andreas
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Re: [U-Boot] OMAP3 performance regression in 2011.12

2012-01-16 Thread Andreas Müller 
On Monday, January 16, 2012 05:34:12 PM Philip Balister wrote:
 
 I built u-boot with this change reverted and compared the amount of time
 it took to build sip from source.
 
 Reverting the change improved compile time by about a factor of four, so
 it looks like the kernel does not properly re-enable the L2 cache.
 
 See:
 
 http://comments.gmane.org/gmane.linux.ports.arm.omap/69560
 
 For discussion on the linux-omap list.
 
 Philip
 
FYI: included in meta-gumstix today

Andreas
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Re: [U-Boot] [PATCH v2 0/6] overo: add SPL support

2012-01-13 Thread Andreas Müller 
On Tuesday, January 03, 2012 05:23:34 PM Tom Rini tom.r...@gmail.com wrote:
 On Thu, Dec 22, 2011 at 4:04 AM, Andreas Müller schnitzelt...@gmx.de wrote:
  I manually sent this series to Steve as suggested in review by Tom
 
 Parts 1 to 5 are fine and I've sent my comments on 6, thanks!
Tom,

1-5: Can you take them in - or is there meanwhile a rebase required?
6. What do you think of the modification for omap_rev_string()?
7. (was 6. in V1 - your response). Needs rework: For boards revision 1 the 
SDRAM 
timing seems to cause trouble when running GUI @ 720MHz! I tested only boot 
into 
console. I will check this during weekend.

Andreas
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Re: [U-Boot] [PATCH] omap: mmc: Raise timeout value to 20ms

2012-01-11 Thread Andreas Müller 
On Wednesday, January 04, 2012 01:22:29 AM Peter Bigot bigotp at acm.org 
wrote:
 I got this to work with two changes:
 
 * s/MMC_TIMEOUT_USEC/MMC_TIMEOUT_MSEC/g and define MMC_TIMEOUT_MSEC
 20, since get_timer does operate on msec in the current meta-ti
 BeagleBoard-xM
 
 * The patch below, which is what I think fixes the real problem (that
 PSTATE.CMDI is still lit up when the function is entered).
 
 diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
 index c38b9e6..62b659a 100644
 --- a/drivers/mmc/omap_hsmmc.c
 +++ b/drivers/mmc/omap_hsmmc.c
 @@ -198,7 +198,8 @@ static int mmc_send_cmd(struct mmc *mmc, struct
 mmc_cmd *cmd,
 ulong start;
 
 start = get_timer(0);
 -   while ((readl(mmc_base-pstate)  DATI_MASK) == DATI_CMDDIS) {
 +#define CMDI_MASK  (0x1  0)
 +   while ((readl(mmc_base-pstate)  (DATI_MASK | CMDI_MASK))) {
 if (get_timer(0) - start  MAX_RETRY_MS) {
 printf(%s: timedout waiting for cmddis!\n,
 __func__); return TIMEOUT;
 
 Peter
I tested this with success and I think this is the correct solution. 
Peter: can you send a proper patch for this?

Andreas
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Re: [U-Boot] [PATCH] omap: mmc: Raise timeout value to 20ms

2012-01-04 Thread Andreas Müller 
On Wednesday, January 04, 2012 01:22:29 AM you wrote:
 On Tue, Jan 3, 2012 at 2:50 PM, Peter Bigot big...@acm.org wrote:
  On Tue, Jan 3, 2012 at 2:24 PM, Tom Rini tr...@ti.com wrote:
  With certain SD cards the code detects a timeout when the hardware
  has not timed out.  We change the timeout used to match the kernel
  which gives software 20ms to detect a timeout.  We also define to
  match the kernel and expand the previously incorrect comment.
  Finally, we let get_timer() perform subtraction for us as it offers.
  
  This doesn't work for me with the SanDisk 4GB card on the
  BeagleBoard-xM.  I updated the recipe to remove Andreas' original
  patch, substituted the new one, and I get the following, which is the
  behavior before I used Andreas' patch except that now it takes about
  20 seconds for each timeout message to print.
(*)
 
 I got this to work with two changes:
 
 * s/MMC_TIMEOUT_USEC/MMC_TIMEOUT_MSEC/g and define MMC_TIMEOUT_MSEC
 20, since get_timer does operate on msec in the current meta-ti
 BeagleBoard-xM
 
 * The patch below, which is what I think fixes the real problem (that
 PSTATE.CMDI is still lit up when the function is entered).
 
 diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
 index c38b9e6..62b659a 100644
 --- a/drivers/mmc/omap_hsmmc.c
 +++ b/drivers/mmc/omap_hsmmc.c
 @@ -198,7 +198,8 @@ static int mmc_send_cmd(struct mmc *mmc, struct
 mmc_cmd *cmd,
 ulong start;
 
 start = get_timer(0);
 -   while ((readl(mmc_base-pstate)  DATI_MASK) == DATI_CMDDIS) {
 +#define CMDI_MASK  (0x1  0)
 +   while ((readl(mmc_base-pstate)  (DATI_MASK | CMDI_MASK))) {
 if (get_timer(0) - start  MAX_RETRY_MS) {
 printf(%s: timedout waiting for cmddis!\n,
 __func__); return TIMEOUT;
 
 Peter
Without having tested (have the hardware causing errors on monday next week): 
This version seems correct direction: We need to wait longer _before_ write 
action otherwise it is never finished - see (*). I am not an expert here but 
since this patch affects all mmc_cmds: Does this reduce performance?

Andreas
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[U-Boot] [PATCH v3 0/7] overo: add SPL support

2012-01-04 Thread Andreas Müller 
V1 - V2
* cleanups: replace printf with one argument by puts [1-2]
* cleanups: remove unused macros and macro values / tabbing / remove FSF 
address [3]
* i2c: move all local variables to SRAM [4]
* OMAP SPL: call timer_init in s_init to make udelay work earlier [5]
* hint CONFIG_SYS_TEXT_BASE changed in commit message [6]
* remove log 'Texas Instruments Revision detection unimplemented' for overo [6]
* remove unintended whitespaces [6]
* send 'shut up' to TWL4030 to avoid corruption when reading board revision [6]
* use macros for overo revisions [6]
* don't separate SPL specific configurations [6]

V2 - V3
* modify omap_rev_string [6]
* CONFIG_SYS_TEXT_BASE back to 0x80008000 [7]
* modify CONFIG_SYS_SPL_MALLOC_START / CONFIG_SYS_SPL_MALLOC_SIZE / 
  CONFIG_SPL_BSS_START_ADDR to avoid conflicts with CONFIG_SYS_TEXT_BASE [7]

Andreas Müller (7):
  drivers/i2c/omap24xx_i2c.c: replace printf with one argument by puts
  board/overo/overo.c: replace printf with one argument by puts
  include/configs/omap3_overo.h: several cleanups
  drivers/i2c/omap24xx_i2c.c: move all local variables to SRAM
  OMAP SPL: call timer_init in s_init to make udelay work earlier
  omap_rev_string: output to stdout
  overo: add SPL support

 arch/arm/cpu/armv7/omap-common/hwinit-common.c |   10 +-
 arch/arm/cpu/armv7/omap-common/spl.c   |   12 +--
 arch/arm/cpu/armv7/omap3/board.c   |2 +
 arch/arm/include/asm/arch-omap3/mem.h  |   26 +
 arch/arm/include/asm/arch-omap4/sys_proto.h|2 +-
 arch/arm/include/asm/arch-omap5/sys_proto.h|2 +-
 arch/arm/include/asm/omap_common.h |2 +-
 board/overo/config.mk  |   28 --
 board/overo/overo.c|   79 ++--
 board/overo/overo.h|9 ++
 drivers/i2c/omap24xx_i2c.c |   25 +++--
 include/configs/omap3_overo.h  |  121 
 12 files changed, 217 insertions(+), 101 deletions(-)
 delete mode 100644 board/overo/config.mk

-- 
1.7.4.4

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[U-Boot] [PATCH v3 1/7] drivers/i2c/omap24xx_i2c.c: replace printf with one argument by puts

2012-01-04 Thread Andreas Müller 
Signed-off-by: Andreas Müller schnitzelt...@gmx.de
---
 drivers/i2c/omap24xx_i2c.c |   12 ++--
 1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index 4ae237a..271ed60 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -73,7 +73,7 @@ void i2c_init(int speed, int slaveadd)
fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM;
if (((fsscll  0) || (fssclh  0)) ||
((fsscll  255) || (fssclh  255))) {
-   printf(Error : I2C initializing first phase clock\n);
+   puts(Error : I2C initializing first phase clock\n);
return;
}
 
@@ -84,7 +84,7 @@ void i2c_init(int speed, int slaveadd)
hssclh -= I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM;
if (((fsscll  0) || (fssclh  0)) ||
((fsscll  255) || (fssclh  255))) {
-   printf(Error : I2C initializing second phase clock\n);
+   puts(Error : I2C initializing second phase clock\n);
return;
}
 
@@ -99,7 +99,7 @@ void i2c_init(int speed, int slaveadd)
fssclh -= I2C_FASTSPEED_SCLH_TRIM;
if (((fsscll  0) || (fssclh  0)) ||
((fsscll  255) || (fssclh  255))) {
-   printf(Error : I2C initializing clock\n);
+   puts(Error : I2C initializing clock\n);
return;
}
 
@@ -118,7 +118,7 @@ void i2c_init(int speed, int slaveadd)
writew(I2C_CON_EN, i2c_base-con);
while (!(readw(i2c_base-syss)  I2C_SYSS_RDONE)  timeout--) {
if (timeout = 0) {
-   printf(ERROR: Timeout in soft-reset\n);
+   puts(ERROR: Timeout in soft-reset\n);
return;
}
udelay(1000);
@@ -284,13 +284,13 @@ int i2c_read(uchar chip, uint addr, int alen, uchar 
*buffer, int len)
}
 
if (addr + len  256) {
-   printf(I2C read: address out of range\n);
+   puts(I2C read: address out of range\n);
return 1;
}
 
for (i = 0; i  len; i++) {
if (i2c_read_byte(chip, addr + i, buffer[i])) {
-   printf(I2C read: I/O error\n);
+   puts(I2C read: I/O error\n);
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
return 1;
}
-- 
1.7.4.4

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[U-Boot] [PATCH v3 3/7] include/configs/omap3_overo.h: several cleanups

2012-01-04 Thread Andreas Müller 
* remove unused macros
* remove unused macro values
* align tabs
* remove Free Software Foundation address

Signed-off-by: Andreas Müller schnitzelt...@gmx.de
---
 include/configs/omap3_overo.h |   69 ++--
 1 files changed, 31 insertions(+), 38 deletions(-)

diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 79eb466..8f2e69d 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * Foundation, Inc.
  */
 
 #ifndef __CONFIG_H
@@ -23,41 +22,41 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_OMAP1   /* in a TI OMAP core */
-#define CONFIG_OMAP34XX1   /* which is a 34XX */
-#define CONFIG_OMAP3_OVERO 1   /* working with overo */
+#define CONFIG_OMAP/* in a TI OMAP core */
+#define CONFIG_OMAP34XX/* which is a 34XX */
+#define CONFIG_OMAP3_OVERO /* working with overo */
 
-#define CONFIG_SDRC/* The chip has SDRC controller */
+#define CONFIG_SDRC/* The chip has SDRC controller 
*/
 
-#include asm/arch/cpu.h  /* get chip and board defs */
+#include asm/arch/cpu.h  /* get chip and board defs */
 #include asm/arch/omap3.h
 
 /*
  * Display CPU and Board information
  */
-#define CONFIG_DISPLAY_CPUINFO 1
-#define CONFIG_DISPLAY_BOARDINFO   1
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
 
 /* Clock Defines */
 #define V_OSCK 2600/* Clock output from T2 */
 #define V_SCLK (V_OSCK  1)
 
-#undef CONFIG_USE_IRQ  /* no support for IRQs */
+#undef CONFIG_USE_IRQ  /* no support for IRQs */
 #define CONFIG_MISC_INIT_R
 
-#define CONFIG_CMDLINE_TAG 1   /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS   1
-#define CONFIG_INITRD_TAG  1
-#define CONFIG_REVISION_TAG1
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
 
-#define CONFIG_OF_LIBFDT   1
+#define CONFIG_OF_LIBFDT
 
 /*
  * Size of malloc() pool
  */
-#define CONFIG_ENV_SIZE(128  10) /* 128 KiB */
+#define CONFIG_ENV_SIZE(128  10) /* 128 KiB */
/* Sector */
-#define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + (128  10))
+#define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + (128  10))
 
 /*
  * Hardware drivers
@@ -66,7 +65,7 @@
 /*
  * NS16550 Configuration
  */
-#define V_NS16550_CLK  4800/* 48MHz (APLL96/2) */
+#define V_NS16550_CLK  4800/* 48MHz (APLL96/2) */
 
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
@@ -85,13 +84,10 @@
 #define CONFIG_BAUDRATE115200
 #define CONFIG_SYS_BAUDRATE_TABLE  {4800, 9600, 19200, 38400, 57600, \
115200}
-#define CONFIG_GENERIC_MMC 1
-#define CONFIG_MMC 1
-#define CONFIG_OMAP_HSMMC  1
-#define CONFIG_DOS_PARTITION   1
-
-/* DDR - I use Micron DDR */
-#define CONFIG_OMAP3_MICRON_DDR1
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC
+#define CONFIG_OMAP_HSMMC
+#define CONFIG_DOS_PARTITION
 
 /* commands to include */
 #include config_cmd_default.h
@@ -113,31 +109,29 @@
 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot*/
 
 #define CONFIG_SYS_NO_FLASH
-#define CONFIG_HARD_I2C1
+#define CONFIG_HARD_I2C
 #define CONFIG_SYS_I2C_SPEED   10
 #define CONFIG_SYS_I2C_SLAVE   1
-#define CONFIG_SYS_I2C_BUS 0
-#define CONFIG_SYS_I2C_BUS_SELECT  1
-#define CONFIG_I2C_MULTI_BUS   1
-#define CONFIG_DRIVER_OMAP34XX_I2C 1
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_DRIVER_OMAP34XX_I2C
 
 /*
  * TWL4030
  */
-#define CONFIG_TWL4030_POWER   1
-#define CONFIG_TWL4030_LED 1
+#define CONFIG_TWL4030_POWER
+#define CONFIG_TWL4030_LED
 
 /*
  * Board NAND Info.
  */
-#define CONFIG_SYS_NAND_QUIET_TEST 1
+#define CONFIG_SYS_NAND_QUIET_TEST
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_NAND_ADDR   NAND_BASE   /* physical address */
/* to access nand */
 #define CONFIG_SYS_NAND_BASE   NAND_BASE   /* physical address */
/* to access nand */
/* at CS0 */
-#define

[U-Boot] [PATCH v3 2/7] board/overo/overo.c: replace printf with one argument by puts

2012-01-04 Thread Andreas Müller 
Signed-off-by: Andreas Müller schnitzelt...@gmx.de
---
 board/overo/overo.c |   14 +++---
 1 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/board/overo/overo.c b/board/overo/overo.c
index 3c60b06..4a20c7f 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -119,7 +119,7 @@ int get_board_revision(void)
   gpio_get_value(113)  1 |
   gpio_get_value(112);
} else {
-   printf(Error: unable to acquire board revision GPIOs\n);
+   puts(Error: unable to acquire board revision GPIOs\n);
revision = -1;
}
 
@@ -151,7 +151,7 @@ int get_sdio2_config(void)
 
gpio_direction_input(130);
} else {
-   printf(Error: unable to acquire sdio2 clk GPIOs\n);
+   puts(Error: unable to acquire sdio2 clk GPIOs\n);
sdio_direct = -1;
}
 
@@ -200,15 +200,15 @@ int misc_init_r(void)
 
switch (get_sdio2_config()) {
case 0:
-   printf(Tranceiver detected on mmc2\n);
+   puts(Tranceiver detected on mmc2\n);
MUX_OVERO_SDIO2_TRANSCEIVER();
break;
case 1:
-   printf(Direct connection on mmc2\n);
+   puts(Direct connection on mmc2\n);
MUX_OVERO_SDIO2_DIRECT();
break;
default:
-   printf(Unable to detect mmc2 connection type\n);
+   puts(Unable to detect mmc2 connection type\n);
}
 
switch (get_expansion_id()) {
@@ -269,10 +269,10 @@ int misc_init_r(void)
setenv(defaultdisplay, dvi);
break;
case GUMSTIX_NO_EEPROM:
-   printf(No EEPROM on expansion board\n);
+   puts(No EEPROM on expansion board\n);
break;
default:
-   printf(Unrecognized expansion board\n);
+   puts(Unrecognized expansion board\n);
}
 
if (expansion_config.content == 1)
-- 
1.7.4.4

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[U-Boot] [PATCH v3 4/7] drivers/i2c/omap24xx_i2c.c: move all local variables to SRAM

2012-01-04 Thread Andreas Müller 
At old overo boards TWL4030 RTC irq is connected to gpio112. Unfortunately
this pin is also used for revision detection. Therefore we need to send
shut-up to TWL4030 to avoid reading wrong revision. In SPL this must
be done before SDRAM is set up because the type of SDRAM is revision dependent.
By this patch it is ensured that all variables used by omap24xx_i2c.c are
located in SRAM.

Signed-off-by: Andreas Müller schnitzelt...@gmx.de
---
 drivers/i2c/omap24xx_i2c.c |   13 +
 1 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index 271ed60..44290b4 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -35,10 +35,15 @@ static void wait_for_bb(void);
 static u16 wait_for_pin(void);
 static void flush_fifo(void);
 
-static struct i2c *i2c_base = (struct i2c *)I2C_DEFAULT_BASE;
-
-static unsigned int bus_initialized[I2C_BUS_MAX];
-static unsigned int current_bus;
+/*
+ * For SPL boot some boards need i2c before SDRAM is initialised so force
+ * variables to live in SRAM
+ */
+static struct i2c __attribute__ ((section (.data))) *i2c_base =
+   (struct i2c *)I2C_DEFAULT_BASE;
+static unsigned int __attribute__ ((section (.data))) 
bus_initialized[I2C_BUS_MAX] =
+   { [0 ... (I2C_BUS_MAX-1)] = 0 };
+static unsigned int __attribute__ ((section (.data))) current_bus = 0;
 
 void i2c_init(int speed, int slaveadd)
 {
-- 
1.7.4.4

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[U-Boot] [PATCH v3 5/7] OMAP SPL: call timer_init in s_init to make udelay work earlier

2012-01-04 Thread Andreas Müller 
Signed-off-by: Andreas Müller schnitzelt...@gmx.de
---
 arch/arm/cpu/armv7/omap-common/spl.c |2 --
 arch/arm/cpu/armv7/omap3/board.c |2 ++
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap-common/spl.c 
b/arch/arm/cpu/armv7/omap-common/spl.c
index 9c35a09..74fea4f 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -115,8 +115,6 @@ void board_init_r(gd_t *id, ulong dummy)
mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
CONFIG_SYS_SPL_MALLOC_SIZE);
 
-   timer_init();
-
 #ifdef CONFIG_SPL_BOARD_INIT
spl_board_init();
 #endif
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 1f33c63..871aa37 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -230,6 +230,8 @@ void s_init(void)
 
 #ifdef CONFIG_SPL_BUILD
preloader_console_init();
+
+   timer_init();
 #endif
 
if (!in_sdram)
-- 
1.7.4.4

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[U-Boot] [PATCH v3 6/7] omap_rev_string: output to stdout

2012-01-04 Thread Andreas Müller 
* avoid potential buffer overflows
* allow SPL-build not to output Texas Instruments Revision detection 
unimplemented

Signed-off-by: Andreas Müller schnitzelt...@gmx.de
---
 arch/arm/cpu/armv7/omap-common/hwinit-common.c |   10 --
 arch/arm/cpu/armv7/omap-common/spl.c   |   10 --
 arch/arm/include/asm/arch-omap4/sys_proto.h|2 +-
 arch/arm/include/asm/arch-omap5/sys_proto.h|2 +-
 arch/arm/include/asm/omap_common.h |2 +-
 5 files changed, 11 insertions(+), 15 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c 
b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
index f65705d..90ec44d 100644
--- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c
+++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
@@ -104,14 +104,14 @@ u32 cortex_rev(void)
return rev;
 }
 
-void omap_rev_string(char *omap_rev_string)
+void omap_rev_string()
 {
u32 omap_rev = omap_revision();
u32 omap_variant = (omap_rev  0x)  16;
u32 major_rev = (omap_rev  0x0F00)  8;
u32 minor_rev = (omap_rev  0x00F0)  4;
 
-   sprintf(omap_rev_string, OMAP%x ES%x.%x, omap_variant, major_rev,
+   printf(OMAP%x ES%x.%x\n, omap_variant, major_rev,
minor_rev);
 }
 
@@ -251,10 +251,8 @@ u32 get_device_type(void)
  */
 int print_cpuinfo(void)
 {
-   char rev_string_buffer[50];
-
-   omap_rev_string(rev_string_buffer);
-   printf(CPU  : %s\n, rev_string_buffer);
+   puts(CPU  : );
+   omap_rev_string();
 
return 0;
 }
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c 
b/arch/arm/cpu/armv7/omap-common/spl.c
index 74fea4f..fdce2dc 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -154,7 +154,6 @@ void board_init_r(gd_t *id, ulong dummy)
 void preloader_console_init(void)
 {
const char *u_boot_rev = U_BOOT_VERSION;
-   char rev_string_buffer[50];
 
gd = gdata;
gd-bd = bdata;
@@ -170,14 +169,13 @@ void preloader_console_init(void)
 
printf(\nU-Boot SPL %s (%s - %s)\n, u_boot_rev, U_BOOT_DATE,
U_BOOT_TIME);
-   omap_rev_string(rev_string_buffer);
-   printf(Texas Instruments %s\n, rev_string_buffer);
+   omap_rev_string();
 }
 
-void __omap_rev_string(char *str)
+void __omap_rev_string()
 {
-   sprintf(str, Revision detection unimplemented);
+   printf(Texas Instruments Revision detection unimplemented\n);
 }
 
-void omap_rev_string(char *str)
+void omap_rev_string()
__attribute__((weak, alias(__omap_rev_string)));
diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h 
b/arch/arm/include/asm/arch-omap4/sys_proto.h
index 4146e21..7386adf 100644
--- a/arch/arm/include/asm/arch-omap4/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap4/sys_proto.h
@@ -42,7 +42,7 @@ void sr32(void *, u32, u32, u32);
 u32 wait_on_value(u32, u32, void *, u32);
 void sdelay(unsigned long);
 void set_pl310_ctrl_reg(u32 val);
-void omap_rev_string(char *omap_rev_string);
+void omap_rev_string();
 void setup_clocks_for_console(void);
 void prcm_init(void);
 void bypass_dpll(u32 *const base);
diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h 
b/arch/arm/include/asm/arch-omap5/sys_proto.h
index c31e18c..fd1ba39 100644
--- a/arch/arm/include/asm/arch-omap5/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap5/sys_proto.h
@@ -42,7 +42,7 @@ void set_muxconf_regs_non_essential(void);
 void sr32(void *, u32, u32, u32);
 u32 wait_on_value(u32, u32, void *, u32);
 void sdelay(unsigned long);
-void omap_rev_string(char *omap_rev_string);
+void omap_rev_string();
 void setup_clocks_for_console(void);
 void prcm_init(void);
 void bypass_dpll(u32 *const base);
diff --git a/arch/arm/include/asm/omap_common.h 
b/arch/arm/include/asm/omap_common.h
index 1ec651b..7e92ef2 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -86,7 +86,7 @@ u32 omap_boot_mode(void);
 
 /* SPL common function s*/
 void spl_parse_image_header(const struct image_header *header);
-void omap_rev_string(char *omap_rev_string);
+void omap_rev_string();
 
 /* NAND SPL functions */
 void spl_nand_load_image(void);
-- 
1.7.4.4

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[U-Boot] [PATCH v3 7/7] overo: add SPL support

2012-01-04 Thread Andreas Müller 
* implementation based on ti beagleboard/omap3evm
* timing data and i2c workaround for revision 0 boards taken from x-loader
* run-tested with overo revision 0 and 1 / boot from NAND and SDcard
* run-tested with x-loader

Signed-off-by: Andreas Müller schnitzelt...@gmx.de
---
 arch/arm/include/asm/arch-omap3/mem.h |   26 +
 board/overo/config.mk |   28 --
 board/overo/overo.c   |   65 -
 board/overo/overo.h   |9 +
 include/configs/omap3_overo.h |   52 ++
 5 files changed, 151 insertions(+), 29 deletions(-)
 delete mode 100644 board/overo/config.mk

diff --git a/arch/arm/include/asm/arch-omap3/mem.h 
b/arch/arm/include/asm/arch-omap3/mem.h
index 5fd02d4..4ca929e 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -123,6 +123,32 @@ enum {
V_MCFG_BANKALLOCATION_RBC | \
V_MCFG_B32NOT16_32 | V_MCFG_DEEPPD_EN | V_MCFG_RAMTYPE_DDR
 
+/* Hynix part of Overo (165MHz optimized) 6.06ns */
+#define HYNIX_TDAL_165   6
+#define HYNIX_TDPL_165   3
+#define HYNIX_TRRD_165   2
+#define HYNIX_TRCD_165   3
+#define HYNIX_TRP_1653
+#define HYNIX_TRAS_165   7
+#define HYNIX_TRC_165   10
+#define HYNIX_TRFC_165  21
+#define HYNIX_V_ACTIMA_165 \
+   ACTIM_CTRLA(HYNIX_TRFC_165, HYNIX_TRC_165,  \
+   HYNIX_TRAS_165, HYNIX_TRP_165,  \
+   HYNIX_TRCD_165, HYNIX_TRRD_165, \
+   HYNIX_TDPL_165, HYNIX_TDAL_165)
+
+#define HYNIX_TWTR_165   1
+#define HYNIX_TCKE_165   1
+#define HYNIX_TXP_1652
+#define HYNIX_XSR_16524
+#define HYNIX_V_ACTIMB_165 \
+   ACTIM_CTRLB(HYNIX_TWTR_165, HYNIX_TCKE_165, \
+   HYNIX_TXP_165, HYNIX_XSR_165)
+
+#define HYNIX_RASWIDTH_165 0x2
+#define HYNIX_V_MCFG_165(size) MCFG((size), HYNIX_RASWIDTH_165)
+
 /* Hynix part of AM/DM37xEVM (200MHz optimized) */
 #define HYNIX_TDAL_200 6
 #define HYNIX_TDPL_200 3
diff --git a/board/overo/config.mk b/board/overo/config.mk
deleted file mode 100644
index e7c471c..000
--- a/board/overo/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# Overo uses OMAP3 (ARM-CortexA8) cpu
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-# Physical Address:
-# 8000' (bank0)
-# A000/ (bank1)
-# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
-# (mem base + reserved)
-
-CONFIG_SYS_TEXT_BASE = 0x80008000
diff --git a/board/overo/overo.c b/board/overo/overo.c
index 4a20c7f..2534e47 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -31,6 +31,7 @@
 #include common.h
 #include netdev.h
 #include twl4030.h
+#include linux/mtd/nand.h
 #include asm/io.h
 #include asm/arch/mmc_host_def.h
 #include asm/arch/mux.h
@@ -100,6 +101,16 @@ int board_init(void)
 }
 
 /*
+ * Routine: omap_rev_string
+ * Description: For SPL builds output board rev
+ */
+#ifdef CONFIG_SPL_BUILD
+void omap_rev_string()
+{
+}
+#endif
+
+/*
  * Routine: get_board_revision
  * Description: Returns the board revision
  */
@@ -107,6 +118,20 @@ int get_board_revision(void)
 {
int revision;
 
+#ifdef CONFIG_DRIVER_OMAP34XX_I2C
+   unsigned char data;
+
+   /* board revisions = R2410 connect 4030 irq_1 to gpio112 */
+   /* these boards should return a revision number of 0  */
+   /* the code below forces a 4030 RTC irq to ensure that gpio112 is low */
+   i2c_set_bus_num(TWL4030_I2C_BUS);
+   data = 0x01;
+   i2c_write(0x4B, 0x29, 1, data, 1);
+   data = 0x0c;
+   i2c_write(0x4B, 0x2b, 1, data, 1);
+   i2c_read(0x4B, 0x2a, 1, data, 1);
+#endif
+
if (!gpio_request(112, ) 
!gpio_request(113, ) 
!gpio_request(115, )) {
@@ -126,6 +151,44 @@ int get_board_revision(void)
return revision;
 }
 
+#ifdef CONFIG_SPL_BUILD
+/*
+ * Routine: get_board_mem_timings
+ * Description: If we use SPL then there is no x-loader nor config header
+ * so we have to setup the DDR timings ourself on both banks.
+ */
+void get_board_mem_timings(u32 *mcfg, u32 *ctrla

[U-Boot] [PATCH] OMAP MMC: Add delay before waiting for status

2011-12-22 Thread Andreas Müller 
Loading kernel from MMC created the following error message reproducable:

| reading uImage
| mmc_send_cmd: timedout waiting for stat!
|
| 2860468 bytes read

Tested on overo with OMAP3530:
* OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 720 mHz
  Die ID #470e0004040398d31402100c
* OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 600 mHz
  Die ID #112404035c140101b011

Signed-off-by: Andreas Müller schnitzelt...@gmx.de
---
 drivers/mmc/omap_hsmmc.c |4 
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index c38b9e6..ac91e5d 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -197,6 +197,10 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd 
*cmd,
unsigned int flags, mmc_stat;
ulong start;
 
+   /* Delay added before checking the status */
+   if (cmd-cmdidx == MMC_CMD_SEND_STATUS)
+   udelay(1); /* wait 1 us */
+
start = get_timer(0);
while ((readl(mmc_base-pstate)  DATI_MASK) == DATI_CMDDIS) {
if (get_timer(0) - start  MAX_RETRY_MS) {
-- 
1.7.6.4

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[U-Boot] [PATCH v2 1/6] drivers/i2c/omap24xx_i2c.c: replace printf with one argument by puts

2011-12-22 Thread Andreas Müller 
Signed-off-by: Andreas Müller schnitzelt...@gmx.de
---
 drivers/i2c/omap24xx_i2c.c |   12 ++--
 1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index 4ae237a..271ed60 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -73,7 +73,7 @@ void i2c_init(int speed, int slaveadd)
fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM;
if (((fsscll  0) || (fssclh  0)) ||
((fsscll  255) || (fssclh  255))) {
-   printf(Error : I2C initializing first phase clock\n);
+   puts(Error : I2C initializing first phase clock\n);
return;
}
 
@@ -84,7 +84,7 @@ void i2c_init(int speed, int slaveadd)
hssclh -= I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM;
if (((fsscll  0) || (fssclh  0)) ||
((fsscll  255) || (fssclh  255))) {
-   printf(Error : I2C initializing second phase clock\n);
+   puts(Error : I2C initializing second phase clock\n);
return;
}
 
@@ -99,7 +99,7 @@ void i2c_init(int speed, int slaveadd)
fssclh -= I2C_FASTSPEED_SCLH_TRIM;
if (((fsscll  0) || (fssclh  0)) ||
((fsscll  255) || (fssclh  255))) {
-   printf(Error : I2C initializing clock\n);
+   puts(Error : I2C initializing clock\n);
return;
}
 
@@ -118,7 +118,7 @@ void i2c_init(int speed, int slaveadd)
writew(I2C_CON_EN, i2c_base-con);
while (!(readw(i2c_base-syss)  I2C_SYSS_RDONE)  timeout--) {
if (timeout = 0) {
-   printf(ERROR: Timeout in soft-reset\n);
+   puts(ERROR: Timeout in soft-reset\n);
return;
}
udelay(1000);
@@ -284,13 +284,13 @@ int i2c_read(uchar chip, uint addr, int alen, uchar 
*buffer, int len)
}
 
if (addr + len  256) {
-   printf(I2C read: address out of range\n);
+   puts(I2C read: address out of range\n);
return 1;
}
 
for (i = 0; i  len; i++) {
if (i2c_read_byte(chip, addr + i, buffer[i])) {
-   printf(I2C read: I/O error\n);
+   puts(I2C read: I/O error\n);
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
return 1;
}
-- 
1.7.6.4

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[U-Boot] [PATCH v2 0/6] overo: add SPL support

2011-12-22 Thread Andreas Müller 
V1 - V2
* cleanups: replace printf with one argument by puts [1-2]
* cleanups: remove unused macros and macro values / tabbing / remove FSF 
address [3]
* i2c: move all local variables to SRAM [4]
* OMAP SPL: call timer_init in s_init to make udelay work earlier [5]
* hint CONFIG_SYS_TEXT_BASE changed in commit message [6]
* remove log 'Texas Instruments Revision detection unimplemented' for overo [6]
* remove unintended whitespaces [6]
* send 'shut up' to TWL4030 to avoid corruption when reading board revision [6]
* use macros for overo revisions [6]
* don't separate SPL specific configurations [6]

Andreas Müller (6):
  drivers/i2c/omap24xx_i2c.c: replace printf with one argument by puts
  board/overo/overo.c: replace printf with one argument by puts
  include/configs/omap3_overo.h: several cleanups
  drivers/i2c/omap24xx_i2c.c: move all local variables to SRAM
  OMAP SPL: call timer_init in s_init to make udelay work earlier
  overo: add SPL support / CONFIG_SYS_TEXT_BASE changed to 0x8010

 arch/arm/cpu/armv7/omap-common/spl.c  |6 +-
 arch/arm/cpu/armv7/omap3/board.c  |2 +
 arch/arm/include/asm/arch-omap3/mem.h |   26 +++
 board/overo/config.mk |   28 
 board/overo/overo.c   |   69 --
 board/overo/overo.h   |5 ++
 drivers/i2c/omap24xx_i2c.c|   25 ---
 include/configs/omap3_overo.h |  122 ++--
 8 files changed, 197 insertions(+), 86 deletions(-)
 delete mode 100644 board/overo/config.mk

-- 
1.7.6.4

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[U-Boot] [PATCH v2 3/6] include/configs/omap3_overo.h: several cleanups

2011-12-22 Thread Andreas Müller 
* remove unused macros
* remove unused macro values
* align tabs
* remove Free Software Foundation address

Signed-off-by: Andreas Müller schnitzelt...@gmx.de
---
 include/configs/omap3_overo.h |   69 ++--
 1 files changed, 31 insertions(+), 38 deletions(-)

diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 79eb466..8f2e69d 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * Foundation, Inc.
  */
 
 #ifndef __CONFIG_H
@@ -23,41 +22,41 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_OMAP1   /* in a TI OMAP core */
-#define CONFIG_OMAP34XX1   /* which is a 34XX */
-#define CONFIG_OMAP3_OVERO 1   /* working with overo */
+#define CONFIG_OMAP/* in a TI OMAP core */
+#define CONFIG_OMAP34XX/* which is a 34XX */
+#define CONFIG_OMAP3_OVERO /* working with overo */
 
-#define CONFIG_SDRC/* The chip has SDRC controller */
+#define CONFIG_SDRC/* The chip has SDRC controller 
*/
 
-#include asm/arch/cpu.h  /* get chip and board defs */
+#include asm/arch/cpu.h  /* get chip and board defs */
 #include asm/arch/omap3.h
 
 /*
  * Display CPU and Board information
  */
-#define CONFIG_DISPLAY_CPUINFO 1
-#define CONFIG_DISPLAY_BOARDINFO   1
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
 
 /* Clock Defines */
 #define V_OSCK 2600/* Clock output from T2 */
 #define V_SCLK (V_OSCK  1)
 
-#undef CONFIG_USE_IRQ  /* no support for IRQs */
+#undef CONFIG_USE_IRQ  /* no support for IRQs */
 #define CONFIG_MISC_INIT_R
 
-#define CONFIG_CMDLINE_TAG 1   /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS   1
-#define CONFIG_INITRD_TAG  1
-#define CONFIG_REVISION_TAG1
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
 
-#define CONFIG_OF_LIBFDT   1
+#define CONFIG_OF_LIBFDT
 
 /*
  * Size of malloc() pool
  */
-#define CONFIG_ENV_SIZE(128  10) /* 128 KiB */
+#define CONFIG_ENV_SIZE(128  10) /* 128 KiB */
/* Sector */
-#define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + (128  10))
+#define CONFIG_SYS_MALLOC_LEN  (CONFIG_ENV_SIZE + (128  10))
 
 /*
  * Hardware drivers
@@ -66,7 +65,7 @@
 /*
  * NS16550 Configuration
  */
-#define V_NS16550_CLK  4800/* 48MHz (APLL96/2) */
+#define V_NS16550_CLK  4800/* 48MHz (APLL96/2) */
 
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
@@ -85,13 +84,10 @@
 #define CONFIG_BAUDRATE115200
 #define CONFIG_SYS_BAUDRATE_TABLE  {4800, 9600, 19200, 38400, 57600, \
115200}
-#define CONFIG_GENERIC_MMC 1
-#define CONFIG_MMC 1
-#define CONFIG_OMAP_HSMMC  1
-#define CONFIG_DOS_PARTITION   1
-
-/* DDR - I use Micron DDR */
-#define CONFIG_OMAP3_MICRON_DDR1
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC
+#define CONFIG_OMAP_HSMMC
+#define CONFIG_DOS_PARTITION
 
 /* commands to include */
 #include config_cmd_default.h
@@ -113,31 +109,29 @@
 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot*/
 
 #define CONFIG_SYS_NO_FLASH
-#define CONFIG_HARD_I2C1
+#define CONFIG_HARD_I2C
 #define CONFIG_SYS_I2C_SPEED   10
 #define CONFIG_SYS_I2C_SLAVE   1
-#define CONFIG_SYS_I2C_BUS 0
-#define CONFIG_SYS_I2C_BUS_SELECT  1
-#define CONFIG_I2C_MULTI_BUS   1
-#define CONFIG_DRIVER_OMAP34XX_I2C 1
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_DRIVER_OMAP34XX_I2C
 
 /*
  * TWL4030
  */
-#define CONFIG_TWL4030_POWER   1
-#define CONFIG_TWL4030_LED 1
+#define CONFIG_TWL4030_POWER
+#define CONFIG_TWL4030_LED
 
 /*
  * Board NAND Info.
  */
-#define CONFIG_SYS_NAND_QUIET_TEST 1
+#define CONFIG_SYS_NAND_QUIET_TEST
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_NAND_ADDR   NAND_BASE   /* physical address */
/* to access nand */
 #define CONFIG_SYS_NAND_BASE   NAND_BASE   /* physical address */
/* to access nand */
/* at CS0 */
-#define

[U-Boot] [PATCH v2 2/6] board/overo/overo.c: replace printf with one argument by puts

2011-12-22 Thread Andreas Müller 
Signed-off-by: Andreas Müller schnitzelt...@gmx.de
---
 board/overo/overo.c |   14 +++---
 1 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/board/overo/overo.c b/board/overo/overo.c
index 3c60b06..4a20c7f 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -119,7 +119,7 @@ int get_board_revision(void)
   gpio_get_value(113)  1 |
   gpio_get_value(112);
} else {
-   printf(Error: unable to acquire board revision GPIOs\n);
+   puts(Error: unable to acquire board revision GPIOs\n);
revision = -1;
}
 
@@ -151,7 +151,7 @@ int get_sdio2_config(void)
 
gpio_direction_input(130);
} else {
-   printf(Error: unable to acquire sdio2 clk GPIOs\n);
+   puts(Error: unable to acquire sdio2 clk GPIOs\n);
sdio_direct = -1;
}
 
@@ -200,15 +200,15 @@ int misc_init_r(void)
 
switch (get_sdio2_config()) {
case 0:
-   printf(Tranceiver detected on mmc2\n);
+   puts(Tranceiver detected on mmc2\n);
MUX_OVERO_SDIO2_TRANSCEIVER();
break;
case 1:
-   printf(Direct connection on mmc2\n);
+   puts(Direct connection on mmc2\n);
MUX_OVERO_SDIO2_DIRECT();
break;
default:
-   printf(Unable to detect mmc2 connection type\n);
+   puts(Unable to detect mmc2 connection type\n);
}
 
switch (get_expansion_id()) {
@@ -269,10 +269,10 @@ int misc_init_r(void)
setenv(defaultdisplay, dvi);
break;
case GUMSTIX_NO_EEPROM:
-   printf(No EEPROM on expansion board\n);
+   puts(No EEPROM on expansion board\n);
break;
default:
-   printf(Unrecognized expansion board\n);
+   puts(Unrecognized expansion board\n);
}
 
if (expansion_config.content == 1)
-- 
1.7.6.4

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[U-Boot] [PATCH v2 5/6] OMAP SPL: call timer_init in s_init to make udelay work earlier

2011-12-22 Thread Andreas Müller 
Signed-off-by: Andreas Müller schnitzelt...@gmx.de
---
 arch/arm/cpu/armv7/omap-common/spl.c |2 --
 arch/arm/cpu/armv7/omap3/board.c |2 ++
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap-common/spl.c 
b/arch/arm/cpu/armv7/omap-common/spl.c
index 9c35a09..74fea4f 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -115,8 +115,6 @@ void board_init_r(gd_t *id, ulong dummy)
mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
CONFIG_SYS_SPL_MALLOC_SIZE);
 
-   timer_init();
-
 #ifdef CONFIG_SPL_BOARD_INIT
spl_board_init();
 #endif
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 1f33c63..871aa37 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -230,6 +230,8 @@ void s_init(void)
 
 #ifdef CONFIG_SPL_BUILD
preloader_console_init();
+
+   timer_init();
 #endif
 
if (!in_sdram)
-- 
1.7.6.4

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[U-Boot] [PATCH v2 4/6] drivers/i2c/omap24xx_i2c.c: move all local variables to SRAM

2011-12-22 Thread Andreas Müller 
At old overo boards TWL4030 RTC irq is connected to gpio112. Unfortunately
this pin is also used for revision detection. Therefore we need to send
shut-up to TWL4030 to avoid reading wrong revision. In SPL this must
be done before SDRAM is set up because the type of SDRAM is revision dependent.
By this patch it is ensured that all variables used by omap24xx_i2c.c are
located in SRAM.

Signed-off-by: Andreas Müller schnitzelt...@gmx.de
---
 drivers/i2c/omap24xx_i2c.c |   13 +
 1 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index 271ed60..44290b4 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -35,10 +35,15 @@ static void wait_for_bb(void);
 static u16 wait_for_pin(void);
 static void flush_fifo(void);
 
-static struct i2c *i2c_base = (struct i2c *)I2C_DEFAULT_BASE;
-
-static unsigned int bus_initialized[I2C_BUS_MAX];
-static unsigned int current_bus;
+/*
+ * For SPL boot some boards need i2c before SDRAM is initialised so force
+ * variables to live in SRAM
+ */
+static struct i2c __attribute__ ((section (.data))) *i2c_base =
+   (struct i2c *)I2C_DEFAULT_BASE;
+static unsigned int __attribute__ ((section (.data))) 
bus_initialized[I2C_BUS_MAX] =
+   { [0 ... (I2C_BUS_MAX-1)] = 0 };
+static unsigned int __attribute__ ((section (.data))) current_bus = 0;
 
 void i2c_init(int speed, int slaveadd)
 {
-- 
1.7.6.4

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[U-Boot] [PATCH v2 6/6] overo: add SPL support / CONFIG_SYS_TEXT_BASE changed to 0x80100000

2011-12-22 Thread Andreas Müller 
* implementation based on ti beagleboard/omap3evm
* timing data and i2c workaround for revision 0 boards taken from x-loader
* run-tested with overo revision 0 and 1 / boot from NAND and SDcard

Signed-off-by: Andreas Müller schnitzelt...@gmx.de
---
 arch/arm/cpu/armv7/omap-common/spl.c  |4 ++
 arch/arm/include/asm/arch-omap3/mem.h |   26 +++
 board/overo/config.mk |   28 -
 board/overo/overo.c   |   55 -
 board/overo/overo.h   |5 +++
 include/configs/omap3_overo.h |   53 +++
 6 files changed, 142 insertions(+), 29 deletions(-)
 delete mode 100644 board/overo/config.mk

diff --git a/arch/arm/cpu/armv7/omap-common/spl.c 
b/arch/arm/cpu/armv7/omap-common/spl.c
index 74fea4f..1220eb5 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -170,10 +170,13 @@ void preloader_console_init(void)
 
printf(\nU-Boot SPL %s (%s - %s)\n, u_boot_rev, U_BOOT_DATE,
U_BOOT_TIME);
+#if !defined(CONFIG_OMAP3_OVERO)
omap_rev_string(rev_string_buffer);
printf(Texas Instruments %s\n, rev_string_buffer);
+#endif
 }
 
+#if !defined(CONFIG_OMAP3_OVERO)
 void __omap_rev_string(char *str)
 {
sprintf(str, Revision detection unimplemented);
@@ -181,3 +184,4 @@ void __omap_rev_string(char *str)
 
 void omap_rev_string(char *str)
__attribute__((weak, alias(__omap_rev_string)));
+#endif
diff --git a/arch/arm/include/asm/arch-omap3/mem.h 
b/arch/arm/include/asm/arch-omap3/mem.h
index 5fd02d4..4ca929e 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -123,6 +123,32 @@ enum {
V_MCFG_BANKALLOCATION_RBC | \
V_MCFG_B32NOT16_32 | V_MCFG_DEEPPD_EN | V_MCFG_RAMTYPE_DDR
 
+/* Hynix part of Overo (165MHz optimized) 6.06ns */
+#define HYNIX_TDAL_165   6
+#define HYNIX_TDPL_165   3
+#define HYNIX_TRRD_165   2
+#define HYNIX_TRCD_165   3
+#define HYNIX_TRP_1653
+#define HYNIX_TRAS_165   7
+#define HYNIX_TRC_165   10
+#define HYNIX_TRFC_165  21
+#define HYNIX_V_ACTIMA_165 \
+   ACTIM_CTRLA(HYNIX_TRFC_165, HYNIX_TRC_165,  \
+   HYNIX_TRAS_165, HYNIX_TRP_165,  \
+   HYNIX_TRCD_165, HYNIX_TRRD_165, \
+   HYNIX_TDPL_165, HYNIX_TDAL_165)
+
+#define HYNIX_TWTR_165   1
+#define HYNIX_TCKE_165   1
+#define HYNIX_TXP_1652
+#define HYNIX_XSR_16524
+#define HYNIX_V_ACTIMB_165 \
+   ACTIM_CTRLB(HYNIX_TWTR_165, HYNIX_TCKE_165, \
+   HYNIX_TXP_165, HYNIX_XSR_165)
+
+#define HYNIX_RASWIDTH_165 0x2
+#define HYNIX_V_MCFG_165(size) MCFG((size), HYNIX_RASWIDTH_165)
+
 /* Hynix part of AM/DM37xEVM (200MHz optimized) */
 #define HYNIX_TDAL_200 6
 #define HYNIX_TDPL_200 3
diff --git a/board/overo/config.mk b/board/overo/config.mk
deleted file mode 100644
index e7c471c..000
--- a/board/overo/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# Overo uses OMAP3 (ARM-CortexA8) cpu
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-# Physical Address:
-# 8000' (bank0)
-# A000/ (bank1)
-# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
-# (mem base + reserved)
-
-CONFIG_SYS_TEXT_BASE = 0x80008000
diff --git a/board/overo/overo.c b/board/overo/overo.c
index 4a20c7f..5583f98 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -31,6 +31,7 @@
 #include common.h
 #include netdev.h
 #include twl4030.h
+#include linux/mtd/nand.h
 #include asm/io.h
 #include asm/arch/mmc_host_def.h
 #include asm/arch/mux.h
@@ -107,6 +108,20 @@ int get_board_revision(void)
 {
int revision;
 
+#ifdef CONFIG_DRIVER_OMAP34XX_I2C
+   unsigned char data;
+
+   /* board revisions = R2410 connect 4030 irq_1 to gpio112 */
+   /* these boards should return a revision number of 0  */
+   /* the code below forces a 4030 RTC irq to ensure that gpio112 is low */
+   i2c_set_bus_num(TWL4030_I2C_BUS);
+   data = 0x01;
+   i2c_write(0x4B, 0x29, 1, data, 1);
+   data

Re: [U-Boot] [PATCH v2 0/6] overo: add SPL support

2011-12-22 Thread Andreas Müller 
I manually sent this series to Steve as suggested in review by Tom

Andreas
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Re: [U-Boot] [PATCH] overo: add SPL support

2011-12-20 Thread Andreas Müller 
On Tuesday, December 20, 2011 12:41:08 PM you wrote:
 Dear Tom Rini,
 
 In message CA+M6bXn_ZBqA8rosE4L4O+4Eu+grAhWgCZ=u=2Nomb6WcyL6-
w...@mail.gmail.com you wrote:
   I guess you really, really must use i2c before relocation? =A0If
   possible, this should be avoided in the first place.
  
  Yes, board rev detection to know how to configure SDRAM.
 
 I don't consider this a valid reason (reading the SPD EEPROM would be
 such a reason).  In almost all other cases it should be suffucient to
 configure the maximum number of memory banks and the maximum size of
 the memory banks and then use get_ram_size() to determine the actual
 amount of memory and to correctly initialize the memory controller.
 
 Note that I don't insist on any changes to existing code here.  This
 is just a recommendation which you may (or may not) consider for any
 future ports / implementations.
 

Dear Wolfgang Denk,
 
I agree to your concerns but - as I understood Steve Sakoman - here the 
situation is slightly different: 
At elder overo boards TWL4030 RTC irq is connected to gpio112. Unfortunately 
this pin is also used for binary revision detection. Therefore we need to send 
'shut-up' to TWL4030 via i2c to avoid reading wrong revision. In SPL this must 
be done *before* SDRAM (timing) is set up, because the type of SDRAM is 
revision dependent.

Hope this helps

Andreas
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Re: [U-Boot] [PATCH] overo: add SPL support

2011-12-20 Thread Andreas Müller 
On Tuesday, December 20, 2011 01:06:07 PM you wrote:
 Dear Andreas,
 
 In message 201112201253.46991.schnitzelt...@gmx.de you wrote:
  I agree to your concerns but - as I understood Steve Sakoman - here the
 
  situation is slightly different:
 I think you misunderstand.
Yes I think too :-)
 
  At elder overo boards TWL4030 RTC irq is connected to gpio112.
  Unfortunately this pin is also used for binary revision detection.
  Therefore we need to send 'shut-up' to TWL4030 via i2c to avoid reading
  wrong revision. In SPL this must be done *before* SDRAM (timing) is set
  up, because the type of SDRAM is revision dependent.
 
 My suggestion was to check if memory initialization can not rather be
 done _without_ reading (and without otherwise knowing) the board type
 or revision.  Usually this is possible, and I always prefer such
 auto-adjusting solutions over hard-wired approaches that break down
 when any of the expected inout data is not correct or not available.
 
Dear Wolfgang,

I don't know if I want to jump also into these changes now - especially since 
I am quite new here..
But for my intererst - since it seems more error tolerant: How is SDRAM timing 
set up without exactly knowing what type is connected? Is there a good example 
implementation in u-boot(-spl)?

Best regards

Andreas
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Re: [U-Boot] [PATCH] overo: add SPL support

2011-12-20 Thread Andreas Müller 
On Tuesday, December 20, 2011 02:55:50 PM you wrote:
 On Tue, Dec 20, 2011 at 4:20 AM, Igor Grinberg grinb...@compulab.co.ilwrote:
  What about forging some very not optimized default DRAM settings,
  that suit any assembled DRAM and then when you have I2C access,
  reconfigure it - is it possible?
 
 The board ID is used to determine some fairly fundamental things like how
 the address bits are multiplexed, bank size, number of banks, and timing.
 
 Perhaps it might be possible to determine some non-optimal settings that
 can work with the current set of POP memories used, and also a scheme to
 modify the above on the fly while executing from said ram, but then one
 would have to revisit this every time a new vendor/type of POP was used.
 
 That seems a lot more complex than the current method.
 
 I suppose we could just drop support for the old boards in u-boot.  Those
 folks could continue to use the current x-load solution. 
I am afraid you are right. It seems that the current U-boot/OMAP/SPL 
environment 
it is not designed to have i2c in early state when SDRAM is set up. 
My experience:
* After moving the i2c variables to SDRAM, i2c_set_bus_num (and thereby 
i2c_init) work but i2c_write hangs when calling udelay because timer is not yet 
running.
* This can be worked around by calling timer_init() within s_init(). With this 
setup booting is possible but I get MMC timeout messages from u-boot although 
kernel is loaded properly.
* I don't know if this is the reason for timeout but I think successful booting 
is just by accident because the register pointer to global data is not yet set 
(i2c and timer use global data). I tried to setup global data earlier but up to 
now without success. Even if successful I think the number of friends for such 
a 
deep change is limited...
Not to be misunderstood: This is no criticism to anybody. The experince that a 
design does not fit for a (corner case) request I have had in several projects 
:)
 Or perhaps someone will come up with a more clever idea!
 
My suggestion: 

* Soon: Clean up the patch already sent as reviewed and leave i2c TWL4030 shut-
up out. As fallback for old boards leave x-load in oe meta-gumstix  (maybe just 
create a different machine configuration).
* Later: Think about a 'more probing' approach as suggested in this thread (or 
a 
combination e.g if revision 1 detected, check size of SDRAM and with the result 
deciding if this is a revision 1/0).

Anyway: The informations regarding SDRAM I copied from x-load. Since this is a 
bit fishing in the dark: Are there documents from gumstix available, describing 
which memories were used (with which revision :) or are these secret IP?

Regards

Andreas
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Re: [U-Boot] [PATCH] overo: add SPL support

2011-12-19 Thread Andreas Müller 
On Thursday, December 15, 2011 10:12:59 PM Andreas Müller wrote:
 On Thu, Dec 15, 2011 at 7:34 AM, Andreas Müller schnitzelt...@gmx.de wrote:
  I tried the following (as you can see I already commented out the
  i2c-read-
 
 write
 
  for test):
  
  int get_board_revision(void)
  {
  #ifdef CONFIG_DRIVER_OMAP34XX_I2C
  
 i2c_set_bus_num(TWL4030_I2C_BUS);
 /*data = 0x01;
 i2c_write(0x4B, 0x29, 1, data, 1);
 data = 0x0c;
 i2c_write(0x4B, 0x2b, 1, data, 1);
 i2c_read(0x4B, 0x2a, 1, data, 1);*/
  
  #endif
  
  }
  
  SPL Boot process hangs on i2c_set_bus_num ( tested by removing
  
  i2c_set_bus_num - proper operation ) with console freeze:
  | U-Boot SPL 2011.12-rc1-4-g06e42c6-dirty (Dec 15 2011 - 14:03:34)
  | Texas Instruments Revision detection unimplemented
  
  The call stack for get_board_revision() is for SPL
  
  s_init()
  mem_init()
  do_sdrc_init(..)
  get_board_mem_timings(..)
  get_board_revision(..)
  
  It seems that the call to i2c_set_bus_num comes too early.
 
 Sorry for spamming but I face black magic:
 
 I added debug messages in omap24xx_i2c.c / i2c_set_bus_num().
 
 * Version 1:
 
 int i2c_set_bus_num(unsigned int bus)
 {
   puts(i2c_set_bus_num called 1\n);
   if ((bus  0) || (bus = I2C_BUS_MAX)) {
   printf(Bad bus: %d\n, bus);
   return -1;
   }
   printf(Bus: %d\n, bus);
 
 #if I2C_BUS_MAX == 3
   if (bus == 2) {
   puts(i2c_set_bus_num called 2\n);
   i2c_base = (struct i2c *)I2C_BASE3;
   puts(i2c_set_bus_num called 3\n);
   }
   else
 #endif
   if (bus == 1) {
   puts(i2c_set_bus_num called 4\n);
   i2c_base = (struct i2c *)I2C_BASE2;
   puts(i2c_set_bus_num called 5\n);
   }
   else {
   puts(i2c_set_bus_num called 6\n);
   i2c_base = (struct i2c *)I2C_BASE1;
   puts(i2c_set_bus_num called 7\n);
   }
 
   puts(i2c_set_bus_num called 8\n);
 --   current_bus = bus;
 
   puts(i2c_set_bus_num called 9\n);
   if (!bus_initialized[current_bus])
   i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 
   return 0;
 }
 
 leads to
 
 i2c_set_bus_num called 1
 Bus: 0
 i2c_set_bus_num called 6
 i2c_set_bus_num called 7
 i2c_set_bus_num called 8
 
 
 * Version 2:
 
 int i2c_set_bus_num(unsigned int bus)
 {
   puts(i2c_set_bus_num called 1\n);
   if ((bus  0) || (bus = I2C_BUS_MAX)) {
   printf(Bad bus: %d\n, bus);
   return -1;
   }
   printf(Bus: %d\n, bus);
 --   printf(CurrentBus: %d\n, current_bus);
   printf(AdrCurrentBus: %X\n, current_bus);
 
 #if I2C_BUS_MAX == 3
   if (bus == 2) {
   puts(i2c_set_bus_num called 2\n);
   i2c_base = (struct i2c *)I2C_BASE3;
   puts(i2c_set_bus_num called 3\n);
   }
   else
 #endif
   if (bus == 1) {
   puts(i2c_set_bus_num called 4\n);
   i2c_base = (struct i2c *)I2C_BASE2;
   puts(i2c_set_bus_num called 5\n);
   }
   else {
   puts(i2c_set_bus_num called 6\n);
   i2c_base = (struct i2c *)I2C_BASE1;
   puts(i2c_set_bus_num called 7\n);
   }
 
   puts(i2c_set_bus_num called 8\n);
   current_bus = bus;
 
   puts(i2c_set_bus_num called 9\n);
   if (!bus_initialized[current_bus])
   i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 
   return 0;
 }
 
 leads to
 
 i2c_set_bus_num called 1
 Bus: 0
 
 
 It seems that accessing 'current_bus' causes trouble. Has anybody an
 explanation for that? I don't think this is related to i2c or overo. For a
 better picture I attached memory mappings.
 
'objdump -dSt' shows (the memory mappings I attached were not really helpful - 
sorry next time I know):

4020ae14 l O .data  0004 i2c_base
8068 l O .bss   0004 current_bus
806c l O .bss   000c bus_initialized

'i2c_base' is correctly located in SRAM but 'current_bus' and 'bus_initialized' 
are located in CS0 SDRAM which is at the time of call not yet initalized. This 
fits to the crash behaviour: Accessing 'i2c_base' does not cause trouble.
How can I move 'current_bus' and 'bus_initialized' to SRAM?

Andreas
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Re: [U-Boot] [PATCH] overo: add SPL support

2011-12-19 Thread Andreas Müller 
On Tuesday, December 20, 2011 02:08:18 AM Tom Rini wrote:
  'objdump -dSt' shows (the memory mappings I attached were not really
  helpful - sorry next time I know):
  
 4020ae14 l O .data  0004 i2c_base
 8068 l O .bss   0004 current_bus
 806c l O .bss   000c bus_initialized
  
  'i2c_base' is correctly located in SRAM but 'current_bus' and
  'bus_initialized' are located in CS0 SDRAM which is at the time of call
  not yet initalized. This fits to the crash behaviour: Accessing
  'i2c_base' does not cause trouble. How can I move 'current_bus' and
  'bus_initialized' to SRAM?
 
 Ah-ha!  Good work.  If you initialize them to a non-zero value,
 statically (and make sure the code doesn't assume they're 0 by
 default), this will change.
LOL: I tried already to set them to 0!
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Re: [U-Boot] [PATCH] overo: add SPL support

2011-12-15 Thread Andreas Müller 
On Wednesday, December 14, 2011 06:24:13 PM Steve Sakoman wrote:
 
 I think you will also need to update the get_board_revision function
 to ensure that SPL works with very early Overo revisions.
 
 Note this excerpt from the X-loader get_board_revision funtion:
 
   /* board revisions = R2410 connect 4030 irq_1 to gpio112 */
   /* these boards should return a revision number of 0  */
   /* the code below forces a 4030 RTC irq to ensure that gpio112 is low */
 #ifdef CONFIG_DRIVER_OMAP34XX_I2C
   i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE);
   data = 0x01;
   i2c_write(0x4B, 0x29, 1, data, 1);
   data = 0x0c;
   i2c_write(0x4B, 0x2b, 1, data, 1);
   i2c_read(0x4B, 0x2a, 1, data, 1);
 #endif
 
 Yup, ugly, but this is the only way to detect revision properly on those
 boards.
I tried the following (as you can see I already commented out the 
i2c-read-write 
for test):

int get_board_revision(void)
{
#ifdef CONFIG_DRIVER_OMAP34XX_I2C
i2c_set_bus_num(TWL4030_I2C_BUS);
/*data = 0x01;
i2c_write(0x4B, 0x29, 1, data, 1);
data = 0x0c;
i2c_write(0x4B, 0x2b, 1, data, 1);
i2c_read(0x4B, 0x2a, 1, data, 1);*/
#endif

}

SPL Boot process hangs on i2c_set_bus_num ( tested by removing i2c_set_bus_num -
 proper operation ) with console freeze:

| U-Boot SPL 2011.12-rc1-4-g06e42c6-dirty (Dec 15 2011 - 14:03:34)
| Texas Instruments Revision detection unimplemented

The call stack for get_board_revision() is for SPL

s_init()
mem_init()
do_sdrc_init(..)
get_board_mem_timings(..)
get_board_revision(..)

It seems that the call to i2c_set_bus_num comes too early. Before I dive into x-
loader analysis: Has anybody an idea what goes wrong?

Andreas
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[U-Boot] [PATCH] overo: add SPL support

2011-12-14 Thread Andreas Müller 
* implemenatation based on ti beagleboard/omap3evm
* timing data taken from x-loader
* run-tested with overo release 0 and 1 / boot from NAND and SDcard

Signed-off-by: Andreas Müller schnitzelt...@gmx.de
---
 arch/arm/include/asm/arch-omap3/mem.h |   27 
 board/overo/config.mk |   28 
 board/overo/overo.c   |   41 +++-
 include/configs/omap3_overo.h |   56 -
 4 files changed, 122 insertions(+), 30 deletions(-)
 delete mode 100644 board/overo/config.mk

diff --git a/arch/arm/include/asm/arch-omap3/mem.h 
b/arch/arm/include/asm/arch-omap3/mem.h
index 5fd02d4..18998d8 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -123,6 +123,33 @@ enum {
V_MCFG_BANKALLOCATION_RBC | \
V_MCFG_B32NOT16_32 | V_MCFG_DEEPPD_EN | V_MCFG_RAMTYPE_DDR
 
+
+/* Hynix part of Overo (165MHz optimized) 6.06ns */
+#define HYNIX_TDAL_165   6
+#define HYNIX_TDPL_165   3
+#define HYNIX_TRRD_165   2
+#define HYNIX_TRCD_165   3
+#define HYNIX_TRP_1653
+#define HYNIX_TRAS_165   7
+#define HYNIX_TRC_165   10
+#define HYNIX_TRFC_165  21
+#define HYNIX_V_ACTIMA_165 \
+   ACTIM_CTRLA(HYNIX_TRFC_165, HYNIX_TRC_165,  \
+   HYNIX_TRAS_165, HYNIX_TRP_165,  \
+   HYNIX_TRCD_165, HYNIX_TRRD_165, \
+   HYNIX_TDPL_165, HYNIX_TDAL_165)
+
+#define HYNIX_TWTR_165   1
+#define HYNIX_TCKE_165   1
+#define HYNIX_TXP_1652
+#define HYNIX_XSR_16524
+#define HYNIX_V_ACTIMB_165 \
+   ACTIM_CTRLB(HYNIX_TWTR_165, HYNIX_TCKE_165, \
+   HYNIX_TXP_165, HYNIX_XSR_165)
+
+#define HYNIX_RASWIDTH_165 0x2
+#define HYNIX_V_MCFG_165(size) MCFG((size), HYNIX_RASWIDTH_165)
+
 /* Hynix part of AM/DM37xEVM (200MHz optimized) */
 #define HYNIX_TDAL_200 6
 #define HYNIX_TDPL_200 3
diff --git a/board/overo/config.mk b/board/overo/config.mk
deleted file mode 100644
index e7c471c..000
--- a/board/overo/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# Overo uses OMAP3 (ARM-CortexA8) cpu
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-# Physical Address:
-# 8000' (bank0)
-# A000/ (bank1)
-# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
-# (mem base + reserved)
-
-CONFIG_SYS_TEXT_BASE = 0x80008000
diff --git a/board/overo/overo.c b/board/overo/overo.c
index 3c60b06..dbe43ab 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -31,6 +31,7 @@
 #include common.h
 #include netdev.h
 #include twl4030.h
+#include linux/mtd/nand.h
 #include asm/io.h
 #include asm/arch/mmc_host_def.h
 #include asm/arch/mux.h
@@ -126,6 +127,44 @@ int get_board_revision(void)
return revision;
 }
 
+#ifdef CONFIG_SPL_BUILD
+/*
+ * Routine: get_board_mem_timings
+ * Description: If we use SPL then there is no x-loader nor config header
+ * so we have to setup the DDR timings ourself on both banks.
+ */
+void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
+   u32 *mr)
+{
+   *mr = MICRON_V_MR_165;
+   switch (get_board_revision()) {
+   case 0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */
+   *mcfg = MICRON_V_MCFG_165(128  20);
+   *ctrla = MICRON_V_ACTIMA_165;
+   *ctrlb = MICRON_V_ACTIMB_165;
+   *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+   break;
+   case 1: /* Micron 256MB/512MB, 1/2 banks of 256MB */
+   *mcfg = MICRON_V_MCFG_165(256  20);
+   *ctrla = MICRON_V_ACTIMA_165;
+   *ctrlb = MICRON_V_ACTIMB_165;
+   *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+   break;
+   case 2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */
+   *mcfg = HYNIX_V_MCFG_165(256  20);
+   *ctrla = HYNIX_V_ACTIMA_165;
+   *ctrlb = HYNIX_V_ACTIMB_165;
+   *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+   break;
+   default:
+   *mcfg = MICRON_V_MCFG_165(128  20);
+   *ctrla = MICRON_V_ACTIMA_165

Re: [U-Boot] [PATCH] overo: add SPL support

2011-12-14 Thread Andreas Müller 
On Wednesday, December 14, 2011 06:24:13 PM you wrote:
 
 I think you will also need to update the get_board_revision function
 to ensure that SPL works with very early Overo revisions.
 
 Note this excerpt from the X-loader get_board_revision funtion:
 
   /* board revisions = R2410 connect 4030 irq_1 to gpio112 */
   /* these boards should return a revision number of 0  */
   /* the code below forces a 4030 RTC irq to ensure that gpio112 is low */
 #ifdef CONFIG_DRIVER_OMAP34XX_I2C
   i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE);
   data = 0x01;
   i2c_write(0x4B, 0x29, 1, data, 1);
   data = 0x0c;
   i2c_write(0x4B, 0x2b, 1, data, 1);
   i2c_read(0x4B, 0x2a, 1, data, 1);
 #endif
 
 Yup, ugly, but this is the only way to detect revision properly on those
 boards.
That explains why my Rev0-board is sometimes detected with Rev 1 and the whole 
i2c stuff is not working because it was not initialized in u-boot :)

will prepare V2  test tomorrow  thanks for this hint!

Andreas
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[U-Boot] Is there a branch with support for Karo TX51?

2011-10-24 Thread Andreas Müller 
Hi,

grepping current master for tx51 gives:

arch/arm/include/asm/mach-types.h:#define MACH_TYPE_TX51 2529
arch/arm/include/asm/mach-types.h:#ifdef CONFIG_MACH_TX51
arch/arm/include/asm/mach-types.h:#  define machine_arch_type   MACH_TYPE_TX51
arch/arm/include/asm/mach-types.h:# define machine_is_tx51()
(machine_arch_type == MACH_TYPE_TX51)
arch/arm/include/asm/mach-types.h:# define machine_is_tx51()(0)

I think this is not sufficient for building u-boot booting TX51...

Is there a branch or other source out there supporting TX51? KARO itself seems 
to support only a very poor 
redboot ( no ddirect booting from SDCard / TFTP ).

Thanks in advance

Andreas
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