from:"Bob Liu"

Re: [U-Boot] [PATCH 05/11] Blackfin: bf60x: support big cplb page

2013-02-17 Thread Bob Liu

On Thu, Feb 7, 2013 at 6:33 PM, Wolfgang Denk w...@denx.de wrote:
 Dear Sonic Zhang,

 In message 1360223258-6945-6-git-send-email-sonic@gmail.com you wrote:
 From: Bob Liu lliu...@gmail.com

 Bf60x support 16K, 64K, 16M and 64M cplb pages, this patch add support for 
 them.
 So that bf609-ezkit can use it's 128M memory.

 Checkpatch issues, please fix.


 -#define CPLB_PAGE_SIZE (4 * 1024 * 1024)
 -#define CPLB_PAGE_MASK (~(CPLB_PAGE_SIZE - 1))
 ...
 + uint32_t cplb_page_size;
 + uint32_t cplb_page_mask;
 ...
 + cplb_page_size = (4 * 1024 * 1024);
 + cplb_page_mask = (~(cplb_page_size - 1));
 ...
 - mbase = CPLB_PAGE_MASK;
 - mend = CPLB_PAGE_MASK;
 + mbase = cplb_page_mask;
 + mend = cplb_page_mask;

 What exsactly is the reason for replacing a compile-time calculation
 with a run-time one?


Because bf60x will use different cplb page size in some place, if
don't use run-time variable then
more marco and #ifdef are needed.
I prefer to reuse this code with run-time variable.

 Best regards,

 Wolfgang Denk

 --
 DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
 HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
 Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
 Whom the gods would destroy, they first teach BASIC.
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-- 
Thanks,
--Bob
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[U-Boot] [PATCH V3 00/12] Blackfin: add new processor and board

2012-11-14 Thread Bob Liu

Blackfin bf60x is a new processor for blackfin.
This series patches add some basic support for it with a bf609-ezkit reference
board.

I got some suggestion in the former commit. Some of them are fixed, but some
is still not clear.
Since it's a long time ago, i send out V3 for feedback.

Bob Liu (7):
  Blackfin: bf60x: new processor header files
  Blackfin: bf60x: add dma support
  Blackfin: bf60x: support big cplb page
  Blackfin: bf60x: add gpio support
  Blackfin: bf60x: core support
  blackfin: bf609: add board support
  Blackfin: bf60x: add hw watchdog support

Scott Jiang (1):
  Blackfin: spi: add bf6xx spi driver

Sonic Zhang (3):
  Blackfin: bf60x: add serial support
  Blackfin: bf60x: add rsi/sdh support
  Blackfin: bf609-ezkit: implement soft switch

Steven Miao (1):
  Blackfin: Bf60x: add resume from hibernate

 MAINTAINERS|1 +
 arch/blackfin/cpu/cpu.c|4 +-
 arch/blackfin/cpu/gpio.c   |   36 +-
 arch/blackfin/cpu/initcode.c   |  365 +-
 arch/blackfin/cpu/initcode.h   |   52 +
 arch/blackfin/cpu/reset.c  |6 +
 arch/blackfin/cpu/serial.c |   81 +-
 arch/blackfin/cpu/serial.h |  222 +-
 arch/blackfin/cpu/serial1.h|  275 ++
 arch/blackfin/cpu/serial4.h|  139 +
 arch/blackfin/cpu/start.S  |2 +
 arch/blackfin/include/asm/blackfin_cdef.h  |3 +
 arch/blackfin/include/asm/blackfin_def.h   |5 +
 arch/blackfin/include/asm/blackfin_local.h |3 +
 arch/blackfin/include/asm/config-pre.h |4 +
 arch/blackfin/include/asm/cplb.h   |   17 +-
 arch/blackfin/include/asm/dma.h|  113 +-
 arch/blackfin/include/asm/gpio.h   |2 +-
 arch/blackfin/include/asm/mach-bf609/BF609_cdef.h  |  543 +++
 arch/blackfin/include/asm/mach-bf609/BF609_def.h   | 3758 
 arch/blackfin/include/asm/mach-bf609/anomaly.h |  128 +
 arch/blackfin/include/asm/mach-bf609/def_local.h   |5 +
 arch/blackfin/include/asm/mach-bf609/gpio.h|  151 +
 arch/blackfin/include/asm/mach-bf609/portmux.h |  257 ++
 arch/blackfin/include/asm/mach-bf609/ports.h   |  103 +
 arch/blackfin/include/asm/mach-common/bits/cgu.h   |   80 +
 arch/blackfin/include/asm/mach-common/bits/dde.h   |   88 +
 arch/blackfin/include/asm/mach-common/bits/dma.h   |   48 +-
 arch/blackfin/include/asm/mach-common/bits/mpu.h   |6 +-
 arch/blackfin/include/asm/mach-common/bits/pll.h   |5 +
 arch/blackfin/include/asm/mach-common/bits/sdh.h   |   38 +-
 .../blackfin/include/asm/mach-common/bits/spi6xx.h |  240 ++
 arch/blackfin/include/asm/mach-common/bits/uart4.h |   66 +
 arch/blackfin/lib/board.c  |   33 +-
 arch/blackfin/lib/clocks.c |  113 +-
 arch/blackfin/lib/string.c |   97 +-
 board/bf609-ezkit/Makefile |   55 +
 board/bf609-ezkit/bf609-ezkit.c|   67 +
 board/bf609-ezkit/soft_switch.c|  169 +
 board/bf609-ezkit/soft_switch.h|   71 +
 boards.cfg |1 +
 common/cmd_reginfo.c   |   19 +-
 drivers/mmc/bfin_sdh.c |   68 +-
 drivers/spi/Makefile   |1 +
 drivers/spi/bfin_spi6xx.c  |  308 ++
 include/configs/bf609-ezkit.h  |  175 +
 include/configs/bfin_adi_common.h  |8 +-
 47 files changed, 7611 insertions(+), 420 deletions(-)
 create mode 100644 arch/blackfin/cpu/serial1.h
 create mode 100644 arch/blackfin/cpu/serial4.h
 create mode 100644 arch/blackfin/include/asm/mach-bf609/BF609_cdef.h
 create mode 100644 arch/blackfin/include/asm/mach-bf609/BF609_def.h
 create mode 100644 arch/blackfin/include/asm/mach-bf609/anomaly.h
 create mode 100644 arch/blackfin/include/asm/mach-bf609/def_local.h
 create mode 100644 arch/blackfin/include/asm/mach-bf609/gpio.h
 create mode 100644 arch/blackfin/include/asm/mach-bf609/portmux.h
 create mode 100644 arch/blackfin/include/asm/mach-bf609/ports.h
 create mode 100644 arch/blackfin/include/asm/mach-common/bits/cgu.h
 create mode 100644 arch/blackfin/include/asm/mach-common/bits/dde.h
 create mode 100644 arch/blackfin/include/asm/mach-common/bits/spi6xx.h
 create mode 100644 arch/blackfin/include/asm/mach-common/bits/uart4.h
 create mode 100644 board/bf609-ezkit/Makefile
 create mode 100644 board/bf609-ezkit/bf609-ezkit.c
 create mode 100644 board/bf609-ezkit/soft_switch.c
 create mode 100644 board/bf609-ezkit/soft_switch.h
 create mode 100644 drivers/spi/bfin_spi6xx.c
 create mode 100644 include/configs/bf609-ezkit.h

-- 
1.7.9.5

[U-Boot] [PATCH V3 03/12] Blackfin: bf60x: add dma support

2012-11-14 Thread Bob Liu

Add dma support for bf60x.

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/include/asm/dma.h  |  113 --
 arch/blackfin/include/asm/mach-common/bits/dma.h |   48 -
 arch/blackfin/lib/string.c   |   97 ++-
 3 files changed, 159 insertions(+), 99 deletions(-)

diff --git a/arch/blackfin/include/asm/dma.h b/arch/blackfin/include/asm/dma.h
index 21ff1cf..211719a 100644
--- a/arch/blackfin/include/asm/dma.h
+++ b/arch/blackfin/include/asm/dma.h
@@ -8,68 +8,77 @@
 #ifndef _BLACKFIN_DMA_H_
 #define _BLACKFIN_DMA_H_
 
+#include linux/types.h
+#ifdef __ADSPBF60x__
+#include asm/mach-common/bits/dde.h
+#else
 #include asm/mach-common/bits/dma.h
+#endif
 
 struct dmasg_large {
void *next_desc_addr;
-   unsigned long start_addr;
-   unsigned short cfg;
-   unsigned short x_count;
-   short x_modify;
-   unsigned short y_count;
-   short y_modify;
+   u32 start_addr;
+   u16 cfg;
+   u16 x_count;
+   s16 x_modify;
+   u16 y_count;
+   s16 y_modify;
 } __attribute__((packed));
 
 struct dmasg {
-   unsigned long start_addr;
-   unsigned short cfg;
-   unsigned short x_count;
-   short x_modify;
-   unsigned short y_count;
-   short y_modify;
+   u32 start_addr;
+   u16 cfg;
+   u16 x_count;
+   s16 x_modify;
+   u16 y_count;
+   s16 y_modify;
 } __attribute__((packed));
 
+/*
+ * All Blackfin system MMRs are padded to 32bits even if the register
+ * itself is only 16bits.  So use a helper macro to streamline this.
+ */
+#define __BFP(m) m; u16 __pad_##m
 struct dma_register {
-   void *next_desc_ptr;/* DMA Next Descriptor Pointer register */
-   unsigned long start_addr;   /* DMA Start address  register */
-
-   unsigned short cfg; /* DMA Configuration register */
-   unsigned short dummy1;  /* DMA Configuration register */
-
-   unsigned long reserved;
-
-   unsigned short x_count; /* DMA x_count register */
-   unsigned short dummy2;
-
-   short x_modify; /* DMA x_modify register */
-   unsigned short dummy3;
-
-   unsigned short y_count; /* DMA y_count register */
-   unsigned short dummy4;
-
-   short y_modify; /* DMA y_modify register */
-   unsigned short dummy5;
-
-   void *curr_desc_ptr;/* DMA Current Descriptor Pointer
-  register */
-   unsigned long curr_addr_ptr;/* DMA Current Address Pointer
-  register */
-   unsigned short irq_status;  /* DMA irq status register */
-   unsigned short dummy6;
-
-   unsigned short peripheral_map;  /* DMA peripheral map register */
-   unsigned short dummy7;
-
-   unsigned short curr_x_count;/* DMA Current x-count register */
-   unsigned short dummy8;
-
-   unsigned long reserved2;
-
-   unsigned short curr_y_count;/* DMA Current y-count register */
-   unsigned short dummy9;
-
-   unsigned long reserved3;
-
+#ifdef __ADSPBF60x__
+   void *next_desc_ptr;
+   u32 start_addr;
+   u32 config;
+   u32 x_count;
+   s32 x_modify;
+   u32 y_count;
+   s32 y_modify;
+   u32 __pad0[2];
+   void *curr_desc_ptr;
+   void *prev_desc_ptr;
+   void *curr_addr;
+   u32 status;
+   u32 curr_x_count;
+   u32 curr_y_count;
+   u32 __pad1[2];
+   u32 bw_limit;
+   u32 curr_bw_limit;
+   u32 bw_monitor;
+   u32 curr_bw_monitor;
+#else
+   void *next_desc_ptr;
+   u32 start_addr;
+   u16 __BFP(config);
+   u32 __pad0;
+   u16 __BFP(x_count);
+   s16 __BFP(x_modify);
+   u16 __BFP(y_count);
+   s16 __BFP(y_modify);
+   void *curr_desc_ptr;
+   u32 curr_addr_ptr;
+   u16 __BFP(status);
+   u16 __BFP(peripheral_map);
+   u16 __BFP(curr_x_count);
+   u32 __pad1;
+   u16 __BFP(curr_y_count);
+   u32 __pad2;
+#endif
 };
+#undef __BFP
 
 #endif
diff --git a/arch/blackfin/include/asm/mach-common/bits/dma.h 
b/arch/blackfin/include/asm/mach-common/bits/dma.h
index 136313e..1126c44 100644
--- a/arch/blackfin/include/asm/mach-common/bits/dma.h
+++ b/arch/blackfin/include/asm/mach-common/bits/dma.h
@@ -9,8 +9,48 @@
 #define DMAEN  0x0001  /* DMA Channel Enable */
 #define WNR0x0002  /* Channel Direction (W/R*) */
 #define WDSIZE_8   0x  /* Transfer Word Size = 8 */
+
+#ifdef CONFIG_BF60x
+
+#define PSIZE_80x  /* Transfer Word Size = 
16 */
+#define PSIZE_16   0x0010  /* Transfer Word Size = 16 */
+#define PSIZE_32   0x0020  /* Transfer Word Size = 32 */
+#define PSIZE_64   0x0030  /* Transfer Word Size = 32 */
+#define WDSIZE_16  0x0100  /* Transfer Word Size = 16 */
+#define WDSIZE_32

[U-Boot] [PATCH V3 11/12] Blackfin: bf60x: add hw watchdog support

2012-11-14 Thread Bob Liu

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/initcode.c  |   13 +
 arch/blackfin/cpu/start.S |2 ++
 include/configs/bf609-ezkit.h |1 +
 3 files changed, 16 insertions(+)

diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index 3bbdf22..6740e34 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -456,8 +456,21 @@ program_early_devices(ADI_BOOT_DATA *bs, uint *sdivB, uint 
*divB, uint *vcoB)
 */
if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS) {
serial_putc('e');
+#ifdef __ADSPBF60x__
+   bfin_write_SEC_GCTL(0x2);
+   SSYNC();
+   bfin_write_SEC_FCTL(0xc1);
+   bfin_write_SEC_SCTL(2, bfin_read_SEC_SCTL(2) | 0x6);
+
+   bfin_write_SEC_CCTL(0x2);
+   SSYNC();
+   bfin_write_SEC_GCTL(0x1);
+   bfin_write_SEC_CCTL(0x1);
+#endif

bfin_write_WDOG_CNT(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_INITCODE));
+#if CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART
bfin_write_WDOG_CTL(0);
+#endif
serial_putc('f');
}
 #endif
diff --git a/arch/blackfin/cpu/start.S b/arch/blackfin/cpu/start.S
index 90b4d1a..7155fc8 100644
--- a/arch/blackfin/cpu/start.S
+++ b/arch/blackfin/cpu/start.S
@@ -65,6 +65,7 @@ ENTRY(_start)
p5.h = HI(COREMMR_BASE);
 
 #ifdef CONFIG_HW_WATCHDOG
+#ifndef __ADSPBF60x__
 # ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START
 #  define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000
 # endif
@@ -78,6 +79,7 @@ ENTRY(_start)
/* fire up the watchdog - R0.L above needs to be 0x */
W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r0;
 #endif
+#endif
 
/* Turn on the serial for debugging the init process */
serial_early_init
diff --git a/include/configs/bf609-ezkit.h b/include/configs/bf609-ezkit.h
index 939459a..d6f5190 100644
--- a/include/configs/bf609-ezkit.h
+++ b/include/configs/bf609-ezkit.h
@@ -73,6 +73,7 @@
 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
 #define CONFIG_SYS_MALLOC_LEN  (256 * 1024)
 
+#define CONFIG_HW_WATCHDOG
 /*
  * Network Settings
  */
-- 
1.7.9.5


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[U-Boot] [PATCH V3 06/12] Blackfin: bf609-ezkit: implement soft switch

2012-11-14 Thread Bob Liu

From: Sonic Zhang sonic.zh...@analog.com

Set up soft switch pins properly in board init code.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 board/bf609-ezkit/soft_switch.c |  169 +++
 board/bf609-ezkit/soft_switch.h |   71 
 2 files changed, 240 insertions(+)
 create mode 100644 board/bf609-ezkit/soft_switch.c
 create mode 100644 board/bf609-ezkit/soft_switch.h

diff --git a/board/bf609-ezkit/soft_switch.c b/board/bf609-ezkit/soft_switch.c
new file mode 100644
index 000..1e83e1d
--- /dev/null
+++ b/board/bf609-ezkit/soft_switch.c
@@ -0,0 +1,169 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2008-2011 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include common.h
+#include asm/blackfin.h
+#include asm/io.h
+#include i2c.h
+#include soft_switch.h
+
+#define SWITCH_ADDR 0x21
+
+#define NUM_SWITCH  3
+#define IODIRA  0x0
+#define IODIRB  0x1
+#define OLATA   0x14
+#define OLATB   0x15
+
+struct switch_config {
+   uchar dir0; /* IODIRA */
+   uchar dir1; /* IODIRB */
+   uchar value0; /* OLATA */
+   uchar value1; /* OLATB */
+};
+
+static struct switch_config switch_config_array[NUM_SWITCH] = {
+   {
+/*
+   U45 Port A  U45 Port B
+
+   7---  RMII_CLK_EN   |   7--- 
~TEMP_THERM_EN
+   | 6- ~CNT0ZM_EN |   | 6- 
~TEMP_IRQ_EN
+   | | 5--- ~CNT0DG_EN |   | | 5--- 
~UART0CTS_146_EN
+   | | | 4- ~CNT0UD_EN |   | | | 4- 
~UART0CTS_RST_EN
+   | | | | 3--- ~CAN0RX_EN |   | | | | 3--- 
~UART0CTS_RTS_LPBK
+   | | | | | 2- ~CAN0_ERR_EN   |   | | | | | 2- 
~UART0CTS_EN
+   | | | | | | 1--- ~CAN_STB   |   | | | | | | 1--- ~UART0RX_EN
+   | | | | | | | 0-  CAN_EN|   | | | | | | | 0- 
~UART0RTS_EN
+   | | | | | | | | |   | | | | | | | |
+   O O O O O O O O |   O O O O O O O O ( I/O 
direction )
+   1 0 0 0 0 0 1 1 |   1 1 1 1 1 0 0 0 ( value 
being set )
+*/
+   .dir0 = 0x0, /* all output */
+   .dir1 = 0x0, /* all output */
+   .value0 = RMII_CLK_EN | CAN_STB | CAN_EN,
+   .value1 = TEMP_THERM_EN | TEMP_IRQ_EN | UART0CTS_146_EN
+   | UART0CTS_RST_EN | UART0CTS_RTS_LPBK,
+   },
+   {
+/*
+   U46 Port A  U46 Port B
+
+   7--- ~LED4_GPIO_EN  |   7---  EMPTY
+   | 6- ~LED3_GPIO_EN  |   | 6- 
~SPI0D3_EN
+   | | 5--- ~LED2_GPIO_EN  |   | | 5--- 
~SPI0D2_EN
+   | | | 4- ~LED1_GPIO_EN  |   | | | 4- 
~SPIFLASH_CS_EN
+   | | | | 3---  SMC0_LP0_EN   |   | | | | 3--- 
~SD_WP_EN
+   | | | | | 2-  EMPTY |   | | | | | 2- 
~SD_CD_EN
+   | | | | | | 1---  SMC0_EPPI2_LP1_SWITCH |   | | | | | | 1--- 
~PUSHBUTTON2_EN
+   | | | | | | | 0-  OVERRIDE_SMC0_LP0_BOOT|   | | | | | | | 0- 
~PUSHBUTTON1_EN
+   | | | | | | | | |   | | | | | | | |
+   O O O O O O O O |   O O O O O O O O ( 
I/O direction )
+   0 0 0 0 0 X 0 1 |   X 0 0 0 0 0 0 0 ( 
value being set )
+*/
+   .dir0 = 0x0, /* all output */
+   .dir1 = 0x0, /* all output */
+#ifdef CONFIG_BFIN_LINKPORT
+   .value0 = OVERRIDE_SMC0_LP0_BOOT,
+#else
+   .value0 = SMC0_EPPI2_LP1_SWITCH,
+#endif
+   .value1 = 0x0,
+   },
+   {
+/*
+   U47 Port A  U47 Port B
+
+   7--- ~PD2_SPI0MISO_EI3_EN   |   
7---  EMPTY
+   | 6- ~PD1_SPI0D3_EPPI1D17_SPI0SEL2_EI3_EN   |   | 
6-  EMPTY
+   | | 5--- ~PD0_SPI0D2_EPPI1D16_SPI0SEL3_EI3_EN   |   | | 
5---  EMPTY
+   | | | 4- ~WAKE_PUSHBUTTON_EN|   | | | 
4-  EMPTY
+   | | | | 3--- ~ETHERNET_EN   |   | | | | 
3---  EMPTY
+   | | | | | 2-  PHYAD0|   | | | | 
| 2-  EMPTY
+   | | | | | | 1---  PHY_PWR_DWN_INT   |   | | | | 
| | 1--- ~PD4_SPI0CK_EI3_EN
+   | | | | | | | 0- ~PHYINT_EN |   | | | | 
| | | 0- ~PD3_SPI0MOSI_EI3_EN
+   | | | | | | | | |   | | | | 
| | | |
+   O O O O O I I O |   O

[U-Boot] [PATCH V3 10/12] blackfin: bf609: add board support

2012-11-14 Thread Bob Liu

Board files for bf609-ezkit support.

Signed-off-by: Bob Liu lliu...@gmail.com
---
 MAINTAINERS   |1 +
 board/bf609-ezkit/Makefile|   55 
 board/bf609-ezkit/bf609-ezkit.c   |   67 ++
 boards.cfg|1 +
 include/configs/bf609-ezkit.h |  174 +
 include/configs/bfin_adi_common.h |8 +-
 6 files changed, 302 insertions(+), 4 deletions(-)
 create mode 100644 board/bf609-ezkit/Makefile
 create mode 100644 board/bf609-ezkit/bf609-ezkit.c
 create mode 100644 include/configs/bf609-ezkit.h

diff --git a/MAINTAINERS b/MAINTAINERS
index fd0c65c..2c447d4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1154,6 +1154,7 @@ Blackfin Team u-boot-de...@blackfin.uclinux.org
BF538F-EZKITBF538
BF548-EZKIT BF548
BF561-EZKIT BF561
+   BF609-EZKIT BF609
 
 M.Hasewinkel (MHA) i...@ssv-embedded.de
 
diff --git a/board/bf609-ezkit/Makefile b/board/bf609-ezkit/Makefile
new file mode 100644
index 000..0bb8fe6
--- /dev/null
+++ b/board/bf609-ezkit/Makefile
@@ -0,0 +1,55 @@
+#
+# U-boot - Makefile
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS-y:= $(BOARD).o
+COBJS-$(CONFIG_BFIN_SOFT_SWITCH)   += soft_switch.o
+
+SRCS   := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS-y))
+SOBJS  := $(addprefix $(obj),$(SOBJS-y))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/bf609-ezkit/bf609-ezkit.c b/board/bf609-ezkit/bf609-ezkit.c
new file mode 100644
index 000..0388226
--- /dev/null
+++ b/board/bf609-ezkit/bf609-ezkit.c
@@ -0,0 +1,67 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2008-2011 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include common.h
+#include netdev.h
+#include asm/blackfin.h
+#include asm/io.h
+#include asm/portmux.h
+#include soft_switch.h
+
+int checkboard(void)
+{
+   printf(Board: ADI BF609 EZ-Kit board\n);
+   printf(   Support: http://blackfin.uclinux.org/\n;);
+   return 0;
+}
+
+int board_early_init_f(void)
+{
+   static const unsigned short pins[] = {
+   P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12,
+   P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21,
+   P_A22, P_A23, P_A24, P_A25, P_NORCK, 0,
+   };
+   peripheral_request_list(pins, smc0);
+
+   return 0;
+}
+
+#ifdef CONFIG_DESIGNWARE_ETH
+int board_eth_init(bd_t *bis)
+{
+   int ret = 0;
+
+   if (CONFIG_DW_PORTS  1) {
+   static const unsigned short pins[] = P_RMII0;
+   if (!peripheral_request_list(pins, emac0))
+   ret += designware_initialize(0, EMAC0_MACCFG, 1, 0);
+   }
+   if (CONFIG_DW_PORTS  2) {
+   static const unsigned short pins[] = P_RMII1;
+   if (!peripheral_request_list(pins, emac1))
+   ret += designware_initialize(1, EMAC1_MACCFG, 1, 0);
+   }
+
+   return ret;
+}
+#endif
+
+#ifdef CONFIG_BFIN_SDH
+int board_mmc_init(bd_t *bis)
+{
+   return bfin_mmc_init(bis);
+}
+#endif
+
+/* miscellaneous platform dependent initialisations */
+int misc_init_r(void)
+{
+   printf(other init\n);
+   return setup_board_switches();
+}
diff --git a/boards.cfg b/boards.cfg
index 2d36d83..8d275a3 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -313,6 +313,7 @@ bf538f-ezkit blackfinblackfin
 bf548-ezkit  blackfinblackfin
 bf561-acvilonblackfinblackfin
 bf561-ezkit  blackfin

[U-Boot] [PATCH V3 08/12] Blackfin: bf60x: add gpio support

2012-11-14 Thread Bob Liu

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/gpio.c|   36 +--
 arch/blackfin/include/asm/gpio.h|2 +-
 arch/blackfin/include/asm/mach-bf609/gpio.h |  151 +++
 3 files changed, 181 insertions(+), 8 deletions(-)
 create mode 100644 arch/blackfin/include/asm/mach-bf609/gpio.h

diff --git a/arch/blackfin/cpu/gpio.c b/arch/blackfin/cpu/gpio.c
index 5674d42..f684be5 100644
--- a/arch/blackfin/cpu/gpio.c
+++ b/arch/blackfin/cpu/gpio.c
@@ -66,6 +66,14 @@ static struct gpio_port_t * const gpio_array[] = {
(struct gpio_port_t *)PORTH_FER,
(struct gpio_port_t *)PORTI_FER,
(struct gpio_port_t *)PORTJ_FER,
+#elif defined(CONFIG_BF60x)
+   (struct gpio_port_t *)PORTA_FER,
+   (struct gpio_port_t *)PORTB_FER,
+   (struct gpio_port_t *)PORTC_FER,
+   (struct gpio_port_t *)PORTD_FER,
+   (struct gpio_port_t *)PORTE_FER,
+   (struct gpio_port_t *)PORTF_FER,
+   (struct gpio_port_t *)PORTG_FER,
 #else
 # error no gpio arrays defined
 #endif
@@ -216,6 +224,12 @@ static void port_setup(unsigned gpio, unsigned short usage)
else
gpio_array[gpio_bank(gpio)]-port_fer |= gpio_bit(gpio);
SSYNC();
+#elif defined(CONFIG_BF60x)
+   if (usage == GPIO_USAGE)
+   gpio_array[gpio_bank(gpio)]-port_fer_clear = gpio_bit(gpio);
+   else
+   gpio_array[gpio_bank(gpio)]-port_fer_set = gpio_bit(gpio);
+   SSYNC();
 #endif
 }
 
@@ -290,7 +304,7 @@ static void portmux_setup(unsigned short per)
}
}
 }
-#elif defined(CONFIG_BF54x)
+#elif defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
 inline void portmux_setup(unsigned short per)
 {
u32 pmux;
@@ -330,7 +344,7 @@ inline void portmux_setup(unsigned short per)
 # define portmux_setup(...)  do { } while (0)
 #endif
 
-#ifndef CONFIG_BF54x
+#if !defined(CONFIG_BF54x)  !defined(CONFIG_BF60x)
 /***
 *
 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
@@ -534,7 +548,7 @@ int peripheral_request(unsigned short per, const char 
*label)
 * be requested and used by several drivers
 */
 
-#ifdef CONFIG_BF54x
+#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
if (!((per  P_MAYSHARE)  get_portmux(per) == 
P_FUNCT2MUX(per))) {
 #else
if (!(per  P_MAYSHARE)) {
@@ -651,7 +665,7 @@ int bfin_gpio_request(unsigned gpio, const char *label)
   gpio, get_label(gpio));
return -EBUSY;
}
-#ifndef CONFIG_BF54x
+#if !defined(CONFIG_BF54x)  !defined(CONFIG_BF60x)
else {  /* Reset POLAR setting when acquiring a gpio for the first time 
*/
set_gpio_polar(gpio, 0);
}
@@ -732,12 +746,16 @@ void bfin_special_gpio_free(unsigned gpio)
 
 static inline void __bfin_gpio_direction_input(unsigned gpio)
 {
-#ifdef CONFIG_BF54x
+#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
gpio_array[gpio_bank(gpio)]-dir_clear = gpio_bit(gpio);
 #else
gpio_array[gpio_bank(gpio)]-dir = ~gpio_bit(gpio);
 #endif
+#if defined(CONFIG_BF60x)
+   gpio_array[gpio_bank(gpio)]-inen_set = gpio_bit(gpio);
+#else
gpio_array[gpio_bank(gpio)]-inen |= gpio_bit(gpio);
+#endif
 }
 
 int bfin_gpio_direction_input(unsigned gpio)
@@ -785,9 +803,13 @@ int bfin_gpio_direction_output(unsigned gpio, int value)
 
local_irq_save(flags);
 
+#if defined(CONFIG_BF60x)
+   gpio_array[gpio_bank(gpio)]-inen_clear = gpio_bit(gpio);
+#else
gpio_array[gpio_bank(gpio)]-inen = ~gpio_bit(gpio);
+#endif
gpio_set_value(gpio, value);
-#ifdef CONFIG_BF54x
+#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
gpio_array[gpio_bank(gpio)]-dir_set = gpio_bit(gpio);
 #else
gpio_array[gpio_bank(gpio)]-dir |= gpio_bit(gpio);
@@ -801,7 +823,7 @@ int bfin_gpio_direction_output(unsigned gpio, int value)
 
 int bfin_gpio_get_value(unsigned gpio)
 {
-#ifdef CONFIG_BF54x
+#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
return (1  (gpio_array[gpio_bank(gpio)]-data  gpio_sub_n(gpio)));
 #else
unsigned long flags;
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 224688f..05131b5 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -68,7 +68,7 @@
 
 #ifndef __ASSEMBLY__
 
-#ifndef CONFIG_BF54x
+#if !defined(CONFIG_BF54x)  !defined(CONFIG_BF60x)
 void set_gpio_dir(unsigned, unsigned short);
 void set_gpio_inen(unsigned, unsigned short);
 void set_gpio_polar(unsigned, unsigned short);
diff --git a/arch/blackfin/include/asm/mach-bf609/gpio.h 
b/arch/blackfin/include/asm/mach-bf609/gpio.h
new file mode 100644
index 000..e297bcc
--- /dev/null
+++ b/arch/blackfin/include/asm/mach-bf609/gpio.h
@@ -0,0 +1,151 @@
+/*
+ * Copyright (C) 2008 Analog Devices Inc.
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef

[U-Boot] [PATCH V3 02/12] Blackfin: bf60x: add serial support

2012-11-14 Thread Bob Liu

From: Sonic Zhang sonic.zh...@analog.com

Add serial for bf60x.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/serial.c |   81 +++---
 arch/blackfin/cpu/serial.h |  222 ++--
 arch/blackfin/cpu/serial1.h|  275 
 arch/blackfin/cpu/serial4.h|  139 ++
 arch/blackfin/include/asm/mach-common/bits/uart4.h |   66 +
 5 files changed, 545 insertions(+), 238 deletions(-)
 create mode 100644 arch/blackfin/cpu/serial1.h
 create mode 100644 arch/blackfin/cpu/serial4.h
 create mode 100644 arch/blackfin/include/asm/mach-common/bits/uart4.h

diff --git a/arch/blackfin/cpu/serial.c b/arch/blackfin/cpu/serial.c
index 6603dc0..7d4dad9 100644
--- a/arch/blackfin/cpu/serial.c
+++ b/arch/blackfin/cpu/serial.c
@@ -43,7 +43,6 @@
 #include serial.h
 #include linux/compiler.h
 #include asm/blackfin.h
-#include asm/mach-common/bits/uart.h
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -52,8 +51,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #include serial.h
 
 #ifdef CONFIG_DEBUG_SERIAL
-static uint16_t cached_lsr[256];
-static uint16_t cached_rbr[256];
+static uart_lsr_t cached_lsr[256];
+static uart_lsr_t cached_rbr[256];
 static size_t cache_count;
 
 /* The LSR is read-to-clear on some parts, so we have to make sure status
@@ -61,10 +60,10 @@ static size_t cache_count;
  * works around anomaly 0599 at the same time by keeping a cumulative
  * tally of all the status bits.
  */
-static uint16_t uart_lsr_save;
-static uint16_t uart_lsr_read(uint32_t uart_base)
+static uart_lsr_t uart_lsr_save;
+static uart_lsr_t uart_lsr_read(uint32_t uart_base)
 {
-   uint16_t lsr = bfin_read(pUART-lsr);
+   uart_lsr_t lsr = _lsr_read(pUART);
uart_lsr_save |= (lsr  (OE|PE|FE|BI));
return lsr | uart_lsr_save;
 }
@@ -72,20 +71,20 @@ static uint16_t uart_lsr_read(uint32_t uart_base)
 static void uart_lsr_clear(uint32_t uart_base)
 {
uart_lsr_save = 0;
-   bfin_write(pUART-lsr, bfin_read(pUART-lsr) | -1);
+   _lsr_write(pUART, -1);
 }
 #else
 /* When debugging is disabled, we only care about the DR bit, so if other
  * bits get set/cleared, we don't really care since we don't read them
  * anyways (and thus anomaly 0599 is irrelevant).
  */
-static inline uint16_t uart_lsr_read(uint32_t uart_base)
+static inline uart_lsr_t uart_lsr_read(uint32_t uart_base)
 {
-   return bfin_read(pUART-lsr);
+   return _lsr_read(pUART);
 }
 static void uart_lsr_clear(uint32_t uart_base)
 {
-   bfin_write(pUART-lsr, bfin_read(pUART-lsr) | -1);
+   _lsr_write(pUART, -1);
 }
 #endif
 
@@ -127,20 +126,14 @@ static int uart_getc(uint32_t uart_base)
 
 #ifdef CONFIG_DEBUG_SERIAL
/* grab  clear the LSR */
-   uint16_t uart_lsr_val = uart_lsr_read(uart_base);
+   uart_lsr_t uart_lsr_val = uart_lsr_read(uart_base);
 
cached_lsr[cache_count] = uart_lsr_val;
cached_rbr[cache_count] = uart_rbr_val;
cache_count = (cache_count + 1) % ARRAY_SIZE(cached_lsr);
 
if (uart_lsr_val  (OE|PE|FE|BI)) {
-   uint16_t dll, dlh;
printf(\n[SERIAL ERROR]\n);
-   ACCESS_LATCH();
-   dll = bfin_read(pUART-dll);
-   dlh = bfin_read(pUART-dlh);
-   ACCESS_PORT_IER();
-   printf(\tDLL=0x%x DLH=0x%x\n, dll, dlh);
do {
--cache_count;
printf(\t%3zu: RBR=0x%02x LSR=0x%02x\n, cache_count,
@@ -160,6 +153,8 @@ static int uart_getc(uint32_t uart_base)
 # define LOOP(x)
 #endif
 
+#if BFIN_UART_HW_VER  4
+
 LOOP(
 static void uart_loop(uint32_t uart_base, int state)
 {
@@ -178,6 +173,28 @@ static void uart_loop(uint32_t uart_base, int state)
 }
 )
 
+#else
+
+LOOP(
+static void uart_loop(uint32_t uart_base, int state)
+{
+   u32 control;
+
+   /* Drain the TX fifo first so bytes don't come back */
+   while (!(uart_lsr_read(uart_base)  TEMT))
+   continue;
+
+   control = bfin_read(pUART-control);
+   if (state)
+   control |= LOOP_ENA | MRTS;
+   else
+   control = ~(LOOP_ENA | MRTS);
+   bfin_write(pUART-control, control);
+}
+)
+
+#endif
+
 #ifdef CONFIG_SYS_BFIN_UART
 
 static void uart_puts(uint32_t uart_base, const char *s)
@@ -246,16 +263,16 @@ struct serial_device bfin_serial##n##_device = { \
LOOP(.loop = uart##n##_loop) \
 };
 
-#ifdef UART0_DLL
+#ifdef UART0_RBR
 DECL_BFIN_UART(0)
 #endif
-#ifdef UART1_DLL
+#ifdef UART1_RBR
 DECL_BFIN_UART(1)
 #endif
-#ifdef UART2_DLL
+#ifdef UART2_RBR
 DECL_BFIN_UART(2)
 #endif
-#ifdef UART3_DLL
+#ifdef UART3_RBR
 DECL_BFIN_UART(3)
 #endif
 
@@ -274,16 +291,16 @@ __weak struct serial_device *default_serial_console(void)
 
 void serial_register_bfin_uart(void)
 {
-#ifdef UART0_DLL
+#ifdef UART0_RBR
serial_register(bfin_serial0_device);
 #endif
-#ifdef

[U-Boot] [PATCH V3 09/12] Blackfin: bf60x: core support

2012-11-14 Thread Bob Liu

Core changed for supporting bf60x.

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/cpu.c|4 +-
 arch/blackfin/cpu/initcode.c   |  308 ++--
 arch/blackfin/cpu/initcode.h   |   52 ++
 arch/blackfin/cpu/reset.c  |6 +
 arch/blackfin/include/asm/config-pre.h |4 +
 arch/blackfin/lib/board.c  |6 +
 arch/blackfin/lib/clocks.c |  113 +---
 common/cmd_reginfo.c   |   19 +-
 8 files changed, 473 insertions(+), 39 deletions(-)

diff --git a/arch/blackfin/cpu/cpu.c b/arch/blackfin/cpu/cpu.c
index 6a0bcca..b9fdb07 100644
--- a/arch/blackfin/cpu/cpu.c
+++ b/arch/blackfin/cpu/cpu.c
@@ -68,7 +68,9 @@ void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
/* Reset upon a double exception rather than just hanging.
 * Do not do bfin_read on SWRST as that will reset status bits.
 */
+# ifdef SWRST
bfin_write_SWRST(DOUBLE_FAULT);
+# endif
 #endif
 
serial_early_puts(Board init flash\n);
@@ -92,7 +94,7 @@ int irq_init(void)
 #elif defined(SICA_IMASK0)
bfin_write_SICA_IMASK0(0);
bfin_write_SICA_IMASK1(0);
-#else
+#elif defined(SIC_IMASK)
bfin_write_SIC_IMASK(0);
 #endif
/* Set up a dummy NMI handler if needed.  */
diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index fb3a101..3bbdf22 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -16,19 +16,138 @@
 #include asm/mach-common/bits/bootrom.h
 #include asm/mach-common/bits/core.h
 #include asm/mach-common/bits/ebiu.h
-#include asm/mach-common/bits/pll.h
-#include asm/mach-common/bits/uart.h
 
 #define BUG() while (1) { asm volatile(emuexcpt;); }
 
 #include serial.h
 
+#ifndef __ADSPBF60x__
+#include asm/mach-common/bits/pll.h
+#else
+#include asm/mach-common/bits/cgu.h
+#endif
+
+#ifdef __ADSPBF60x__
+#define CONFIG_BFIN_GET_DCLK_M 
((CONFIG_CLKIN_HZ*CONFIG_VCO_MULT)/(CONFIG_DCLK_DIV*100))
+
+#ifndef CONFIG_DMC_DDRCFG
+#if ((CONFIG_BFIN_GET_DCLK_M != 125)  \
+   (CONFIG_BFIN_GET_DCLK_M != 133)  \
+   (CONFIG_BFIN_GET_DCLK_M != 150)  \
+   (CONFIG_BFIN_GET_DCLK_M != 166)  \
+   (CONFIG_BFIN_GET_DCLK_M != 200)  \
+   (CONFIG_BFIN_GET_DCLK_M != 225)  \
+   (CONFIG_BFIN_GET_DCLK_M != 250))
+#error DDR2 CLK must be in (125, 133, 150, 166, 200, 225, 250)MHz
+#endif
+#endif
+
+/* DMC status bits */
+#define IDLE0x1
+#define MEMINITDONE 0x4
+#define SRACK   0x8
+#define PDACK   0x10
+#define DPDACK  0x20
+#define DLLCALDONE  0x2000
+#define PENDREF 0xF
+#define PHYRDPHASE  0xF0
+#define PHYRDPHASE_OFFSET   20
+
+/* DMC DLL control bits */
+#define DLLCALRDCNT 0xFF
+#define DATACYC_OFFSET  8
+
+struct ddr_config {
+   u32 ddr_clk;
+   u32 dmc_ddrctl;
+   u32 dmc_ddrcfg;
+   u32 dmc_ddrtr0;
+   u32 dmc_ddrtr1;
+   u32 dmc_ddrtr2;
+   u32 dmc_ddrmr;
+   u32 dmc_ddrmr1;
+};
+
+static struct ddr_config ddr_config_table[] = {
+   [0] = {
+   .ddr_clk= 125,  /* 125MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20705212,
+   .dmc_ddrtr1 = 0x201003CF,
+   .dmc_ddrtr2 = 0x00320107,
+   .dmc_ddrmr  = 0x0422,
+   .dmc_ddrmr1 = 0x4,
+   },
+   [1] = {
+   .ddr_clk= 133,  /* 133MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20806313,
+   .dmc_ddrtr1 = 0x2013040D,
+   .dmc_ddrtr2 = 0x00320108,
+   .dmc_ddrmr  = 0x0632,
+   .dmc_ddrmr1 = 0x4,
+   },
+   [2] = {
+   .ddr_clk= 150,  /* 150MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20A07323,
+   .dmc_ddrtr1 = 0x20160492,
+   .dmc_ddrtr2 = 0x00320209,
+   .dmc_ddrmr  = 0x0632,
+   .dmc_ddrmr1 = 0x4,
+   },
+   [3] = {
+   .ddr_clk= 166,  /* 166MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20A07323,
+   .dmc_ddrtr1 = 0x2016050E,
+   .dmc_ddrtr2 = 0x00320209,
+   .dmc_ddrmr  = 0x0632,
+   .dmc_ddrmr1 = 0x4,
+   },
+   [4] = {
+   .ddr_clk= 200,  /* 200MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20a07323,
+   .dmc_ddrtr1 = 0x2016050f,
+   .dmc_ddrtr2 = 0x00320509,
+   .dmc_ddrmr  = 0x0632,
+   .dmc_ddrmr1

[U-Boot] [PATCH V3 12/12] Blackfin: bf60x: add resume from hibernate

2012-11-14 Thread Bob Liu

From: Steven Miao real...@gmail.com

Add Bf60x resume from hibernate support

Signed-off-by: Steven Miao real...@gmail.com
Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/initcode.c |   44 ++
 1 file changed, 44 insertions(+)

diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index 6740e34..3fd6d84 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -504,6 +504,11 @@ maybe_self_refresh(ADI_BOOT_DATA *bs)
return false;
 
 #ifdef __ADSPBF60x__
+   /* resume from hibernate, return false let ddr initialize */
+   if ((bfin_read32(DPM0_STAT)  0xF0) == 0x50) {
+   serial_putc('b');
+   return false;
+   }
 
 #else /* __ADSPBF60x__ */
 
@@ -818,6 +823,7 @@ program_memory_controller(ADI_BOOT_DATA *bs, bool 
put_into_srfs)
while (!(bfin_read_DMC0_STAT()  DLLCALDONE))
continue;
serial_putc('!');
+
 #else /* __ADSPBF60x__ */
 
/* Program the external memory controller before we come out of
@@ -885,7 +891,44 @@ check_hibernation(ADI_BOOT_DATA *bs, u16 vr_ctl, bool 
put_into_srfs)
return;
 
serial_putc('b');
+#ifdef __ADSPBF60x__
+   if (bfin_read32(DPM0_RESTORE0) != 0) {
+   uint32_t reg = bfin_read_DMC0_CTL();
+   reg = ~0x8;
+   bfin_write_DMC0_CTL(reg);
+
+   while ((bfin_read_DMC0_STAT()  0x8))
+   continue;
+   while (!(bfin_read_DMC0_STAT()  0x1))
+   continue;
 
+   serial_putc('z');
+   uint32_t *hibernate_magic = bfin_read32(DPM0_RESTORE4);
+   SSYNC(); /* make sure memory controller is done */
+   if (hibernate_magic[0] == 0xDEADBEEF) {
+   serial_putc('c');
+   SSYNC();
+   bfin_write_EVT15(hibernate_magic[1]);
+   bfin_write_IMASK(EVT_IVG15);
+   __asm__ __volatile__ (
+   /* load reti early to avoid anomaly 281 */
+   reti = %2;
+   /* clear hibernate magic */
+   [%0] = %1;
+   /* load stack pointer */
+   SP = [%0 + 8];
+   /* lower ourselves from reset ivg to ivg15 */
+   raise 15;
+   nop;nop;nop;
+   rti;
+   :
+   : p(hibernate_magic), d(0x2000 /* jump.s 0 
*/), d(0xffa0)
+   );
+   }
+
+
+   }
+#else
/* Are we coming out of hibernate (suspend to memory) ?
 * The memory layout is:
 * 0x0: hibernate magic for anomaly 307 (0xDEADBEEF)
@@ -917,6 +960,7 @@ check_hibernation(ADI_BOOT_DATA *bs, u16 vr_ctl, bool 
put_into_srfs)
}
serial_putc('d');
}
+#endif
 
serial_putc('e');
 }
-- 
1.7.9.5


___
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U-Boot@lists.denx.de
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[U-Boot] [PATCH V3 05/12] Blackfin: bf60x: add rsi/sdh support

2012-11-14 Thread Bob Liu

From: Sonic Zhang sonic.zh...@analog.com

Add rsi/sdh support for bf60x.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/include/asm/mach-common/bits/sdh.h |   38 +++-
 drivers/mmc/bfin_sdh.c   |   68 +-
 2 files changed, 88 insertions(+), 18 deletions(-)

diff --git a/arch/blackfin/include/asm/mach-common/bits/sdh.h 
b/arch/blackfin/include/asm/mach-common/bits/sdh.h
index 8c5dd33..3495558 100644
--- a/arch/blackfin/include/asm/mach-common/bits/sdh.h
+++ b/arch/blackfin/include/asm/mach-common/bits/sdh.h
@@ -12,18 +12,35 @@
 #define CMD_INT_E  0x100  /* Command Interrupt */
 #defineCMD_PEND_E  0x200  /* Command Pending */
 #define CMD_E  0x400  /* Command Enable */
+#ifdef RSI_BLKSZ
+#define   CMD_CRC_CHECK_D  0x800  /* CRC Check is disabled */
+#defineCMD_DATA0_BUSY  0x1000 /* Check for Busy State on the 
DATA0 pin */
+#endif
 
 /* Bit masks for SDH_PWR_CTL */
+#ifndef RSI_BLKSZ
 #definePWR_ON  0x3/* Power On */
 #define SD_CMD_OD  0x40   /* Open Drain Output */
 #define   ROD_CTL  0x80   /* Rod Control */
+#endif
 
 /* Bit masks for SDH_CLK_CTL */
 #defineCLKDIV  0xff   /* MC_CLK Divisor */
 #define CLK_E  0x100  /* MC_CLK Bus Clock Enable */
 #define  PWR_SV_E  0x200  /* Power Save Enable */
 #define CLKDIV_BYPASS  0x400  /* Bypass Divisor */
-#define  WIDE_BUS  0x800  /* Wide Bus Mode Enable */
+#define BUS_MODE_MASK  0x1800 /* Bus Mode Mask */
+#define STD_BUS_1  0x000  /* Standard Bus 1 bit mode */
+#defineWIDE_BUS_4  0x800  /* Wide Bus 4 bit mode */
+#defineBYTE_BUS_8  0x1000 /* Byte Bus 8 bit mode */
+#ifdef RSI_BLKSZ
+#defineCARD_TYPE_MASK  0xe000 /* Card type mask */
+#define  CARD_TYPE_OFFSET  13 /* Card type offset */
+#defineCARD_TYPE_SDIO  0
+#defineCARD_TYPE_eMMC  1
+#define  CARD_TYPE_SD  2
+#define   CARD_TYPE_CEATA  3
+#endif
 
 /* Bit masks for SDH_RESP_CMD */
 #define  RESP_CMD  0x3f   /* Response Command */
@@ -33,7 +50,13 @@
 #define   DTX_DIR  0x2/* Data Transfer Direction */
 #define  DTX_MODE  0x4/* Data Transfer Mode */
 #define DTX_DMA_E  0x8/* Data Transfer DMA Enable */
+#ifndef RSI_BLKSZ
 #define  DTX_BLK_LGTH  0xf0   /* Data Transfer Block Length */
+#else
+
+/* Bit masks for SDH_BLK_SIZE */
+#define  DTX_BLK_LGTH  0x1fff /* Data Transfer Block Length */
+#endif
 
 /* Bit masks for SDH_STATUS */
 #define  CMD_CRC_FAIL  0x1/* CMD CRC Fail */
@@ -102,10 +125,13 @@
 /* Bit masks for SDH_E_STATUS */
 #define  SDIO_INT_DET  0x2/* SDIO Int Detected */
 #define   SD_CARD_DET  0x10   /* SD Card Detect */
+#define  SD_CARD_BUSYMODE  0x8000 /* Card is in Busy mode */
+#define   SD_CARD_SLPMODE  0x4000 /* Card in Sleep Mode */
+#define SD_CARD_READY  0x0002 /* Card Ready */
 
 /* Bit masks for SDH_E_MASK */
 #define  SDIO_MSK  0x2/* Mask SDIO Int Detected */
-#define   SCD_MSK  0x40   /* Mask Card Detect */
+#define   SCD_MSK  0x10   /* Mask Card Detect */
 
 /* Bit masks for SDH_CFG */
 #define   CLKS_EN  0x1/* Clocks Enable */
@@ -114,7 +140,15 @@
 #defineSD_RST  0x10   /* SDMMC Reset */
 #define PUP_SDDAT  0x20   /* Pull-up SD_DAT */
 #definePUP_SDDAT3  0x40   /* Pull-up SD_DAT3 */
+#ifndef RSI_BLKSZ
 #define PD_SDDAT3  0x80   /* Pull-down SD_DAT3 */
+#else
+#definePWR_ON  0x600  /* Power On */
+#define SD_CMD_OD  0x800  /* Open Drain Output */
+#define   BOOT_EN  0x1000 /* Boot Enable */
+#define BOOT_MODE  0x2000 /* Alternate Boot Mode */.
+#define   BOOT_ACK_EN  0x4000 /* Boot ACK is expected */
+#endif
 
 /* Bit masks for SDH_RD_WAIT_EN */
 #define   RWR  0x1/* Read Wait Request */
diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c
index 8d59d46..f22429a 100644
--- a/drivers/mmc/bfin_sdh.c
+++ b/drivers/mmc/bfin_sdh.c
@@ -19,9 +19,7 @@
 #include asm/mach-common/bits/sdh.h
 #include asm/mach-common/bits/dma.h
 
-#if defined(__ADSPBF50x__) || defined(__ADSPBF51x__)
-# define bfin_read_SDH_PWR_CTL bfin_read_RSI_PWR_CONTROL
-# define bfin_write_SDH_PWR_CTLbfin_write_RSI_PWR_CONTROL
+#if defined(__ADSPBF50x__

[U-Boot] [PATCH V3 04/12] Blackfin: bf60x: support big cplb page

2012-11-14 Thread Bob Liu

Bf60x support 16K, 64K, 16M and 64M cplb pages, this patch add support for them.
So that bf609-ezkit can use it's 128M memory.

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/include/asm/cplb.h |   17 +++--
 arch/blackfin/lib/board.c|   27 ---
 2 files changed, 31 insertions(+), 13 deletions(-)

diff --git a/arch/blackfin/include/asm/cplb.h b/arch/blackfin/include/asm/cplb.h
index cc21e93..afdc920 100644
--- a/arch/blackfin/include/asm/cplb.h
+++ b/arch/blackfin/include/asm/cplb.h
@@ -45,9 +45,14 @@
 #define CPLB_INOCACHE  CPLB_USER_RD | CPLB_VALID
 #define CPLB_IDOCACHE  CPLB_INOCACHE | CPLB_L1_CHBL
 
-/* Data Attibutes*/
+#if defined(__ADSPBF60x__)
+#define PAGE_SIZE  (PAGE_SIZE_16MB)
+#else
+#define PAGE_SIZE  (PAGE_SIZE_4MB)
+#endif
 
-#define SDRAM_IGENERIC  (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_USER_RD | 
CPLB_VALID)
+/* Data Attibutes*/
+#define SDRAM_IGENERIC  (PAGE_SIZE | CPLB_L1_CHBL | CPLB_USER_RD | 
CPLB_VALID)
 #define SDRAM_IKERNEL   (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_USER_RD | 
CPLB_VALID | CPLB_LOCK)
 #define L1_IMEMORY  (PAGE_SIZE_1MB | CPLB_USER_RD | CPLB_VALID | 
CPLB_LOCK)
 #define SDRAM_INON_CHBL (PAGE_SIZE_4MB | CPLB_USER_RD | CPLB_VALID)
@@ -59,18 +64,18 @@
 #endif
 
 #ifdef CONFIG_DCACHE_WB/*Write Back Policy */
-#define SDRAM_DGENERIC  (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_DIRTY | 
CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
+#define SDRAM_DGENERIC  (PAGE_SIZE | CPLB_L1_CHBL | CPLB_DIRTY | 
CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
 #define SDRAM_DNON_CHBL (PAGE_SIZE_4MB | CPLB_DIRTY | CPLB_SUPV_WR | 
CPLB_USER_RD | CPLB_USER_WR | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
 #define SDRAM_DKERNEL   (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_USER_RD | 
CPLB_USER_WR | CPLB_DIRTY | CPLB_SUPV_WR | CPLB_VALID | CPLB_LOCK | 
ANOMALY_05000158_WORKAROUND)
 #define L1_DMEMORY  (PAGE_SIZE_4MB | CPLB_SUPV_WR | CPLB_USER_WR | 
CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
-#define SDRAM_EBIU  (PAGE_SIZE_4MB | CPLB_DIRTY | CPLB_USER_RD | 
CPLB_USER_WR | CPLB_SUPV_WR | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
+#define SDRAM_EBIU  (PAGE_SIZE | CPLB_DIRTY | CPLB_USER_RD | 
CPLB_USER_WR | CPLB_SUPV_WR | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
 
 #else  /*Write Through */
-#define SDRAM_DGENERIC  (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_WT | 
CPLB_L1_AOW | CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
+#define SDRAM_DGENERIC  (PAGE_SIZE | CPLB_L1_CHBL | CPLB_WT | 
CPLB_L1_AOW | CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
 #define SDRAM_DNON_CHBL (PAGE_SIZE_4MB | CPLB_WT | CPLB_L1_AOW | 
CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
 #define SDRAM_DKERNEL   (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_WT | 
CPLB_L1_AOW | CPLB_USER_RD | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_VALID | 
CPLB_LOCK | ANOMALY_05000158_WORKAROUND)
 #define L1_DMEMORY  (PAGE_SIZE_4MB | CPLB_SUPV_WR | CPLB_USER_WR | 
CPLB_VALID | ANOMALY_05000158_WORKAROUND)
-#define SDRAM_EBIU  (PAGE_SIZE_4MB | CPLB_WT | CPLB_L1_AOW | 
CPLB_USER_RD | CPLB_USER_WR | CPLB_SUPV_WR | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
+#define SDRAM_EBIU  (PAGE_SIZE | CPLB_WT | CPLB_L1_AOW | 
CPLB_USER_RD | CPLB_USER_WR | CPLB_SUPV_WR | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
 #endif
 
 #endif /* _CPLB_H */
diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c
index c380d27..32c5fc9 100644
--- a/arch/blackfin/lib/board.c
+++ b/arch/blackfin/lib/board.c
@@ -94,12 +94,12 @@ static void display_global_data(void)
printf(   \\-bi_flashoffset: %lx\n, bd-bi_flashoffset);
 }
 
-#define CPLB_PAGE_SIZE (4 * 1024 * 1024)
-#define CPLB_PAGE_MASK (~(CPLB_PAGE_SIZE - 1))
 void init_cplbtables(void)
 {
volatile uint32_t *ICPLB_ADDR, *ICPLB_DATA;
volatile uint32_t *DCPLB_ADDR, *DCPLB_DATA;
+   uint32_t cplb_page_size;
+   uint32_t cplb_page_mask;
uint32_t extern_memory;
size_t i;
 
@@ -127,12 +127,19 @@ void init_cplbtables(void)
icplb_add(0xFFA0, L1_IMEMORY);
dcplb_add(0xFF80, L1_DMEMORY);
++i;
+#if defined(__ADSPBF60x__)
+   icplb_add(0x0, 0x0);
+   dcplb_add(CONFIG_SYS_FLASH_BASE, SDRAM_EBIU);
+   ++i;
+#endif
+   cplb_page_size = (4 * 1024 * 1024);
+   cplb_page_mask = (~(cplb_page_size - 1));
 
if (CONFIG_MEM_SIZE) {
uint32_t mbase = CONFIG_SYS_MONITOR_BASE;
uint32_t mend  = mbase + CONFIG_SYS_MONITOR_LEN;
-   mbase = CPLB_PAGE_MASK;
-   mend = CPLB_PAGE_MASK

[U-Boot] [PATCH V3 07/12] Blackfin: spi: add bf6xx spi driver

2012-11-14 Thread Bob Liu

From: Scott Jiang scott.jiang.li...@gmail.com

Spi driver for bf60x is different from old one, so implement a new
driver for it.

Signed-off-by: Scott Jiang scott.jiang.li...@gmail.com
Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 .../blackfin/include/asm/mach-common/bits/spi6xx.h |  240 +++
 drivers/spi/Makefile   |1 +
 drivers/spi/bfin_spi6xx.c  |  308 
 3 files changed, 549 insertions(+)
 create mode 100644 arch/blackfin/include/asm/mach-common/bits/spi6xx.h
 create mode 100644 drivers/spi/bfin_spi6xx.c

diff --git a/arch/blackfin/include/asm/mach-common/bits/spi6xx.h 
b/arch/blackfin/include/asm/mach-common/bits/spi6xx.h
new file mode 100644
index 000..8b8dd25
--- /dev/null
+++ b/arch/blackfin/include/asm/mach-common/bits/spi6xx.h
@@ -0,0 +1,240 @@
+/*
+ * Analog Devices bfin_spi3 controller driver
+ *
+ * Copyright (c) 2011 Analog Devices Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _SPI_CHANNEL_H_
+#define _SPI_CHANNEL_H_
+
+#include linux/types.h
+
+/* SPI_CONTROL */
+#define SPI_CTL_EN  0x0001/* Enable */
+#define SPI_CTL_MSTR0x0002/* Master/Slave */
+#define SPI_CTL_PSSE0x0004/* controls modf error in 
master mode */
+#define SPI_CTL_ODM 0x0008/* Open Drain Mode */
+#define SPI_CTL_CPHA0x0010/* Clock Phase */
+#define SPI_CTL_CPOL0x0020/* Clock Polarity */
+#define SPI_CTL_ASSEL   0x0040/* Slave Select Pin Control 
*/
+#define SPI_CTL_SELST   0x0080/* Slave Select Polarity 
in-between transfers */
+#define SPI_CTL_EMISO   0x0100/* Enable MISO */
+#define SPI_CTL_SIZE0x0600/* Word Transfer Size */
+#define SPI_CTL_SIZE08  0x/* SIZE: 8 bits */
+#define SPI_CTL_SIZE16  0x0200/* SIZE: 16 bits */
+#define SPI_CTL_SIZE32  0x0400/* SIZE: 32 bits */
+#define SPI_CTL_LSBF0x1000/* LSB First */
+#define SPI_CTL_FCEN0x2000/* Flow-Control Enable */
+#define SPI_CTL_FCCH0x4000/* Flow-Control Channel 
Selection */
+#define SPI_CTL_FCPL0x8000/* Flow-Control Polarity */
+#define SPI_CTL_FCWM0x0003/* Flow-Control Water-Mark */
+#define SPI_CTL_FIFO0   0x/* FCWM: TFIFO empty or 
RFIFO Full */
+#define SPI_CTL_FIFO1   0x0001/* FCWM: TFIFO 75% or more 
empty or RFIFO 75% or more full */
+#define SPI_CTL_FIFO2   0x0002/* FCWM: TFIFO 50% or more 
empty or RFIFO 50% or more full */
+#define SPI_CTL_FMODE   0x0004/* Fast-mode Enable */
+#define SPI_CTL_MIOM0x0030/* Multiple I/O Mode */
+#define SPI_CTL_MIO_DIS 0x/* MIOM: Disable */
+#define SPI_CTL_MIO_DUAL0x0010/* MIOM: Enable DIOM (Dual 
I/O Mode) */
+#define SPI_CTL_MIO_QUAD0x0020/* MIOM: Enable QUAD (Quad 
SPI Mode) */
+#define SPI_CTL_SOSI0x0040/* Start on MOSI */
+/* SPI_RX_CONTROL */
+#define SPI_RXCTL_REN   0x0001/* Receive Channel Enable */
+#define SPI_RXCTL_RTI   0x0004/* Receive Transfer Initiate 
*/
+#define SPI_RXCTL_RWCEN 0x0008/* Receive Word Counter 
Enable */
+#define SPI_RXCTL_RDR   0x0070/* Receive Data Request */
+#define SPI_RXCTL_RDR_DIS   0x/* RDR: Disabled */
+#define SPI_RXCTL_RDR_NE0x0010/* RDR: RFIFO not empty */
+#define SPI_RXCTL_RDR_250x0020/* RDR: RFIFO 25% full */
+#define SPI_RXCTL_RDR_500x0030/* RDR: RFIFO 50% full */
+#define SPI_RXCTL_RDR_750x0040/* RDR: RFIFO 75% full */
+#define SPI_RXCTL_RDR_FULL  0x0050/* RDR: RFIFO full */
+#define SPI_RXCTL_RDO   0x0100/* Receive Data Over-Run */
+#define SPI_RXCTL_RRWM  0x3000/* FIFO Regular Water-Mark */
+#define SPI_RXCTL_RWM_0 0x/* RRWM: RFIFO Empty */
+#define SPI_RXCTL_RWM_25

Re: [U-Boot] [PATCH 01/13] Blackfin: BF60x: new processor header files

2012-09-05 Thread Bob Liu

Hi Wolfgang,

Thank you for your review.

On Sun, Sep 2, 2012 at 10:10 PM, Wolfgang Denk w...@denx.de wrote:
 Dear Bob Liu,

 In message 1345526833-10804-1-git-send-email-lliu...@gmail.com you wrote:
 Add header files for blackfin new processor bf60x.

 Signed-off-by: Bob Liu lliu...@gmail.com
 ---
  arch/blackfin/include/asm/blackfin_cdef.h |3 +
  arch/blackfin/include/asm/blackfin_def.h  |5 +
  arch/blackfin/include/asm/blackfin_local.h|3 +
  arch/blackfin/include/asm/mach-bf609/BF609_cdef.h |  543 +++
  arch/blackfin/include/asm/mach-bf609/BF609_def.h  | 3758 
 +
  arch/blackfin/include/asm/mach-bf609/anomaly.h|  128 +
  arch/blackfin/include/asm/mach-bf609/def_local.h  |5 +
  arch/blackfin/include/asm/mach-bf609/portmux.h|  257 ++
  arch/blackfin/include/asm/mach-bf609/ports.h  |  103 +
  arch/blackfin/include/asm/mach-common/bits/cgu.h  |   80 +
  arch/blackfin/include/asm/mach-common/bits/dde.h  |   88 +
  arch/blackfin/include/asm/mach-common/bits/mpu.h  |6 +-
  arch/blackfin/include/asm/mach-common/bits/pll.h  |5 +
  13 files changed, 4983 insertions(+), 1 deletion(-)
  create mode 100644 arch/blackfin/include/asm/mach-bf609/BF609_cdef.h
  create mode 100644 arch/blackfin/include/asm/mach-bf609/BF609_def.h
  create mode 100644 arch/blackfin/include/asm/mach-bf609/anomaly.h
  create mode 100644 arch/blackfin/include/asm/mach-bf609/def_local.h
  create mode 100644 arch/blackfin/include/asm/mach-bf609/portmux.h
  create mode 100644 arch/blackfin/include/asm/mach-bf609/ports.h
  create mode 100644 arch/blackfin/include/asm/mach-common/bits/cgu.h
  create mode 100644 arch/blackfin/include/asm/mach-common/bits/dde.h

 Please make sure to have the string PATCH included with all patch
 submissions, otherwise your patches are lost to patchwork, and most
 likely to the respective custodian as well.

 --- /dev/null
 +++ b/arch/blackfin/include/asm/mach-bf609/BF609_cdef.h
 ...
 +#define bfin_read_CGU_STAT() bfin_read32(CGU_STAT)
 +#define bfin_read_CGU_CLKOUTSEL() bfin_read32(CGU_CLKOUTSEL)
 +#define bfin_read_CGU_CTL() bfin_read32(CGU_CTL)
 +#define bfin_write_CGU_CTL(val) bfin_write32(CGU_CTL, val)
 +#define bfin_read_CGU_DIV() bfin_read32(CGU_DIV)
 +#define bfin_write_CGU_DIV(val) bfin_write32(CGU_DIV, val)

 We don't allow CamelCaps identifiers.  Please fix globally.


Sorry, i didn't get your idea here.


 +#define CNT_CFG 0xFFC00400 /* CNT0 
 Configuration Register */
 +#define CNT_IMSK0xFFC00404 /* CNT0 Interrupt 
 Mask Register */
 +#define CNT_STAT0xFFC00408 /* CNT0 Status 
 Register */
 +#define CNT_CMD 0xFFC0040C /* CNT0 Command 
 Register */
 +#define CNT_DEBNCE  0xFFC00410 /* CNT0 Debounce 
 Register */
 +#define CNT_CNTR0xFFC00414 /* CNT0 Counter 
 Register */
 +#define CNT_MAX 0xFFC00418 /* CNT0 Maximum 
 Count Register */
 +#define CNT_MIN 0xFFC0041C /* CNT0 Minimum 
 Count Register */

 We don't allow register access based on raw addresses or base address
 plus offset.  Please define proper C structs to describe your
 hardware.   Please fix globally.


C structs can be defined to access these registers in other place.
But this file is come from our hardware team i can't change it.


 --- /dev/null
 +++ b/arch/blackfin/include/asm/mach-bf609/anomaly.h
 @@ -0,0 +1,128 @@
 +/*
 + * DO NOT EDIT THIS FILE
 + * This file is under version control at
 + *   
 svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
 + * and can be replaced with that version at any time
 + * DO NOT EDIT THIS FILE

 This is bullshit.  If you submit code to U-Boot, it gets maintained in
 the U-Boot git repository.  Dump this.

 + * Copyright 2004-2010 Analog Devices Inc.
 + * Licensed under the ADI BSD license.
 + *   https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd

 Is this GPL compatible??

 The link is dead and returns only

 This topic does not exist yet

 +#define ANOMALY_0574 (1)

 Please do not put parens around simple defines.  Please fix globally.


Will be fixed.

 Checkpatch throws a ton of errors that all need fixing.


Which Checkpatch script are you using?
In my test there are only WARNING: line over 80 characters.

total: 0 errors, 3546 warnings, 5018 lines checked

NOTE: Ignored message types: COMPLEX_MACRO CONSIDER_KSTRTO MINMAX
MULTISTATEMENT_MACRO_USE_DO_WHILE

/home/bob/u-boot2/0001-Blackfin-BF60x-new-processor-header-files.patch
has style problems, please review.

 Also note that we don't allow fixed network parameters (like
 CONFIG_ETHADDR) in board config files.


Will be fixed.

 Review stops here (except for the last part with the licensing stuff).


Thank you !

-- 
Regards,
--Bob
___
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Re: [U-Boot] [PATCH 01/16] Blackfin: BF60x: new processor port

2012-08-20 Thread Bob Liu

On Wed, Aug 8, 2012 at 12:39 PM, Mike Frysinger vap...@gentoo.org wrote:
 On Tuesday 07 August 2012 04:07:40 Bob Liu wrote:
 From: Mike Frysinger vap...@gentoo.org

 Add basic support for blackfin new processor BF60x.

 i had always intended to clean  split this 1 change up, but never got a
 chance before i left

  arch/blackfin/cpu/cpu.c|4 +-
  arch/blackfin/cpu/gpio.c   |   36 +-
  arch/blackfin/cpu/initcode.c   |   53 +-
  arch/blackfin/cpu/reset.c  |2 +
  arch/blackfin/cpu/serial.c |   65 +-
  arch/blackfin/cpu/serial.h |  222 +-
  arch/blackfin/cpu/serial1.h|  236 ++
  arch/blackfin/cpu/serial4.h|  113 +
  arch/blackfin/include/asm/blackfin_cdef.h  |3 +
  arch/blackfin/include/asm/blackfin_def.h   |5 +
  arch/blackfin/include/asm/blackfin_local.h |2 +
  arch/blackfin/include/asm/dma.h|  113 +-
  arch/blackfin/include/asm/gpio.h   |2 +-
  arch/blackfin/include/asm/mach-bf609/BF609_cdef.h  |  540 +++
  arch/blackfin/include/asm/mach-bf609/BF609_def.h   | 3752
  arch/blackfin/include/asm/mach-bf609/anomaly.h |
  arch/blackfin/include/asm/mach-bf609/def_local.h   |5 +
  arch/blackfin/include/asm/mach-bf609/gpio.h|  151 +
  arch/blackfin/include/asm/mach-bf609/portmux.h |  251 ++
  arch/blackfin/include/asm/mach-bf609/ports.h   |   63 +
  arch/blackfin/include/asm/mach-common/bits/cgu.h   |   78 +
  arch/blackfin/include/asm/mach-common/bits/dde.h   |   88 +
  arch/blackfin/include/asm/mach-common/bits/dma.h   |1 +
  arch/blackfin/include/asm/mach-common/bits/pll.h   |5 +
  arch/blackfin/include/asm/mach-common/bits/uart4.h |   66 +
  arch/blackfin/lib/board.c  |2 +-
  arch/blackfin/lib/clocks.c |  128 +-
  arch/blackfin/lib/string.c |   97 +-
  include/configs/bfin_adi_common.h  |2 +

 i would split this into at least 5 pieces:
  - gpio changes
  - dma changes
  - serial changes
  - new headers (asm/mach-bf609/* and the blackfin_{cdef,def,local} changes
 which include those)
  - core changes (cpu/reset/board/etc...)

Okay, it will be split in next version.

 once that's been split up, it'll be much easier to digest/review.  some
 changes i won't mind merging now, but others (see below) will clearly need
 updating first

 --- a/arch/blackfin/cpu/initcode.c
 +++ b/arch/blackfin/cpu/initcode.c
 @@ -16,17 +16,21 @@
  #include asm/mach-common/bits/bootrom.h
  #include asm/mach-common/bits/core.h
  #include asm/mach-common/bits/ebiu.h
 -#include asm/mach-common/bits/pll.h
 -#include asm/mach-common/bits/uart.h
 +
 +#define BUG() while (1) { asm volatile(emuexcpt;); }

  #define BUG() while (1) { asm volatile(emuexcpt;); }

 looks like you got a rebase error here

Will be updated

 +#if 0
 +
 +#include asm/mach-common/bits/pll.h

 well that'll obviously need updating :)

Will be updated

 +#else
 +
 +#include asm/mach-common/bits/cgu.h
 +
 +#ifndef CONFIG_CGU_CTL_VAL
 +# define CONFIG_CGU_CTL_VAL ((CONFIG_VCO_MULT  8) | CONFIG_CLKIN_HALF)
 +#endif
 +
 +#ifndef CONFIG_CGU_DIV_VAL
 +# define CONFIG_CGU_DIV_VAL \
 + ((CONFIG_CCLK_DIVCSEL_P)   | \
 +  (CONFIG_SCLK0_DIV   S0SEL_P)  | \
 +  (CONFIG_SYSCLK_DIV  SYSSEL_P) | \
 +  (CONFIG_SCLK1_DIV   S1SEL_P)  | \
 +  (CONFIG_DCLK_DIVDSEL_P)   | \
 +  (CONFIG_OCLK_DIVOSEL_P))
 +#endif
 +
 +BOOTROM_CALLED_FUNC_ATTR
 +void initcode(ADI_BOOT_DATA *bs)
 +{
 +}
 +
 +#endif

 there was no bootrom when i did the initial port.  i'd like to think that
 there's a bootrom now that you guys have actual silicon back.  is that not the
 case ?  this will def need implementing, otherwise how can you boot a bf60x
 cpu ?

Will be implemented.

 --- a/arch/blackfin/lib/board.c
 +++ b/arch/blackfin/lib/board.c

   (Detected Rev: 0.%d) 
   (%s boot)\n,
   gd-bd-bi_cpu,
 - bfin_revid(),
 + /*bfin_revid()*/0,
   get_bfin_boot_mode(CONFIG_BFIN_BOOT_MODE));
   return 0;
  }

 that needs implementing :)

Will be implemented.


 --- a/include/configs/bfin_adi_common.h
 +++ b/include/configs/bfin_adi_common.h

  #ifndef CONFIG_DEBUG_EARLY_SERIAL
 +#ifndef __ADSPBF60x__
  # define CONFIG_SERIAL_MULTI
  # define CONFIG_SYS_BFIN_UART
  #endif
 +#endif

 i don't recall if i turned this off as an optimization for early work, or
 because it was unimplemented.  i think the former, but if it's the latter,
 it'll need implementing and this ifdef thrown away.

Will be implemented.
Thank you!

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Re: [U-Boot] [PATCH 02/16] Blackfin: bf609-ezkit: new board port

2012-08-20 Thread Bob Liu

On Wed, Aug 8, 2012 at 12:41 PM, Mike Frysinger vap...@gentoo.org wrote:
 On Tuesday 07 August 2012 04:07:41 Bob Liu wrote:
  arch/blackfin/cpu/initcode.c   |   96 ++-
  arch/blackfin/cpu/initcode.h   |9 ++
  arch/blackfin/cpu/serial1.h|   19 +++
  arch/blackfin/cpu/serial4.h|   35 +-
  arch/blackfin/include/asm/mach-bf609/portmux.h |5 +
  arch/blackfin/include/asm/mach-bf609/ports.h   |   56 +++--
  board/bf609-ezkit/Makefile |   54 +
  board/bf609-ezkit/bf609-ezkit.c|   63 ++
  boards.cfg |1 +
  common/cmd_reginfo.c   |4 +-
  include/configs/bf609-ezkit.h  |  148

 another one i intended on cleaning up  splitting, and in some cases merging
 with the first commit in this series.  many of these changes are clearly not
 board-specific, so they should be squashed into the initial core patches.

Will be split.


 also, needs a new entry in the MAINTAINERS file

Okay.

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Re: [U-Boot] [PATCH 03/16] Blackfin: Bf60x: support big cplb page

2012-08-20 Thread Bob Liu

On Wed, Aug 8, 2012 at 12:48 PM, Mike Frysinger vap...@gentoo.org wrote:
 On Tuesday 07 August 2012 04:07:42 Bob Liu wrote:
 Bf60x support 16K, 64K, 16M and 64M cplb pages, this patch add support for
 them. So that bf609-ezkit can use it's 128M memory.

 it's - its

  arch/blackfin/include/asm/cplb.h |   13 +-
  arch/blackfin/include/asm/mach-common/bits/mpu.h |6 -
  arch/blackfin/lib/board.c|   28
 -- include/configs/bf609-ezkit.h|
   6 +
  4 files changed, 39 insertions(+), 14 deletions(-)

 diff --git a/arch/blackfin/include/asm/cplb.h
 b/arch/blackfin/include/asm/cplb.h index cc21e93..5a0588b 100644
 --- a/arch/blackfin/include/asm/cplb.h
 +++ b/arch/blackfin/include/asm/cplb.h
 @@ -46,8 +46,11 @@
  #define CPLB_IDOCACHECPLB_INOCACHE | CPLB_L1_CHBL

  /* Data Attibutes*/
 -
 +#if defined(__ADSPBF60x__)
 +#define SDRAM_IGENERIC  (PAGE_SIZE_16MB | CPLB_L1_CHBL |
 CPLB_USER_RD | CPLB_VALID)
 +#else
  #define SDRAM_IGENERIC  (PAGE_SIZE_4MB | CPLB_L1_CHBL |
  CPLB_USER_RD | CPLB_VALID)
 +#endif

 many of these ifdefs are largely the same thing.  add a define at the top 
 like:
 #ifdef __ADSPBF60x__
 # define PAGE_SIZE_MAX PAGE_SIZE_16MB
 #else
 # define PAGE_SIZE_MAX PAGE_SIZE_14MB
 #endif

 and then use that in all the other places.  this way you don't need to
 duplicate the vast majority of the content.

Okay.


 --- a/arch/blackfin/include/asm/mach-common/bits/mpu.h
 +++ b/arch/blackfin/include/asm/mach-common/bits/mpu.h

 this should get merged into the main cpu update patch i think

 --- a/arch/blackfin/lib/board.c
 +++ b/arch/blackfin/lib/board.c

  void init_cplbtables(void)
  {
 ...
 +#if defined(__ADSPBF60x__)
 + icplb_add(0x0, 0x0);

 err, why ?

Because other place use value i for both icplb and dcplb this make
them consistent.


 + dcplb_add(CONFIG_SYS_FLASH_BASE, PAGE_SIZE_16MB | CPLB_DIRTY |
 + CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | 
 CPLB_VALID);

 can't you use SDRAM_EBIU/SDRAM_INON_CHBL like BF5xx ?  that's what the code
 below is for:
 +#ifndef __ADSPBF60x__
   icplb_add(0x2000, SDRAM_INON_CHBL);
   dcplb_add(0x2000, SDRAM_EBIU);
   ++i;
 +#endif

 this is the async memory blocks ...

 + cplb_page_size = (4 * 1024 * 1024);
 + cplb_page_mask = (~(cplb_page_size - 1));

 why only use CPLBs of 4 megs for external memory on BF60x ?  you would want to
 maximize the usage of 16MiB to reduce CPLB overhead.

Bf60x will reinit cplb_page_size/mask behind.


 --- a/include/configs/bf609-ezkit.h
 +++ b/include/configs/bf609-ezkit.h
 @@ -62,11 +62,10 @@
  #define CONFIG_BFIN_GET_SCLK0 (get_sclk()/CONFIG_SCLK0_DIV)
  #define CONFIG_BFIN_GET_SCLK1 (get_sclk()/CONFIG_SCLK1_DIV)

 -
  /*
   * Memory Settings
   */
 -#define CONFIG_MEM_SIZE  32
 +#define CONFIG_MEM_SIZE  128

  #define CONFIG_SMC_GCTL_VAL  0x0010
  #define CONFIG_SMC_B1CTL_VAL 0x01002001
 @@ -76,9 +75,6 @@
  #define CONFIG_SYS_MONITOR_LEN   (256 * 1024)
  #define CONFIG_SYS_MALLOC_LEN(256 * 1024)

 -#define CONFIG_ICACHE_OFF
 -#define CONFIG_DCACHE_OFF
 -
  /*
   * Network Settings
   */

 once the CPLB code is updated, you can squash this into the new bf609-ezkit
 patch

Okay.

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Re: [U-Boot] [PATCH 04/16] Blackfin: Rsi: add support for bf609-ezkit

2012-08-20 Thread Bob Liu

On Wed, Aug 8, 2012 at 12:52 PM, Mike Frysinger vap...@gentoo.org wrote:
 On Tuesday 07 August 2012 04:07:43 Bob Liu wrote:
 --- a/arch/blackfin/include/asm/config-pre.h
 +++ b/arch/blackfin/include/asm/config-pre.h

  #define BFIN_BOOT_16HOST_DMA  11  /* boot ldr from 16-bit host dma */
  #define BFIN_BOOT_8HOST_DMA   12  /* boot ldr from 8-bit host dma */
  #define BFIN_BOOT_NAND13  /* boot ldr from nand flash */
 +#define BFIN_BOOT_RSI_MASTER  14  /* boot ldr from rsi */
 +#define BFIN_BOOT_LP_SLAVE15  /* boot ldr from link port */

 case BFIN_BOOT_16HOST_DMA: return 16bit dma;
   case BFIN_BOOT_8HOST_DMA:  return 8bit dma;
   case BFIN_BOOT_NAND:   return nand flash;
 + case BFIN_BOOT_RSI_MASTER: return rsi master;
 + case BFIN_BOOT_LP_SLAVE:   return link port slave;
   default:   return INVALID;
   }
  }

 seems like a change that should be by itself, or squashed into the core bf60x
 support patch

 --- a/arch/blackfin/include/asm/mach-common/bits/dma.h
 +++ b/arch/blackfin/include/asm/mach-common/bits/dma.h

 should be part of the bf60x dma patch

 --- a/arch/blackfin/include/asm/mach-common/bits/sdh.h
 +++ b/arch/blackfin/include/asm/mach-common/bits/sdh.h
 --- a/drivers/mmc/bfin_sdh.c
 +++ b/drivers/mmc/bfin_sdh.c

 these are about the only changes that should be in this patch, and the subject
 should be:
 Blackfin: rsi: add support for bf60x

 --- a/board/bf609-ezkit/bf609-ezkit.c
 +++ b/board/bf609-ezkit/bf609-ezkit.c
 --- a/include/configs/bf609-ezkit.h
 +++ b/include/configs/bf609-ezkit.h

 merge the rsi patch first, then squash this into the bf609-ezkit board patch

Okay.
-- 
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--Bob
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Re: [U-Boot] [PATCH 05/16] Blackfin: Paraflash: add support for bf609-ezkit

2012-08-20 Thread Bob Liu

On Wed, Aug 8, 2012 at 12:55 PM, Mike Frysinger vap...@gentoo.org wrote:
 On Tuesday 07 August 2012 04:07:44 Bob Liu wrote:
 --- a/arch/blackfin/include/asm/mach-bf609/portmux.h
 +++ b/arch/blackfin/include/asm/mach-bf609/portmux.h

 this should be part of the initial commit of this header (one of the initial
 bf60x support patches)

 --- a/board/bf609-ezkit/bf609-ezkit.c
 +++ b/board/bf609-ezkit/bf609-ezkit.c
 --- a/include/configs/bf609-ezkit.h
 +++ b/include/configs/bf609-ezkit.h

 then squash these into the initial bf609-ezkit board patch

 --- a/include/configs/bfin_adi_common.h
 +++ b/include/configs/bfin_adi_common.h
 @@ -195,10 +195,12 @@
   nand erase 0 0x4; \
   nand write $(loadaddr) 0 0x4
  # else
 -#  define UBOOT_ENV_UPDATE \
 +#  ifndef UBOOT_ENV_UPDATE
 +#   define UBOOT_ENV_UPDATE \
   protect off 0x2000 +$(filesize); \
   erase 0x2000 +$(filesize); \
   cp.b $(loadaddr) 0x2000 $(filesize)
 +#  endif
  # endif
  # ifdef CONFIG_NETCONSOLE
  #  define NETCONSOLE_ENV \

 replace the 0x2000 with a define and then there's no need to override it
 #   define UBOOT_ENV_UPDATE \
 protect off  MK_STR(CONFIG_SYS_FLASH_BASE)  +$(filesize); \
 erase  MK_STR(CONFIG_SYS_FLASH_BASE)  +$(filesize); \
 cp.b $(loadaddr)  MK_STR(CONFIG_SYS_FLASH_BASE)  $(filesize)

Okay.

-- 
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Re: [U-Boot] [PATCH 06/16] Blackfin: Bf609-ezkit: implement soft switch

2012-08-20 Thread Bob Liu

On Wed, Aug 8, 2012 at 12:59 PM, Mike Frysinger vap...@gentoo.org wrote:
 On Tuesday 07 August 2012 04:07:45 Bob Liu wrote:
 --- a/board/bf609-ezkit/Makefile
 +++ b/board/bf609-ezkit/Makefile

 +COBJS-$(CONFIG_BFIN_SOFT_SWITCH)   += soft_switch.o

 is there any reason we *wouldn't* want to build this ?  i would just skip
 making this an option and always enable it.

 also, any reason for not just squashing into the initial bf609-ezkit board
 port ?  there's quite a bit of rudimentary code in bf609-ezkit.c before to
 support this.

Okay.


 --- a/board/bf609-ezkit/bf609-ezkit.c
 +++ b/board/bf609-ezkit/bf609-ezkit.c

 +/* miscellaneous platform dependent initialisations */
 +int misc_init_r(void)
 +{
 + printf(other init\n);

 useless display - delete

Will be deleted.


 --- /dev/null
 +++ b/board/bf609-ezkit/soft_switch.c

 +#ifdef CONFIG_BFIN_BOARD_VERSION_1_0
 +#define SWITCH_ADDR 0x21
 +#else
 +#define SWITCH_ADDR 0x20
 +#endif

 must this be a runtime define ?  can't you probe the slave address at runtime
 to figure out which one to use ?

This will be removed. We only support board version above 1.0.

 start with the address that the newest boards are using, and then fallback to
 the older ones.  this way there's no runtime penalty on newer boards, but
 older ones continue to work.

 shouldn't there be a new u-boot command here so people can toggle peripherals
 themselves ?  i thought that was the intention when we first discussed this
 idea with the firmware team.

I don't know whether a blackfin specific u-boot command can be accepted.
What about merge these series with the default setting first?
Because it's already a little big, let's make it simple at first.

And then we can consider to add a new command in a separated patch in future.
Thank you.

-- 
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Re: [U-Boot] [PATCH 07/16] Blackfin: Spi: add bf6xx spi driver

2012-08-20 Thread Bob Liu

On Wed, Aug 8, 2012 at 1:02 PM, Mike Frysinger vap...@gentoo.org wrote:
 On Tuesday 07 August 2012 04:07:46 Bob Liu wrote:
 --- /dev/null
 +++ b/arch/blackfin/include/asm/mach-common/bits/spi6xx.h
 @@ -0,0 +1,240 @@
 +/*
 + * Analog Devices SPI3 controller driver

 i'd prefer to call it bfin_spi3 then since it represents the version of the
 IP block and not the SoC it happens to be shipped with

 --- a/include/configs/bf609-ezkit.h
 +++ b/include/configs/bf609-ezkit.h

 this should be squashed into the bf609-ezkit board port patch
 -mike

Okay

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Re: [U-Boot] [PATCH 08/16] Blackfin: add more print info for Bf60x

2012-08-20 Thread Bob Liu

On Wed, Aug 8, 2012 at 1:04 PM, Mike Frysinger vap...@gentoo.org wrote:
 On Tuesday 07 August 2012 04:07:47 Bob Liu wrote:
 --- a/arch/blackfin/lib/clocks.c
 +++ b/arch/blackfin/lib/clocks.c

 +u_long get_dclk(void)
 +{
 +#ifndef CONFIG_BFIN_GET_DCLK
 + return _get_sclk(cached_dclk);
 +#else
 + return CONFIG_BFIN_GET_DCLK;
 +#endif
 +}

 this looks like my incomplete hack where the implementation of clock lookups
 weren't finished.  that was because at the time, the hardware blocks of the
 bf60x were not finished which means i couldn't query the MMRs to calculate the
 values.  please implement this ...

Will be implemented.


 --- a/include/configs/bf609-ezkit.h
 +++ b/include/configs/bf609-ezkit.h

  #define CONFIG_BFIN_GET_SCLK (CONFIG_PLL_CLK/CONFIG_SYSCLK_DIV)
  #define CONFIG_BFIN_GET_SCLK0 (get_sclk()/CONFIG_SCLK0_DIV)
  #define CONFIG_BFIN_GET_SCLK1 (get_sclk()/CONFIG_SCLK1_DIV)
 +#define CONFIG_BFIN_GET_DCLK (get_cclk()/CONFIG_DCLK_DIV)

 and then point all these hard coded defines.  these existed purely for initial
 FPGA bring up and were not intended to be shipped as the final code.

Will be updated.
Thank you
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Re: [U-Boot] [PATCH 09/16] Blackfin: Bf60x: add reset support

2012-08-20 Thread Bob Liu

On Wed, Aug 8, 2012 at 1:05 PM, Mike Frysinger vap...@gentoo.org wrote:
 please squash into one of the initial bf60x cpu support patches
 -mike

Okay.

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Re: [U-Boot] [PATCH 10/16] Blackfin: Bf60x: Check card ready for each RSI command

2012-08-20 Thread Bob Liu

On Wed, Aug 8, 2012 at 1:05 PM, Mike Frysinger vap...@gentoo.org wrote:
 On Tuesday 07 August 2012 04:07:49 Bob Liu wrote:
 Set up RSI data before sending RSI command if data is applicable.

 squash into the Blackfin: rsi: add bf60x support patch
 -mike

Okay.

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Re: [U-Boot] [PATCH 13/16] Blackfin: Bf60x: add hw watchdog support

2012-08-20 Thread Bob Liu

On Wed, Aug 8, 2012 at 1:11 PM, Mike Frysinger vap...@gentoo.org wrote:
 On Tuesday 07 August 2012 04:07:52 Bob Liu wrote:
 --- a/arch/blackfin/cpu/initcode.c
 +++ b/arch/blackfin/cpu/initcode.c

   if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS) {
   serial_putc('e');
 +#ifdef __ADSPBF60x__
 + int i;
 + bfin_write_SEC_GCTL(0x2);
 + while (i++  10);
 + bfin_write_SEC_FCTL(0xc1);
 + bfin_write_SEC_SCTL(2, bfin_read_SEC_SCTL(2) | 0x6);
 +
 + bfin_write_SEC_CCTL(0x2);
 + while (i++  10);
 + bfin_write_SEC_GCTL(0x1);
 + bfin_write_SEC_CCTL(0x1);
 +#endif

 err, this doesn't look like hardware watchdog ... this is the interrupt
 controller isn't it ?

The interrupt controller in bf60x has integrated a fault controller.
The watchdog can trigger a reset fault then the system can do automatic reset.


 those while() loops also won't fly -- you need to use a proper sync function
 here.  certainly not without comments as to what's going on.

Will be updated.


 --- a/arch/blackfin/cpu/start.S
 +++ b/arch/blackfin/cpu/start.S
 @@ -65,6 +65,7 @@ ENTRY(_start)
   p5.h = HI(COREMMR_BASE);

  #ifdef CONFIG_HW_WATCHDOG
 +#ifndef __ADSPBF60x__
  # ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START
  #  define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000
  # endif
 @@ -78,6 +79,7 @@ ENTRY(_start)
   /* fire up the watchdog - R0.L above needs to be 0x */
   W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r0;
  #endif
 +#endif

 you need to implement the bf60x equivalent here and not just disable the bf5xx
 code

This code is setup a watchdog for bootstrap itself before entering
uboot common routine.
It's not that important and a little complicate to setup the interrupt
controller using  assemble.
So i'd prefer to disable it for bf60x first.

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Re: [U-Boot] [PATCH 16/16] Blackfin: update license to Clear BSD license.

2012-08-20 Thread Bob Liu

On Wed, Aug 8, 2012 at 1:12 PM, Mike Frysinger vap...@gentoo.org wrote:
 obviously this is OK regardless of my opinion on it ;)
 -mike

Thank for all your review.

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[U-Boot] [PATCH 04/13] Blackfin: Bf60x: support big cplb page

2012-08-20 Thread Bob Liu

Bf60x support 16K, 64K, 16M and 64M cplb pages, this patch add support for them.
So that bf609-ezkit can use it's 128M memory.

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/include/asm/cplb.h |   17 +++--
 arch/blackfin/lib/board.c|   27 ---
 2 files changed, 31 insertions(+), 13 deletions(-)

diff --git a/arch/blackfin/include/asm/cplb.h b/arch/blackfin/include/asm/cplb.h
index cc21e93..65d1cbf 100644
--- a/arch/blackfin/include/asm/cplb.h
+++ b/arch/blackfin/include/asm/cplb.h
@@ -45,9 +45,14 @@
 #define CPLB_INOCACHE  CPLB_USER_RD | CPLB_VALID
 #define CPLB_IDOCACHE  CPLB_INOCACHE | CPLB_L1_CHBL
 
-/* Data Attibutes*/
+#if defined(__ADSPBF60x__)
+#define PAGE_SIZE  (PAGE_SIZE_16MB)
+#else
+#define PAGE_SIZE  (PAGE_SIZE_4MB)
+#endif
 
-#define SDRAM_IGENERIC  (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_USER_RD | 
CPLB_VALID)
+/* Data Attibutes*/
+#define SDRAM_IGENERIC  (PAGE_SIZE | CPLB_L1_CHBL | CPLB_USER_RD | 
CPLB_VALID)
 #define SDRAM_IKERNEL   (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_USER_RD | 
CPLB_VALID | CPLB_LOCK)
 #define L1_IMEMORY  (PAGE_SIZE_1MB | CPLB_USER_RD | CPLB_VALID | 
CPLB_LOCK)
 #define SDRAM_INON_CHBL (PAGE_SIZE_4MB | CPLB_USER_RD | CPLB_VALID)
@@ -59,18 +64,18 @@
 #endif
 
 #ifdef CONFIG_DCACHE_WB/*Write Back Policy */
-#define SDRAM_DGENERIC  (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_DIRTY | 
CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
+#define SDRAM_DGENERIC  (PAGE_SIZE | CPLB_L1_CHBL | CPLB_DIRTY | 
CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
 #define SDRAM_DNON_CHBL (PAGE_SIZE_4MB | CPLB_DIRTY | CPLB_SUPV_WR | 
CPLB_USER_RD | CPLB_USER_WR | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
 #define SDRAM_DKERNEL   (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_USER_RD | 
CPLB_USER_WR | CPLB_DIRTY | CPLB_SUPV_WR | CPLB_VALID | CPLB_LOCK | 
ANOMALY_05000158_WORKAROUND)
 #define L1_DMEMORY  (PAGE_SIZE_4MB | CPLB_SUPV_WR | CPLB_USER_WR | 
CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
-#define SDRAM_EBIU  (PAGE_SIZE_4MB | CPLB_DIRTY | CPLB_USER_RD | 
CPLB_USER_WR | CPLB_SUPV_WR | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
+#define SDRAM_EBIU  (PAGE_SIZE | CPLB_DIRTY | CPLB_USER_RD | 
CPLB_USER_WR | CPLB_SUPV_WR | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
 
 #else  /*Write Through */
-#define SDRAM_DGENERIC  (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_WT | 
CPLB_L1_AOW | CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
+#define SDRAM_DGENERIC  (PAGE_SIZE | CPLB_L1_CHBL | CPLB_WT | 
CPLB_L1_AOW | CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
 #define SDRAM_DNON_CHBL (PAGE_SIZE_4MB | CPLB_WT | CPLB_L1_AOW | 
CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
 #define SDRAM_DKERNEL   (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_WT | 
CPLB_L1_AOW | CPLB_USER_RD | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_VALID | 
CPLB_LOCK | ANOMALY_05000158_WORKAROUND)
 #define L1_DMEMORY  (PAGE_SIZE_4MB | CPLB_SUPV_WR | CPLB_USER_WR | 
CPLB_VALID | ANOMALY_05000158_WORKAROUND)
-#define SDRAM_EBIU  (PAGE_SIZE_4MB | CPLB_WT | CPLB_L1_AOW | 
CPLB_USER_RD | CPLB_USER_WR | CPLB_SUPV_WR | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
+#define SDRAM_EBIU  (PAGE_SIZE | CPLB_WT | CPLB_L1_AOW | 
CPLB_USER_RD | CPLB_USER_WR | CPLB_SUPV_WR | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
 #endif
 
 #endif /* _CPLB_H */
diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c
index c380d27..32c5fc9 100644
--- a/arch/blackfin/lib/board.c
+++ b/arch/blackfin/lib/board.c
@@ -94,12 +94,12 @@ static void display_global_data(void)
printf(   \\-bi_flashoffset: %lx\n, bd-bi_flashoffset);
 }
 
-#define CPLB_PAGE_SIZE (4 * 1024 * 1024)
-#define CPLB_PAGE_MASK (~(CPLB_PAGE_SIZE - 1))
 void init_cplbtables(void)
 {
volatile uint32_t *ICPLB_ADDR, *ICPLB_DATA;
volatile uint32_t *DCPLB_ADDR, *DCPLB_DATA;
+   uint32_t cplb_page_size;
+   uint32_t cplb_page_mask;
uint32_t extern_memory;
size_t i;
 
@@ -127,12 +127,19 @@ void init_cplbtables(void)
icplb_add(0xFFA0, L1_IMEMORY);
dcplb_add(0xFF80, L1_DMEMORY);
++i;
+#if defined(__ADSPBF60x__)
+   icplb_add(0x0, 0x0);
+   dcplb_add(CONFIG_SYS_FLASH_BASE, SDRAM_EBIU);
+   ++i;
+#endif
+   cplb_page_size = (4 * 1024 * 1024);
+   cplb_page_mask = (~(cplb_page_size - 1));
 
if (CONFIG_MEM_SIZE) {
uint32_t mbase = CONFIG_SYS_MONITOR_BASE;
uint32_t mend  = mbase + CONFIG_SYS_MONITOR_LEN;
-   mbase = CPLB_PAGE_MASK;
-   mend = CPLB_PAGE_MASK

[U-Boot] [PATCH 06/13] Blackfin: Bf609-ezkit: implement soft switch

2012-08-20 Thread Bob Liu

From: Sonic Zhang sonic.zh...@analog.com

Set up soft switch pins properly in board init code.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 board/bf609-ezkit/soft_switch.c |  169 +++
 board/bf609-ezkit/soft_switch.h |   71 
 2 files changed, 240 insertions(+)
 create mode 100644 board/bf609-ezkit/soft_switch.c
 create mode 100644 board/bf609-ezkit/soft_switch.h

diff --git a/board/bf609-ezkit/soft_switch.c b/board/bf609-ezkit/soft_switch.c
new file mode 100644
index 000..b2ecd53
--- /dev/null
+++ b/board/bf609-ezkit/soft_switch.c
@@ -0,0 +1,169 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2008-2011 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include common.h
+#include asm/blackfin.h
+#include asm/io.h
+#include i2c.h
+#include soft_switch.h
+
+#define SWITCH_ADDR 0x21
+
+#define NUM_SWITCH  3
+#define IODIRA  0x0
+#define IODIRB  0x1
+#define OLATA   0x14
+#define OLATB   0x15
+
+struct switch_config {
+   uchar dir0; /* IODIRA */
+   uchar dir1; /* IODIRB */
+   uchar value0; /* OLATA */
+   uchar value1; /* OLATB */
+};
+
+static struct switch_config switch_config_array[NUM_SWITCH] = {
+   {
+/*
+   U45 Port A  U45 Port B
+
+   7---  RMII_CLK_EN   |   7--- 
~TEMP_THERM_EN
+   | 6- ~CNT0ZM_EN |   | 6- 
~TEMP_IRQ_EN
+   | | 5--- ~CNT0DG_EN |   | | 5--- 
~UART0CTS_146_EN
+   | | | 4- ~CNT0UD_EN |   | | | 4- 
~UART0CTS_RST_EN
+   | | | | 3--- ~CAN0RX_EN |   | | | | 3--- 
~UART0CTS_RTS_LPBK
+   | | | | | 2- ~CAN0_ERR_EN   |   | | | | | 2- 
~UART0CTS_EN
+   | | | | | | 1--- ~CAN_STB   |   | | | | | | 1--- ~UART0RX_EN
+   | | | | | | | 0-  CAN_EN|   | | | | | | | 0- 
~UART0RTS_EN
+   | | | | | | | | |   | | | | | | | |
+   O O O O O O O O |   O O O O O O O O ( I/O 
direction )
+   1 0 0 0 0 0 1 1 |   1 1 1 1 1 0 0 0 ( value 
being set )
+*/
+   .dir0 = 0x0, /* all output */
+   .dir1 = 0x0, /* all output */
+   .value0 = RMII_CLK_EN | CAN_STB | CAN_EN,
+   .value1 = TEMP_THERM_EN | TEMP_IRQ_EN | UART0CTS_146_EN
+   | UART0CTS_RST_EN | UART0CTS_RTS_LPBK,
+   },
+   {
+/*
+   U46 Port A  U46 Port B
+
+   7--- ~LED4_GPIO_EN  |   7---  EMPTY
+   | 6- ~LED3_GPIO_EN  |   | 6- 
~SPI0D3_EN
+   | | 5--- ~LED2_GPIO_EN  |   | | 5--- 
~SPI0D2_EN
+   | | | 4- ~LED1_GPIO_EN  |   | | | 4- 
~SPIFLASH_CS_EN
+   | | | | 3---  SMC0_LP0_EN   |   | | | | 3--- 
~SD_WP_EN
+   | | | | | 2-  EMPTY |   | | | | | 2- 
~SD_CD_EN
+   | | | | | | 1---  SMC0_EPPI2_LP1_SWITCH |   | | | | | | 1--- 
~PUSHBUTTON2_EN
+   | | | | | | | 0-  OVERRIDE_SMC0_LP0_BOOT|   | | | | | | | 0- 
~PUSHBUTTON1_EN
+   | | | | | | | | |   | | | | | | | |
+   O O O O O O O O |   O O O O O O O O ( 
I/O direction )
+   0 0 0 0 0 X 0 1 |   X 0 0 0 0 0 0 0 ( 
value being set )
+*/
+   .dir0 = 0x0, /* all output */
+   .dir1 = 0x0, /* all output */
+#ifdef CONFIG_BFIN_LINKPORT
+   .value0 = OVERRIDE_SMC0_LP0_BOOT,
+#else
+   .value0 = SMC0_EPPI2_LP1_SWITCH,
+#endif
+   .value1 = 0x0,
+   },
+   {
+/*
+   U47 Port A  U47 Port B
+
+   7--- ~PD2_SPI0MISO_EI3_EN   |   
7---  EMPTY
+   | 6- ~PD1_SPI0D3_EPPI1D17_SPI0SEL2_EI3_EN   |   | 
6-  EMPTY
+   | | 5--- ~PD0_SPI0D2_EPPI1D16_SPI0SEL3_EI3_EN   |   | | 
5---  EMPTY
+   | | | 4- ~WAKE_PUSHBUTTON_EN|   | | | 
4-  EMPTY
+   | | | | 3--- ~ETHERNET_EN   |   | | | | 
3---  EMPTY
+   | | | | | 2-  PHYAD0|   | | | | 
| 2-  EMPTY
+   | | | | | | 1---  PHY_PWR_DWN_INT   |   | | | | 
| | 1--- ~PD4_SPI0CK_EI3_EN
+   | | | | | | | 0- ~PHYINT_EN |   | | | | 
| | | 0- ~PD3_SPI0MOSI_EI3_EN
+   | | | | | | | | |   | | | | 
| | | |
+   O O O O O I I O |   O

[U-Boot] [PATCH 02/13] Blackfin: bf60x: add serial support

2012-08-20 Thread Bob Liu

From: Sonic Zhang sonic.zh...@analog.com

Add serial for bf60x.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/serial.c |   81 ---
 arch/blackfin/cpu/serial.h |  222 ++---
 arch/blackfin/cpu/serial1.h|  255 
 arch/blackfin/cpu/serial4.h|  140 +++
 arch/blackfin/include/asm/mach-common/bits/uart4.h |   66 +
 5 files changed, 526 insertions(+), 238 deletions(-)
 create mode 100644 arch/blackfin/cpu/serial1.h
 create mode 100644 arch/blackfin/cpu/serial4.h
 create mode 100644 arch/blackfin/include/asm/mach-common/bits/uart4.h

diff --git a/arch/blackfin/cpu/serial.c b/arch/blackfin/cpu/serial.c
index 6603dc0..7d4dad9 100644
--- a/arch/blackfin/cpu/serial.c
+++ b/arch/blackfin/cpu/serial.c
@@ -43,7 +43,6 @@
 #include serial.h
 #include linux/compiler.h
 #include asm/blackfin.h
-#include asm/mach-common/bits/uart.h
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -52,8 +51,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #include serial.h
 
 #ifdef CONFIG_DEBUG_SERIAL
-static uint16_t cached_lsr[256];
-static uint16_t cached_rbr[256];
+static uart_lsr_t cached_lsr[256];
+static uart_lsr_t cached_rbr[256];
 static size_t cache_count;
 
 /* The LSR is read-to-clear on some parts, so we have to make sure status
@@ -61,10 +60,10 @@ static size_t cache_count;
  * works around anomaly 0599 at the same time by keeping a cumulative
  * tally of all the status bits.
  */
-static uint16_t uart_lsr_save;
-static uint16_t uart_lsr_read(uint32_t uart_base)
+static uart_lsr_t uart_lsr_save;
+static uart_lsr_t uart_lsr_read(uint32_t uart_base)
 {
-   uint16_t lsr = bfin_read(pUART-lsr);
+   uart_lsr_t lsr = _lsr_read(pUART);
uart_lsr_save |= (lsr  (OE|PE|FE|BI));
return lsr | uart_lsr_save;
 }
@@ -72,20 +71,20 @@ static uint16_t uart_lsr_read(uint32_t uart_base)
 static void uart_lsr_clear(uint32_t uart_base)
 {
uart_lsr_save = 0;
-   bfin_write(pUART-lsr, bfin_read(pUART-lsr) | -1);
+   _lsr_write(pUART, -1);
 }
 #else
 /* When debugging is disabled, we only care about the DR bit, so if other
  * bits get set/cleared, we don't really care since we don't read them
  * anyways (and thus anomaly 0599 is irrelevant).
  */
-static inline uint16_t uart_lsr_read(uint32_t uart_base)
+static inline uart_lsr_t uart_lsr_read(uint32_t uart_base)
 {
-   return bfin_read(pUART-lsr);
+   return _lsr_read(pUART);
 }
 static void uart_lsr_clear(uint32_t uart_base)
 {
-   bfin_write(pUART-lsr, bfin_read(pUART-lsr) | -1);
+   _lsr_write(pUART, -1);
 }
 #endif
 
@@ -127,20 +126,14 @@ static int uart_getc(uint32_t uart_base)
 
 #ifdef CONFIG_DEBUG_SERIAL
/* grab  clear the LSR */
-   uint16_t uart_lsr_val = uart_lsr_read(uart_base);
+   uart_lsr_t uart_lsr_val = uart_lsr_read(uart_base);
 
cached_lsr[cache_count] = uart_lsr_val;
cached_rbr[cache_count] = uart_rbr_val;
cache_count = (cache_count + 1) % ARRAY_SIZE(cached_lsr);
 
if (uart_lsr_val  (OE|PE|FE|BI)) {
-   uint16_t dll, dlh;
printf(\n[SERIAL ERROR]\n);
-   ACCESS_LATCH();
-   dll = bfin_read(pUART-dll);
-   dlh = bfin_read(pUART-dlh);
-   ACCESS_PORT_IER();
-   printf(\tDLL=0x%x DLH=0x%x\n, dll, dlh);
do {
--cache_count;
printf(\t%3zu: RBR=0x%02x LSR=0x%02x\n, cache_count,
@@ -160,6 +153,8 @@ static int uart_getc(uint32_t uart_base)
 # define LOOP(x)
 #endif
 
+#if BFIN_UART_HW_VER  4
+
 LOOP(
 static void uart_loop(uint32_t uart_base, int state)
 {
@@ -178,6 +173,28 @@ static void uart_loop(uint32_t uart_base, int state)
 }
 )
 
+#else
+
+LOOP(
+static void uart_loop(uint32_t uart_base, int state)
+{
+   u32 control;
+
+   /* Drain the TX fifo first so bytes don't come back */
+   while (!(uart_lsr_read(uart_base)  TEMT))
+   continue;
+
+   control = bfin_read(pUART-control);
+   if (state)
+   control |= LOOP_ENA | MRTS;
+   else
+   control = ~(LOOP_ENA | MRTS);
+   bfin_write(pUART-control, control);
+}
+)
+
+#endif
+
 #ifdef CONFIG_SYS_BFIN_UART
 
 static void uart_puts(uint32_t uart_base, const char *s)
@@ -246,16 +263,16 @@ struct serial_device bfin_serial##n##_device = { \
LOOP(.loop = uart##n##_loop) \
 };
 
-#ifdef UART0_DLL
+#ifdef UART0_RBR
 DECL_BFIN_UART(0)
 #endif
-#ifdef UART1_DLL
+#ifdef UART1_RBR
 DECL_BFIN_UART(1)
 #endif
-#ifdef UART2_DLL
+#ifdef UART2_RBR
 DECL_BFIN_UART(2)
 #endif
-#ifdef UART3_DLL
+#ifdef UART3_RBR
 DECL_BFIN_UART(3)
 #endif
 
@@ -274,16 +291,16 @@ __weak struct serial_device *default_serial_console(void)
 
 void serial_register_bfin_uart(void)
 {
-#ifdef UART0_DLL
+#ifdef UART0_RBR
serial_register(bfin_serial0_device);
 #endif

[U-Boot] [PATCH 03/13] Blackfin: bf60x: add dma support

2012-08-20 Thread Bob Liu

Add dma support for bf60x.

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/include/asm/dma.h  |  113 --
 arch/blackfin/include/asm/mach-common/bits/dma.h |   48 -
 arch/blackfin/lib/string.c   |   97 ++-
 3 files changed, 159 insertions(+), 99 deletions(-)

diff --git a/arch/blackfin/include/asm/dma.h b/arch/blackfin/include/asm/dma.h
index 21ff1cf..211719a 100644
--- a/arch/blackfin/include/asm/dma.h
+++ b/arch/blackfin/include/asm/dma.h
@@ -8,68 +8,77 @@
 #ifndef _BLACKFIN_DMA_H_
 #define _BLACKFIN_DMA_H_
 
+#include linux/types.h
+#ifdef __ADSPBF60x__
+#include asm/mach-common/bits/dde.h
+#else
 #include asm/mach-common/bits/dma.h
+#endif
 
 struct dmasg_large {
void *next_desc_addr;
-   unsigned long start_addr;
-   unsigned short cfg;
-   unsigned short x_count;
-   short x_modify;
-   unsigned short y_count;
-   short y_modify;
+   u32 start_addr;
+   u16 cfg;
+   u16 x_count;
+   s16 x_modify;
+   u16 y_count;
+   s16 y_modify;
 } __attribute__((packed));
 
 struct dmasg {
-   unsigned long start_addr;
-   unsigned short cfg;
-   unsigned short x_count;
-   short x_modify;
-   unsigned short y_count;
-   short y_modify;
+   u32 start_addr;
+   u16 cfg;
+   u16 x_count;
+   s16 x_modify;
+   u16 y_count;
+   s16 y_modify;
 } __attribute__((packed));
 
+/*
+ * All Blackfin system MMRs are padded to 32bits even if the register
+ * itself is only 16bits.  So use a helper macro to streamline this.
+ */
+#define __BFP(m) m; u16 __pad_##m
 struct dma_register {
-   void *next_desc_ptr;/* DMA Next Descriptor Pointer register */
-   unsigned long start_addr;   /* DMA Start address  register */
-
-   unsigned short cfg; /* DMA Configuration register */
-   unsigned short dummy1;  /* DMA Configuration register */
-
-   unsigned long reserved;
-
-   unsigned short x_count; /* DMA x_count register */
-   unsigned short dummy2;
-
-   short x_modify; /* DMA x_modify register */
-   unsigned short dummy3;
-
-   unsigned short y_count; /* DMA y_count register */
-   unsigned short dummy4;
-
-   short y_modify; /* DMA y_modify register */
-   unsigned short dummy5;
-
-   void *curr_desc_ptr;/* DMA Current Descriptor Pointer
-  register */
-   unsigned long curr_addr_ptr;/* DMA Current Address Pointer
-  register */
-   unsigned short irq_status;  /* DMA irq status register */
-   unsigned short dummy6;
-
-   unsigned short peripheral_map;  /* DMA peripheral map register */
-   unsigned short dummy7;
-
-   unsigned short curr_x_count;/* DMA Current x-count register */
-   unsigned short dummy8;
-
-   unsigned long reserved2;
-
-   unsigned short curr_y_count;/* DMA Current y-count register */
-   unsigned short dummy9;
-
-   unsigned long reserved3;
-
+#ifdef __ADSPBF60x__
+   void *next_desc_ptr;
+   u32 start_addr;
+   u32 config;
+   u32 x_count;
+   s32 x_modify;
+   u32 y_count;
+   s32 y_modify;
+   u32 __pad0[2];
+   void *curr_desc_ptr;
+   void *prev_desc_ptr;
+   void *curr_addr;
+   u32 status;
+   u32 curr_x_count;
+   u32 curr_y_count;
+   u32 __pad1[2];
+   u32 bw_limit;
+   u32 curr_bw_limit;
+   u32 bw_monitor;
+   u32 curr_bw_monitor;
+#else
+   void *next_desc_ptr;
+   u32 start_addr;
+   u16 __BFP(config);
+   u32 __pad0;
+   u16 __BFP(x_count);
+   s16 __BFP(x_modify);
+   u16 __BFP(y_count);
+   s16 __BFP(y_modify);
+   void *curr_desc_ptr;
+   u32 curr_addr_ptr;
+   u16 __BFP(status);
+   u16 __BFP(peripheral_map);
+   u16 __BFP(curr_x_count);
+   u32 __pad1;
+   u16 __BFP(curr_y_count);
+   u32 __pad2;
+#endif
 };
+#undef __BFP
 
 #endif
diff --git a/arch/blackfin/include/asm/mach-common/bits/dma.h 
b/arch/blackfin/include/asm/mach-common/bits/dma.h
index 136313e..1126c44 100644
--- a/arch/blackfin/include/asm/mach-common/bits/dma.h
+++ b/arch/blackfin/include/asm/mach-common/bits/dma.h
@@ -9,8 +9,48 @@
 #define DMAEN  0x0001  /* DMA Channel Enable */
 #define WNR0x0002  /* Channel Direction (W/R*) */
 #define WDSIZE_8   0x  /* Transfer Word Size = 8 */
+
+#ifdef CONFIG_BF60x
+
+#define PSIZE_80x  /* Transfer Word Size = 
16 */
+#define PSIZE_16   0x0010  /* Transfer Word Size = 16 */
+#define PSIZE_32   0x0020  /* Transfer Word Size = 32 */
+#define PSIZE_64   0x0030  /* Transfer Word Size = 32 */
+#define WDSIZE_16  0x0100  /* Transfer Word Size = 16 */
+#define WDSIZE_32

[U-Boot] [PATCH 08/13] Blackfin: bf60x: add gpio support

2012-08-20 Thread Bob Liu

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/gpio.c|   36 +--
 arch/blackfin/include/asm/gpio.h|2 +-
 arch/blackfin/include/asm/mach-bf609/gpio.h |  151 +++
 3 files changed, 181 insertions(+), 8 deletions(-)
 create mode 100644 arch/blackfin/include/asm/mach-bf609/gpio.h

diff --git a/arch/blackfin/cpu/gpio.c b/arch/blackfin/cpu/gpio.c
index 5674d42..f684be5 100644
--- a/arch/blackfin/cpu/gpio.c
+++ b/arch/blackfin/cpu/gpio.c
@@ -66,6 +66,14 @@ static struct gpio_port_t * const gpio_array[] = {
(struct gpio_port_t *)PORTH_FER,
(struct gpio_port_t *)PORTI_FER,
(struct gpio_port_t *)PORTJ_FER,
+#elif defined(CONFIG_BF60x)
+   (struct gpio_port_t *)PORTA_FER,
+   (struct gpio_port_t *)PORTB_FER,
+   (struct gpio_port_t *)PORTC_FER,
+   (struct gpio_port_t *)PORTD_FER,
+   (struct gpio_port_t *)PORTE_FER,
+   (struct gpio_port_t *)PORTF_FER,
+   (struct gpio_port_t *)PORTG_FER,
 #else
 # error no gpio arrays defined
 #endif
@@ -216,6 +224,12 @@ static void port_setup(unsigned gpio, unsigned short usage)
else
gpio_array[gpio_bank(gpio)]-port_fer |= gpio_bit(gpio);
SSYNC();
+#elif defined(CONFIG_BF60x)
+   if (usage == GPIO_USAGE)
+   gpio_array[gpio_bank(gpio)]-port_fer_clear = gpio_bit(gpio);
+   else
+   gpio_array[gpio_bank(gpio)]-port_fer_set = gpio_bit(gpio);
+   SSYNC();
 #endif
 }
 
@@ -290,7 +304,7 @@ static void portmux_setup(unsigned short per)
}
}
 }
-#elif defined(CONFIG_BF54x)
+#elif defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
 inline void portmux_setup(unsigned short per)
 {
u32 pmux;
@@ -330,7 +344,7 @@ inline void portmux_setup(unsigned short per)
 # define portmux_setup(...)  do { } while (0)
 #endif
 
-#ifndef CONFIG_BF54x
+#if !defined(CONFIG_BF54x)  !defined(CONFIG_BF60x)
 /***
 *
 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
@@ -534,7 +548,7 @@ int peripheral_request(unsigned short per, const char 
*label)
 * be requested and used by several drivers
 */
 
-#ifdef CONFIG_BF54x
+#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
if (!((per  P_MAYSHARE)  get_portmux(per) == 
P_FUNCT2MUX(per))) {
 #else
if (!(per  P_MAYSHARE)) {
@@ -651,7 +665,7 @@ int bfin_gpio_request(unsigned gpio, const char *label)
   gpio, get_label(gpio));
return -EBUSY;
}
-#ifndef CONFIG_BF54x
+#if !defined(CONFIG_BF54x)  !defined(CONFIG_BF60x)
else {  /* Reset POLAR setting when acquiring a gpio for the first time 
*/
set_gpio_polar(gpio, 0);
}
@@ -732,12 +746,16 @@ void bfin_special_gpio_free(unsigned gpio)
 
 static inline void __bfin_gpio_direction_input(unsigned gpio)
 {
-#ifdef CONFIG_BF54x
+#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
gpio_array[gpio_bank(gpio)]-dir_clear = gpio_bit(gpio);
 #else
gpio_array[gpio_bank(gpio)]-dir = ~gpio_bit(gpio);
 #endif
+#if defined(CONFIG_BF60x)
+   gpio_array[gpio_bank(gpio)]-inen_set = gpio_bit(gpio);
+#else
gpio_array[gpio_bank(gpio)]-inen |= gpio_bit(gpio);
+#endif
 }
 
 int bfin_gpio_direction_input(unsigned gpio)
@@ -785,9 +803,13 @@ int bfin_gpio_direction_output(unsigned gpio, int value)
 
local_irq_save(flags);
 
+#if defined(CONFIG_BF60x)
+   gpio_array[gpio_bank(gpio)]-inen_clear = gpio_bit(gpio);
+#else
gpio_array[gpio_bank(gpio)]-inen = ~gpio_bit(gpio);
+#endif
gpio_set_value(gpio, value);
-#ifdef CONFIG_BF54x
+#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
gpio_array[gpio_bank(gpio)]-dir_set = gpio_bit(gpio);
 #else
gpio_array[gpio_bank(gpio)]-dir |= gpio_bit(gpio);
@@ -801,7 +823,7 @@ int bfin_gpio_direction_output(unsigned gpio, int value)
 
 int bfin_gpio_get_value(unsigned gpio)
 {
-#ifdef CONFIG_BF54x
+#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
return (1  (gpio_array[gpio_bank(gpio)]-data  gpio_sub_n(gpio)));
 #else
unsigned long flags;
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 224688f..05131b5 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -68,7 +68,7 @@
 
 #ifndef __ASSEMBLY__
 
-#ifndef CONFIG_BF54x
+#if !defined(CONFIG_BF54x)  !defined(CONFIG_BF60x)
 void set_gpio_dir(unsigned, unsigned short);
 void set_gpio_inen(unsigned, unsigned short);
 void set_gpio_polar(unsigned, unsigned short);
diff --git a/arch/blackfin/include/asm/mach-bf609/gpio.h 
b/arch/blackfin/include/asm/mach-bf609/gpio.h
new file mode 100644
index 000..e297bcc
--- /dev/null
+++ b/arch/blackfin/include/asm/mach-bf609/gpio.h
@@ -0,0 +1,151 @@
+/*
+ * Copyright (C) 2008 Analog Devices Inc.
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef

[U-Boot] [PATCH 11/13] Blackfin: Bf60x: add hw watchdog support

2012-08-20 Thread Bob Liu

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/initcode.c  |   13 +
 arch/blackfin/cpu/start.S |2 ++
 include/configs/bf609-ezkit.h |1 +
 3 files changed, 16 insertions(+)

diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index c4f1764..fc6e77b 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -458,8 +458,21 @@ program_early_devices(ADI_BOOT_DATA *bs, uint *sdivB, uint 
*divB, uint *vcoB)
 */
if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS) {
serial_putc('e');
+#ifdef __ADSPBF60x__
+   bfin_write_SEC_GCTL(0x2);
+   SSYNC();
+   bfin_write_SEC_FCTL(0xc1);
+   bfin_write_SEC_SCTL(2, bfin_read_SEC_SCTL(2) | 0x6);
+
+   bfin_write_SEC_CCTL(0x2);
+   SSYNC();
+   bfin_write_SEC_GCTL(0x1);
+   bfin_write_SEC_CCTL(0x1);
+#endif

bfin_write_WDOG_CNT(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_INITCODE));
+#if CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART
bfin_write_WDOG_CTL(0);
+#endif
serial_putc('f');
}
 #endif
diff --git a/arch/blackfin/cpu/start.S b/arch/blackfin/cpu/start.S
index 90b4d1a..7155fc8 100644
--- a/arch/blackfin/cpu/start.S
+++ b/arch/blackfin/cpu/start.S
@@ -65,6 +65,7 @@ ENTRY(_start)
p5.h = HI(COREMMR_BASE);
 
 #ifdef CONFIG_HW_WATCHDOG
+#ifndef __ADSPBF60x__
 # ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START
 #  define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000
 # endif
@@ -78,6 +79,7 @@ ENTRY(_start)
/* fire up the watchdog - R0.L above needs to be 0x */
W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r0;
 #endif
+#endif
 
/* Turn on the serial for debugging the init process */
serial_early_init
diff --git a/include/configs/bf609-ezkit.h b/include/configs/bf609-ezkit.h
index 722ba62..7de65e9 100644
--- a/include/configs/bf609-ezkit.h
+++ b/include/configs/bf609-ezkit.h
@@ -73,6 +73,7 @@
 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
 #define CONFIG_SYS_MALLOC_LEN  (256 * 1024)
 
+#define CONFIG_HW_WATCHDOG
 /*
  * Network Settings
  */
-- 
1.7.9.5


___
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[U-Boot] [PATCH 10/13] Blackfin: bf609: add board files

2012-08-20 Thread Bob Liu

Board files for bf609-ezkit support.

Signed-off-by: Bob Liu lliu...@gmail.com
---
 MAINTAINERS   |1 +
 board/bf609-ezkit/Makefile|   55 
 board/bf609-ezkit/bf609-ezkit.c   |   68 ++
 boards.cfg|1 +
 include/configs/bf609-ezkit.h |  175 +
 include/configs/bfin_adi_common.h |8 +-
 6 files changed, 304 insertions(+), 4 deletions(-)
 create mode 100644 board/bf609-ezkit/Makefile
 create mode 100644 board/bf609-ezkit/bf609-ezkit.c
 create mode 100644 include/configs/bf609-ezkit.h

diff --git a/MAINTAINERS b/MAINTAINERS
index fd0c65c..2c447d4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1154,6 +1154,7 @@ Blackfin Team u-boot-de...@blackfin.uclinux.org
BF538F-EZKITBF538
BF548-EZKIT BF548
BF561-EZKIT BF561
+   BF609-EZKIT BF609
 
 M.Hasewinkel (MHA) i...@ssv-embedded.de
 
diff --git a/board/bf609-ezkit/Makefile b/board/bf609-ezkit/Makefile
new file mode 100644
index 000..0bb8fe6
--- /dev/null
+++ b/board/bf609-ezkit/Makefile
@@ -0,0 +1,55 @@
+#
+# U-boot - Makefile
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS-y:= $(BOARD).o
+COBJS-$(CONFIG_BFIN_SOFT_SWITCH)   += soft_switch.o
+
+SRCS   := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS-y))
+SOBJS  := $(addprefix $(obj),$(SOBJS-y))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/bf609-ezkit/bf609-ezkit.c b/board/bf609-ezkit/bf609-ezkit.c
new file mode 100644
index 000..d54906b
--- /dev/null
+++ b/board/bf609-ezkit/bf609-ezkit.c
@@ -0,0 +1,68 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2008-2011 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include common.h
+#include netdev.h
+#include asm/blackfin.h
+#include asm/io.h
+#include asm/portmux.h
+#include soft_switch.h
+
+int checkboard(void)
+{
+   printf(Board: ADI BF609 EZ-Kit board\n);
+   printf(   Support: http://blackfin.uclinux.org/\n;);
+   return 0;
+}
+
+int board_early_init_f(void)
+{
+   static const unsigned short pins[] = {
+   P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12,
+   P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21,
+   P_A22, P_A23, P_A24, P_A25, P_NORCK, 0,
+   };
+   peripheral_request_list(pins, smc0);
+
+   return 0;
+}
+
+#ifdef CONFIG_DESIGNWARE_ETH
+int board_eth_init(bd_t *bis)
+{
+   int ret = 0;
+
+   if (CONFIG_DW_PORTS  1) {
+   static const unsigned short pins[] = P_RMII0;
+   if (!peripheral_request_list(pins, emac0)) {
+   ret += designware_initialize(0, EMAC0_MACCFG, 1, 0);
+   }
+   }
+   if (CONFIG_DW_PORTS  2) {
+   static const unsigned short pins[] = P_RMII1;
+   if (!peripheral_request_list(pins, emac1))
+   ret += designware_initialize(1, EMAC1_MACCFG, 1, 0);
+   }
+
+   return ret;
+}
+#endif
+
+#ifdef CONFIG_BFIN_SDH
+int board_mmc_init(bd_t *bis)
+{
+   return bfin_mmc_init(bis);
+}
+#endif
+
+/* miscellaneous platform dependent initialisations */
+int misc_init_r(void)
+{
+   printf(other init\n);
+   return setup_board_switches();
+}
diff --git a/boards.cfg b/boards.cfg
index 2d36d83..8d275a3 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -313,6 +313,7 @@ bf538f-ezkit blackfinblackfin
 bf548-ezkit  blackfinblackfin
 bf561-acvilonblackfinblackfin
 bf561-ezkit

[U-Boot] [PATCH 13/13] Blackfin: update license to Clear BSD license.

2012-08-20 Thread Bob Liu

From: Sonic Zhang sonic.zh...@analog.com

Per the request from ADI Legal.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/Clear_BSD.txt|   33 
 arch/blackfin/cpu/bootcount.c  |2 +-
 arch/blackfin/cpu/os_log.c |2 +-
 arch/blackfin/include/asm/mach-bf506/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf518/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf527/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf533/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf537/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf538/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf548/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf561/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf609/anomaly.h |3 +--
 12 files changed, 44 insertions(+), 20 deletions(-)
 create mode 100644 arch/blackfin/Clear_BSD.txt

diff --git a/arch/blackfin/Clear_BSD.txt b/arch/blackfin/Clear_BSD.txt
new file mode 100644
index 000..bfa4b37
--- /dev/null
+++ b/arch/blackfin/Clear_BSD.txt
@@ -0,0 +1,33 @@
+The Clear BSD license:
+
+Copyright (c) 2012, Analog Devices, Inc.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted (subject to the limitations in the
+disclaimer below) provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright
+   notice, this list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright
+   notice, this list of conditions and the following disclaimer in the
+   documentation and/or other materials provided with the
+   distribution.
+
+* Neither the name of Analog Devices, Inc.  nor the names of its
+   contributors may be used to endorse or promote products derived
+   from this software without specific prior written permission.
+
+NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
+GRANTED BY THIS LICENSE.  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
+HOLDERS AND CONTRIBUTORS AS IS AND ANY EXPRESS OR IMPLIED
+WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/arch/blackfin/cpu/bootcount.c b/arch/blackfin/cpu/bootcount.c
index 6cf6dd5..83e8546 100644
--- a/arch/blackfin/cpu/bootcount.c
+++ b/arch/blackfin/cpu/bootcount.c
@@ -3,7 +3,7 @@
  *
  * Copyright (c) 2010 Analog Devices Inc.
  *
- * Licensed under the 2-clause BSD.
+ * Licensed under the Clear BSD.
  */
 
 /* This version uses one 32bit storage and combines the magic/count */
diff --git a/arch/blackfin/cpu/os_log.c b/arch/blackfin/cpu/os_log.c
index e1c8e29..51501f7 100644
--- a/arch/blackfin/cpu/os_log.c
+++ b/arch/blackfin/cpu/os_log.c
@@ -3,7 +3,7 @@
  *
  * Copyright (c) 2009 Analog Devices Inc.
  *
- * Licensed under the 2-clause BSD.
+ * Licensed under the Clear BSD.
  */
 
 #include common.h
diff --git a/arch/blackfin/include/asm/mach-bf506/anomaly.h 
b/arch/blackfin/include/asm/mach-bf506/anomaly.h
index 5b3227a..00d5e43 100644
--- a/arch/blackfin/include/asm/mach-bf506/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf506/anomaly.h
@@ -6,8 +6,7 @@
  * DO NOT EDIT THIS FILE
  *
  * Copyright 2004-2011 Analog Devices Inc.
- * Licensed under the ADI BSD license.
- *   https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
+ * Licensed under the Clear BSD license.
  */
 
 /* This file should be up to date with:
diff --git a/arch/blackfin/include/asm/mach-bf518/anomaly.h 
b/arch/blackfin/include/asm/mach-bf518/anomaly.h
index 56383f7..845e6bc 100644
--- a/arch/blackfin/include/asm/mach-bf518/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf518/anomaly.h
@@ -6,8 +6,7 @@
  * DO NOT EDIT THIS FILE
  *
  * Copyright 2004-2011 Analog Devices Inc.
- * Licensed under the ADI BSD license.
- *   https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
+ * Licensed under the Clear BSD license.
  */
 
 /* This file should be up to date with:
diff --git a/arch/blackfin/include/asm/mach-bf527/anomaly.h 
b/arch/blackfin/include/asm/mach-bf527/anomaly.h
index 6884706..aa14110 100644
--- a/arch/blackfin/include/asm/mach-bf527/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf527/anomaly.h
@@ -6,8 +6,7 @@
  * DO NOT EDIT THIS FILE
  *
  * Copyright 2004-2011 Analog Devices Inc

[U-Boot] [PATCH 09/13] Blackfin: bf60x: core changes

2012-08-20 Thread Bob Liu

Core changes for supporting bf60x.

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/cpu.c|4 +-
 arch/blackfin/cpu/initcode.c   |  308 ++--
 arch/blackfin/cpu/initcode.h   |   52 ++
 arch/blackfin/cpu/reset.c  |6 +
 arch/blackfin/include/asm/config-pre.h |4 +
 arch/blackfin/lib/board.c  |6 +
 arch/blackfin/lib/clocks.c |  113 +---
 common/cmd_reginfo.c   |   19 +-
 8 files changed, 474 insertions(+), 38 deletions(-)

diff --git a/arch/blackfin/cpu/cpu.c b/arch/blackfin/cpu/cpu.c
index 6a0bcca..b9fdb07 100644
--- a/arch/blackfin/cpu/cpu.c
+++ b/arch/blackfin/cpu/cpu.c
@@ -68,7 +68,9 @@ void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
/* Reset upon a double exception rather than just hanging.
 * Do not do bfin_read on SWRST as that will reset status bits.
 */
+# ifdef SWRST
bfin_write_SWRST(DOUBLE_FAULT);
+# endif
 #endif
 
serial_early_puts(Board init flash\n);
@@ -92,7 +94,7 @@ int irq_init(void)
 #elif defined(SICA_IMASK0)
bfin_write_SICA_IMASK0(0);
bfin_write_SICA_IMASK1(0);
-#else
+#elif defined(SIC_IMASK)
bfin_write_SIC_IMASK(0);
 #endif
/* Set up a dummy NMI handler if needed.  */
diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index fb3a101..c4f1764 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -16,19 +16,140 @@
 #include asm/mach-common/bits/bootrom.h
 #include asm/mach-common/bits/core.h
 #include asm/mach-common/bits/ebiu.h
-#include asm/mach-common/bits/pll.h
-#include asm/mach-common/bits/uart.h
+
+#define BUG() while (1) { asm volatile(emuexcpt;); }
 
 #define BUG() while (1) { asm volatile(emuexcpt;); }
 
 #include serial.h
 
+#ifndef __ADSPBF60x__
+#include asm/mach-common/bits/pll.h
+#else
+#include asm/mach-common/bits/cgu.h
+#endif
+
+#ifdef __ADSPBF60x__
+#define CONFIG_BFIN_GET_DCLK_M 
((CONFIG_CLKIN_HZ*CONFIG_VCO_MULT)/(CONFIG_DCLK_DIV*100))
+
+#ifndef CONFIG_DMC_DDRCFG
+#if ((CONFIG_BFIN_GET_DCLK_M != 125)  \
+   (CONFIG_BFIN_GET_DCLK_M != 133)  \
+   (CONFIG_BFIN_GET_DCLK_M != 150)  \
+   (CONFIG_BFIN_GET_DCLK_M != 166)  \
+   (CONFIG_BFIN_GET_DCLK_M != 200)  \
+   (CONFIG_BFIN_GET_DCLK_M != 225)  \
+   (CONFIG_BFIN_GET_DCLK_M != 250))
+#error DDR2 CLK must be in (125, 133, 150, 166, 200, 225, 250)MHz
+#endif
+#endif
+
+/* DMC status bits */
+#define IDLE0x1
+#define MEMINITDONE 0x4
+#define SRACK   0x8
+#define PDACK   0x10
+#define DPDACK  0x20
+#define DLLCALDONE  0x2000
+#define PENDREF 0xF
+#define PHYRDPHASE  0xF0
+#define PHYRDPHASE_OFFSET   20
+
+/* DMC DLL control bits */
+#define DLLCALRDCNT 0xFF
+#define DATACYC_OFFSET  8
+
+struct ddr_config {
+   u32 ddr_clk;
+   u32 dmc_ddrctl;
+   u32 dmc_ddrcfg;
+   u32 dmc_ddrtr0;
+   u32 dmc_ddrtr1;
+   u32 dmc_ddrtr2;
+   u32 dmc_ddrmr;
+   u32 dmc_ddrmr1;
+};
+
+static struct ddr_config ddr_config_table[] = {
+   [0] = {
+   .ddr_clk= 125,  /* 125MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20705212,
+   .dmc_ddrtr1 = 0x201003CF,
+   .dmc_ddrtr2 = 0x00320107,
+   .dmc_ddrmr  = 0x0422,
+   .dmc_ddrmr1 = 0x4,
+   },
+   [1] = {
+   .ddr_clk= 133,  /* 133MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20806313,
+   .dmc_ddrtr1 = 0x2013040D,
+   .dmc_ddrtr2 = 0x00320108,
+   .dmc_ddrmr  = 0x0632,
+   .dmc_ddrmr1 = 0x4,
+   },
+   [2] = {
+   .ddr_clk= 150,  /* 150MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20A07323,
+   .dmc_ddrtr1 = 0x20160492,
+   .dmc_ddrtr2 = 0x00320209,
+   .dmc_ddrmr  = 0x0632,
+   .dmc_ddrmr1 = 0x4,
+   },
+   [3] = {
+   .ddr_clk= 166,  /* 166MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20A07323,
+   .dmc_ddrtr1 = 0x2016050E,
+   .dmc_ddrtr2 = 0x00320209,
+   .dmc_ddrmr  = 0x0632,
+   .dmc_ddrmr1 = 0x4,
+   },
+   [4] = {
+   .ddr_clk= 200,  /* 200MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20a07323,
+   .dmc_ddrtr1 = 0x2016050f,
+   .dmc_ddrtr2 = 0x00320509

[U-Boot] [PATCH 12/13] Blackfin: Bf60x: add resume from hibernate

2012-08-20 Thread Bob Liu

From: Steven Miao real...@gmail.com

Add Bf60x resume from hibernate support

Signed-off-by: Steven Miao real...@gmail.com
Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/initcode.c |   46 ++
 1 file changed, 46 insertions(+)

diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index fc6e77b..b4bbc37 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -506,6 +506,11 @@ maybe_self_refresh(ADI_BOOT_DATA *bs)
return false;
 
 #ifdef __ADSPBF60x__
+   /* resume from hibernate, return false let ddr initialize */
+   if ((bfin_read32(DPM0_STAT)  0xF0) == 0x50) {
+   serial_putc('b');
+   return false;
+   }
 
 #else /* __ADSPBF60x__ */
 
@@ -820,6 +825,7 @@ program_memory_controller(ADI_BOOT_DATA *bs, bool 
put_into_srfs)
while (!(bfin_read_DMC0_STAT()  DLLCALDONE))
continue;
serial_putc('!');
+
 #else /* __ADSPBF60x__ */
 
/* Program the external memory controller before we come out of
@@ -887,7 +893,46 @@ check_hibernation(ADI_BOOT_DATA *bs, u16 vr_ctl, bool 
put_into_srfs)
return;
 
serial_putc('b');
+#ifdef __ADSPBF60x__
+   if (bfin_read32(DPM0_RESTORE0) != 0) {
+   uint32_t reg = bfin_read_DMC0_CTL();
+   reg = ~0x8;
+   bfin_write_DMC0_CTL(reg);
+
+   while ((bfin_read_DMC0_STAT()  0x8))
+   continue;
+   while (!(bfin_read_DMC0_STAT()  0x1))
+   continue;
+
+   serial_putc('z');
+   volatile uint32_t *hibernate_magic = bfin_read32(DPM0_RESTORE4);
+   __builtin_bfin_ssync(); /* make sure memory controller is done 
*/
+   if (hibernate_magic[0] == 0xDEADBEEF) {
+   serial_putc('c');
+
+   __builtin_bfin_ssync();
+
+   bfin_write_EVT15(hibernate_magic[1]);
+   bfin_write_IMASK(EVT_IVG15);
+   __asm__ __volatile__ (
+   /* load reti early to avoid anomaly 281 */
+   reti = %2;
+   /* clear hibernate magic */
+   [%0] = %1;
+   /* load stack pointer */
+   SP = [%0 + 8];
+   /* lower ourselves from reset ivg to ivg15 */
+   raise 15;
+   nop;nop;nop;
+   rti;
+   :
+   : p(hibernate_magic), d(0x2000 /* jump.s 0 
*/), d(0xffa0)
+   );
+   }
 
+
+   }
+#else
/* Are we coming out of hibernate (suspend to memory) ?
 * The memory layout is:
 * 0x0: hibernate magic for anomaly 307 (0xDEADBEEF)
@@ -919,6 +964,7 @@ check_hibernation(ADI_BOOT_DATA *bs, u16 vr_ctl, bool 
put_into_srfs)
}
serial_putc('d');
}
+#endif
 
serial_putc('e');
 }
-- 
1.7.9.5


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[U-Boot] [PATCH 07/13] Blackfin: Spi: add bf6xx spi driver

2012-08-20 Thread Bob Liu

From: Scott Jiang scott.jiang.li...@gmail.com

Spi driver for bf60x is different from old one, so implement a new
driver for it.

Signed-off-by: Scott Jiang scott.jiang.li...@gmail.com
Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 .../blackfin/include/asm/mach-common/bits/spi6xx.h |  240 +++
 drivers/spi/Makefile   |1 +
 drivers/spi/bfin_spi6xx.c  |  308 
 3 files changed, 549 insertions(+)
 create mode 100644 arch/blackfin/include/asm/mach-common/bits/spi6xx.h
 create mode 100644 drivers/spi/bfin_spi6xx.c

diff --git a/arch/blackfin/include/asm/mach-common/bits/spi6xx.h 
b/arch/blackfin/include/asm/mach-common/bits/spi6xx.h
new file mode 100644
index 000..8b8dd25
--- /dev/null
+++ b/arch/blackfin/include/asm/mach-common/bits/spi6xx.h
@@ -0,0 +1,240 @@
+/*
+ * Analog Devices bfin_spi3 controller driver
+ *
+ * Copyright (c) 2011 Analog Devices Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _SPI_CHANNEL_H_
+#define _SPI_CHANNEL_H_
+
+#include linux/types.h
+
+/* SPI_CONTROL */
+#define SPI_CTL_EN  0x0001/* Enable */
+#define SPI_CTL_MSTR0x0002/* Master/Slave */
+#define SPI_CTL_PSSE0x0004/* controls modf error in 
master mode */
+#define SPI_CTL_ODM 0x0008/* Open Drain Mode */
+#define SPI_CTL_CPHA0x0010/* Clock Phase */
+#define SPI_CTL_CPOL0x0020/* Clock Polarity */
+#define SPI_CTL_ASSEL   0x0040/* Slave Select Pin Control 
*/
+#define SPI_CTL_SELST   0x0080/* Slave Select Polarity 
in-between transfers */
+#define SPI_CTL_EMISO   0x0100/* Enable MISO */
+#define SPI_CTL_SIZE0x0600/* Word Transfer Size */
+#define SPI_CTL_SIZE08  0x/* SIZE: 8 bits */
+#define SPI_CTL_SIZE16  0x0200/* SIZE: 16 bits */
+#define SPI_CTL_SIZE32  0x0400/* SIZE: 32 bits */
+#define SPI_CTL_LSBF0x1000/* LSB First */
+#define SPI_CTL_FCEN0x2000/* Flow-Control Enable */
+#define SPI_CTL_FCCH0x4000/* Flow-Control Channel 
Selection */
+#define SPI_CTL_FCPL0x8000/* Flow-Control Polarity */
+#define SPI_CTL_FCWM0x0003/* Flow-Control Water-Mark */
+#define SPI_CTL_FIFO0   0x/* FCWM: TFIFO empty or 
RFIFO Full */
+#define SPI_CTL_FIFO1   0x0001/* FCWM: TFIFO 75% or more 
empty or RFIFO 75% or more full */
+#define SPI_CTL_FIFO2   0x0002/* FCWM: TFIFO 50% or more 
empty or RFIFO 50% or more full */
+#define SPI_CTL_FMODE   0x0004/* Fast-mode Enable */
+#define SPI_CTL_MIOM0x0030/* Multiple I/O Mode */
+#define SPI_CTL_MIO_DIS 0x/* MIOM: Disable */
+#define SPI_CTL_MIO_DUAL0x0010/* MIOM: Enable DIOM (Dual 
I/O Mode) */
+#define SPI_CTL_MIO_QUAD0x0020/* MIOM: Enable QUAD (Quad 
SPI Mode) */
+#define SPI_CTL_SOSI0x0040/* Start on MOSI */
+/* SPI_RX_CONTROL */
+#define SPI_RXCTL_REN   0x0001/* Receive Channel Enable */
+#define SPI_RXCTL_RTI   0x0004/* Receive Transfer Initiate 
*/
+#define SPI_RXCTL_RWCEN 0x0008/* Receive Word Counter 
Enable */
+#define SPI_RXCTL_RDR   0x0070/* Receive Data Request */
+#define SPI_RXCTL_RDR_DIS   0x/* RDR: Disabled */
+#define SPI_RXCTL_RDR_NE0x0010/* RDR: RFIFO not empty */
+#define SPI_RXCTL_RDR_250x0020/* RDR: RFIFO 25% full */
+#define SPI_RXCTL_RDR_500x0030/* RDR: RFIFO 50% full */
+#define SPI_RXCTL_RDR_750x0040/* RDR: RFIFO 75% full */
+#define SPI_RXCTL_RDR_FULL  0x0050/* RDR: RFIFO full */
+#define SPI_RXCTL_RDO   0x0100/* Receive Data Over-Run */
+#define SPI_RXCTL_RRWM  0x3000/* FIFO Regular Water-Mark */
+#define SPI_RXCTL_RWM_0 0x/* RRWM: RFIFO Empty */
+#define SPI_RXCTL_RWM_25

[U-Boot] [PATCH 05/13] Blackfin: bf60x: add rsi/sdh support

2012-08-20 Thread Bob Liu

From: Sonic Zhang sonic.zh...@analog.com

Add rsi/sdh support for bf60x.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/include/asm/mach-common/bits/sdh.h |   38 +++-
 drivers/mmc/bfin_sdh.c   |   68 +-
 2 files changed, 88 insertions(+), 18 deletions(-)

diff --git a/arch/blackfin/include/asm/mach-common/bits/sdh.h 
b/arch/blackfin/include/asm/mach-common/bits/sdh.h
index 8c5dd33..3495558 100644
--- a/arch/blackfin/include/asm/mach-common/bits/sdh.h
+++ b/arch/blackfin/include/asm/mach-common/bits/sdh.h
@@ -12,18 +12,35 @@
 #define CMD_INT_E  0x100  /* Command Interrupt */
 #defineCMD_PEND_E  0x200  /* Command Pending */
 #define CMD_E  0x400  /* Command Enable */
+#ifdef RSI_BLKSZ
+#define   CMD_CRC_CHECK_D  0x800  /* CRC Check is disabled */
+#defineCMD_DATA0_BUSY  0x1000 /* Check for Busy State on the 
DATA0 pin */
+#endif
 
 /* Bit masks for SDH_PWR_CTL */
+#ifndef RSI_BLKSZ
 #definePWR_ON  0x3/* Power On */
 #define SD_CMD_OD  0x40   /* Open Drain Output */
 #define   ROD_CTL  0x80   /* Rod Control */
+#endif
 
 /* Bit masks for SDH_CLK_CTL */
 #defineCLKDIV  0xff   /* MC_CLK Divisor */
 #define CLK_E  0x100  /* MC_CLK Bus Clock Enable */
 #define  PWR_SV_E  0x200  /* Power Save Enable */
 #define CLKDIV_BYPASS  0x400  /* Bypass Divisor */
-#define  WIDE_BUS  0x800  /* Wide Bus Mode Enable */
+#define BUS_MODE_MASK  0x1800 /* Bus Mode Mask */
+#define STD_BUS_1  0x000  /* Standard Bus 1 bit mode */
+#defineWIDE_BUS_4  0x800  /* Wide Bus 4 bit mode */
+#defineBYTE_BUS_8  0x1000 /* Byte Bus 8 bit mode */
+#ifdef RSI_BLKSZ
+#defineCARD_TYPE_MASK  0xe000 /* Card type mask */
+#define  CARD_TYPE_OFFSET  13 /* Card type offset */
+#defineCARD_TYPE_SDIO  0
+#defineCARD_TYPE_eMMC  1
+#define  CARD_TYPE_SD  2
+#define   CARD_TYPE_CEATA  3
+#endif
 
 /* Bit masks for SDH_RESP_CMD */
 #define  RESP_CMD  0x3f   /* Response Command */
@@ -33,7 +50,13 @@
 #define   DTX_DIR  0x2/* Data Transfer Direction */
 #define  DTX_MODE  0x4/* Data Transfer Mode */
 #define DTX_DMA_E  0x8/* Data Transfer DMA Enable */
+#ifndef RSI_BLKSZ
 #define  DTX_BLK_LGTH  0xf0   /* Data Transfer Block Length */
+#else
+
+/* Bit masks for SDH_BLK_SIZE */
+#define  DTX_BLK_LGTH  0x1fff /* Data Transfer Block Length */
+#endif
 
 /* Bit masks for SDH_STATUS */
 #define  CMD_CRC_FAIL  0x1/* CMD CRC Fail */
@@ -102,10 +125,13 @@
 /* Bit masks for SDH_E_STATUS */
 #define  SDIO_INT_DET  0x2/* SDIO Int Detected */
 #define   SD_CARD_DET  0x10   /* SD Card Detect */
+#define  SD_CARD_BUSYMODE  0x8000 /* Card is in Busy mode */
+#define   SD_CARD_SLPMODE  0x4000 /* Card in Sleep Mode */
+#define SD_CARD_READY  0x0002 /* Card Ready */
 
 /* Bit masks for SDH_E_MASK */
 #define  SDIO_MSK  0x2/* Mask SDIO Int Detected */
-#define   SCD_MSK  0x40   /* Mask Card Detect */
+#define   SCD_MSK  0x10   /* Mask Card Detect */
 
 /* Bit masks for SDH_CFG */
 #define   CLKS_EN  0x1/* Clocks Enable */
@@ -114,7 +140,15 @@
 #defineSD_RST  0x10   /* SDMMC Reset */
 #define PUP_SDDAT  0x20   /* Pull-up SD_DAT */
 #definePUP_SDDAT3  0x40   /* Pull-up SD_DAT3 */
+#ifndef RSI_BLKSZ
 #define PD_SDDAT3  0x80   /* Pull-down SD_DAT3 */
+#else
+#definePWR_ON  0x600  /* Power On */
+#define SD_CMD_OD  0x800  /* Open Drain Output */
+#define   BOOT_EN  0x1000 /* Boot Enable */
+#define BOOT_MODE  0x2000 /* Alternate Boot Mode */.
+#define   BOOT_ACK_EN  0x4000 /* Boot ACK is expected */
+#endif
 
 /* Bit masks for SDH_RD_WAIT_EN */
 #define   RWR  0x1/* Read Wait Request */
diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c
index 8d59d46..f22429a 100644
--- a/drivers/mmc/bfin_sdh.c
+++ b/drivers/mmc/bfin_sdh.c
@@ -19,9 +19,7 @@
 #include asm/mach-common/bits/sdh.h
 #include asm/mach-common/bits/dma.h
 
-#if defined(__ADSPBF50x__) || defined(__ADSPBF51x__)
-# define bfin_read_SDH_PWR_CTL bfin_read_RSI_PWR_CONTROL
-# define bfin_write_SDH_PWR_CTLbfin_write_RSI_PWR_CONTROL
+#if defined(__ADSPBF50x__

[U-Boot] [PATCH 08/16] Blackfin: add more print info for Bf60x

2012-08-07 Thread Bob Liu

Add system0, system1, dclk and cgu print info for Bf60x.

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/lib/board.c |6 ++
 arch/blackfin/lib/clocks.c|   10 +-
 common/cmd_reginfo.c  |   17 +
 include/configs/bf609-ezkit.h |1 +
 4 files changed, 33 insertions(+), 1 deletion(-)

diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c
index 4e44bf0..e03bd57 100644
--- a/arch/blackfin/lib/board.c
+++ b/arch/blackfin/lib/board.c
@@ -311,7 +311,13 @@ void board_init_f(ulong bootflag)
 
printf(Clock: VCO: %s MHz, , strmhz(buf, get_vco()));
printf(Core: %s MHz, , strmhz(buf, get_cclk()));
+#if defined(__ADSPBF60x__)
+   printf(System0: %s MHz, , strmhz(buf, get_sclk0()));
+   printf(System1: %s MHz, , strmhz(buf, get_sclk1()));
+   printf(Dclk: %s MHz\n, strmhz(buf, get_dclk()));
+#else
printf(System: %s MHz\n, strmhz(buf, get_sclk()));
+#endif
 
if (CONFIG_MEM_SIZE) {
printf(RAM:   );
diff --git a/arch/blackfin/lib/clocks.c b/arch/blackfin/lib/clocks.c
index f867123..519a3e1 100644
--- a/arch/blackfin/lib/clocks.c
+++ b/arch/blackfin/lib/clocks.c
@@ -79,7 +79,7 @@ u_long get_cclk(void)
 /* Get the System clock */
 #ifdef CGU_DIV
 
-static u_long cached_sclk_pll_div, cached_sclk, cached_sclk0, cached_sclk1;
+static u_long cached_sclk_pll_div, cached_sclk, cached_sclk0, cached_sclk1, 
cached_dclk;
 static u_long _get_sclk(u_long *cache)
 {
u_long div, ssel;
@@ -132,6 +132,14 @@ u_long get_sclk1(void)
 #endif
 }
 
+u_long get_dclk(void)
+{
+#ifndef CONFIG_BFIN_GET_DCLK
+   return _get_sclk(cached_dclk);
+#else
+   return CONFIG_BFIN_GET_DCLK;
+#endif
+}
 #else
 
 u_long get_sclk(void)
diff --git a/common/cmd_reginfo.c b/common/cmd_reginfo.c
index bf94119..ef49017 100644
--- a/common/cmd_reginfo.c
+++ b/common/cmd_reginfo.c
@@ -226,6 +226,23 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
printf(\tEBIU_SDSTAT:  0x%04x   EBIU_SDGCTL:  0x%08x\n,
bfin_read_EBIU_SDSTAT(), bfin_read_EBIU_SDGCTL());
 # endif
+#else
+   puts(\nCGU Registers\n);
+   printf(\tCGU_DIV:   0x%08x   CGU_CTL:  0x%08x\n,
+   bfin_read_CGU_DIV(), bfin_read_CGU_CTL());
+   printf(\tCGU_STAT:  0x%08x   CGU_LOCKCNT:  0x%08x\n,
+   bfin_read_CGU_STAT(), bfin_read_CGU_CLKOUTSEL());
+
+   puts(\nSMC DDR Registers\n);
+   printf(\tDDR_CFG:   0x%08x   DDR_TR0:  0x%08x\n,
+   bfin_read_DMC0_CFG(), bfin_read_DMC0_TR0());
+   printf(\tDDR_TR1:   0x%08x   DDR_TR2:  0x%08x\n,
+   bfin_read_DMC0_TR1(), bfin_read_DMC0_TR2());
+   printf(\tDDR_MR:0x%08x   DDR_EMR1: 0x%08x\n,
+   bfin_read_DMC0_MR(), bfin_read_DMC0_EMR1());
+   printf(\tDDR_CTL:   0x%08x   DDR_STAT: 0x%08x\n,
+   bfin_read_DMC0_CTL(), bfin_read_DMC0_STAT());
+   printf(\tDDR_DLLCTL:0x%08x\n, bfin_read_DMC0_DLLCTL());
 #endif
 #endif /* CONFIG_BLACKFIN */
 
diff --git a/include/configs/bf609-ezkit.h b/include/configs/bf609-ezkit.h
index c847069..c7cb834 100644
--- a/include/configs/bf609-ezkit.h
+++ b/include/configs/bf609-ezkit.h
@@ -64,6 +64,7 @@
 #define CONFIG_BFIN_GET_SCLK (CONFIG_PLL_CLK/CONFIG_SYSCLK_DIV)
 #define CONFIG_BFIN_GET_SCLK0 (get_sclk()/CONFIG_SCLK0_DIV)
 #define CONFIG_BFIN_GET_SCLK1 (get_sclk()/CONFIG_SCLK1_DIV)
+#define CONFIG_BFIN_GET_DCLK (get_cclk()/CONFIG_DCLK_DIV)
 
 /*
  * Memory Settings
-- 
1.7.9.5


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[U-Boot] [PATCH 03/16] Blackfin: Bf60x: support big cplb page

2012-08-07 Thread Bob Liu

Bf60x support 16K, 64K, 16M and 64M cplb pages, this patch add support for them.
So that bf609-ezkit can use it's 128M memory.

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/include/asm/cplb.h |   13 +-
 arch/blackfin/include/asm/mach-common/bits/mpu.h |6 -
 arch/blackfin/lib/board.c|   28 --
 include/configs/bf609-ezkit.h|6 +
 4 files changed, 39 insertions(+), 14 deletions(-)

diff --git a/arch/blackfin/include/asm/cplb.h b/arch/blackfin/include/asm/cplb.h
index cc21e93..5a0588b 100644
--- a/arch/blackfin/include/asm/cplb.h
+++ b/arch/blackfin/include/asm/cplb.h
@@ -46,8 +46,11 @@
 #define CPLB_IDOCACHE  CPLB_INOCACHE | CPLB_L1_CHBL
 
 /* Data Attibutes*/
-
+#if defined(__ADSPBF60x__)
+#define SDRAM_IGENERIC  (PAGE_SIZE_16MB | CPLB_L1_CHBL | CPLB_USER_RD 
| CPLB_VALID)
+#else
 #define SDRAM_IGENERIC  (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_USER_RD | 
CPLB_VALID)
+#endif
 #define SDRAM_IKERNEL   (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_USER_RD | 
CPLB_VALID | CPLB_LOCK)
 #define L1_IMEMORY  (PAGE_SIZE_1MB | CPLB_USER_RD | CPLB_VALID | 
CPLB_LOCK)
 #define SDRAM_INON_CHBL (PAGE_SIZE_4MB | CPLB_USER_RD | CPLB_VALID)
@@ -59,14 +62,22 @@
 #endif
 
 #ifdef CONFIG_DCACHE_WB/*Write Back Policy */
+#if defined(__ADSPBF60x__)
+#define SDRAM_DGENERIC  (PAGE_SIZE_16MB | CPLB_L1_CHBL | CPLB_DIRTY | 
CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
+#else
 #define SDRAM_DGENERIC  (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_DIRTY | 
CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
+#endif
 #define SDRAM_DNON_CHBL (PAGE_SIZE_4MB | CPLB_DIRTY | CPLB_SUPV_WR | 
CPLB_USER_RD | CPLB_USER_WR | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
 #define SDRAM_DKERNEL   (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_USER_RD | 
CPLB_USER_WR | CPLB_DIRTY | CPLB_SUPV_WR | CPLB_VALID | CPLB_LOCK | 
ANOMALY_05000158_WORKAROUND)
 #define L1_DMEMORY  (PAGE_SIZE_4MB | CPLB_SUPV_WR | CPLB_USER_WR | 
CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
 #define SDRAM_EBIU  (PAGE_SIZE_4MB | CPLB_DIRTY | CPLB_USER_RD | 
CPLB_USER_WR | CPLB_SUPV_WR | CPLB_VALID | ANOMALY_05000158_WORKAROUND)
 
 #else  /*Write Through */
+#if defined(__ADSPBF60x__)
+#define SDRAM_DGENERIC  (PAGE_SIZE_16MB | CPLB_L1_CHBL | CPLB_WT | 
CPLB_L1_AOW | CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
+#else
 #define SDRAM_DGENERIC  (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_WT | 
CPLB_L1_AOW | CPLB_SUPV_WR | CPLB_USER_RD | CPLB_USER_WR | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
+#endif
 #define SDRAM_DNON_CHBL (PAGE_SIZE_4MB | CPLB_WT | CPLB_L1_AOW | 
CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | 
ANOMALY_05000158_WORKAROUND)
 #define SDRAM_DKERNEL   (PAGE_SIZE_4MB | CPLB_L1_CHBL | CPLB_WT | 
CPLB_L1_AOW | CPLB_USER_RD | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_VALID | 
CPLB_LOCK | ANOMALY_05000158_WORKAROUND)
 #define L1_DMEMORY  (PAGE_SIZE_4MB | CPLB_SUPV_WR | CPLB_USER_WR | 
CPLB_VALID | ANOMALY_05000158_WORKAROUND)
diff --git a/arch/blackfin/include/asm/mach-common/bits/mpu.h 
b/arch/blackfin/include/asm/mach-common/bits/mpu.h
index 39998f8..d067ef9 100644
--- a/arch/blackfin/include/asm/mach-common/bits/mpu.h
+++ b/arch/blackfin/include/asm/mach-common/bits/mpu.h
@@ -70,7 +70,11 @@
 #define PAGE_SIZE_4KB  0x0001  /* 4 KB page size */
 #define PAGE_SIZE_1MB  0x0002  /* 1 MB page size */
 #define PAGE_SIZE_4MB  0x0003  /* 4 MB page size */
-#define PAGE_SIZE_MASK 0x0003  /* the bits for the page_size 
field */
+#define PAGE_SIZE_16KB 0x0004  /* 16 KB page size */
+#define PAGE_SIZE_64KB 0x0005  /* 64 KB page size */
+#define PAGE_SIZE_16MB 0x0006  /* 16 MB page size */
+#define PAGE_SIZE_64MB 0x0007  /* 64 MB page size */
+#define PAGE_SIZE_MASK 0x0007  /* the bits for the page_size 
field */
 #define PAGE_SIZE_SHIFT16
 #define CPLB_L1SRAM0x0020  /* 0=SRAM mapped in L1, 0=SRAM 
not mapped to L1 */
 #define CPLB_PORTPRIO  0x0200  /* 0=low priority port, 1= high 
priority port */
diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c
index cfb38e8..4e44bf0 100644
--- a/arch/blackfin/lib/board.c
+++ b/arch/blackfin/lib/board.c
@@ -94,12 +94,12 @@ static void display_global_data(void)
printf(   \\-bi_flashoffset: %lx\n, bd-bi_flashoffset);
 }
 
-#define CPLB_PAGE_SIZE (4 * 1024 * 1024)
-#define CPLB_PAGE_MASK (~(CPLB_PAGE_SIZE - 1))
 void init_cplbtables(void)
 {
volatile uint32_t *ICPLB_ADDR, *ICPLB_DATA;
volatile uint32_t *DCPLB_ADDR

[U-Boot] [PATCH 06/16] Blackfin: Bf609-ezkit: implement soft switch

2012-08-07 Thread Bob Liu

From: Sonic Zhang sonic.zh...@analog.com

Set up soft switch pins properly in board init code.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 board/bf609-ezkit/Makefile  |1 +
 board/bf609-ezkit/bf609-ezkit.c |   22 +++--
 board/bf609-ezkit/soft_switch.c |  173 +++
 board/bf609-ezkit/soft_switch.h |   71 
 include/configs/bf609-ezkit.h   |6 +-
 5 files changed, 260 insertions(+), 13 deletions(-)
 create mode 100644 board/bf609-ezkit/soft_switch.c
 create mode 100644 board/bf609-ezkit/soft_switch.h

diff --git a/board/bf609-ezkit/Makefile b/board/bf609-ezkit/Makefile
index cde8168..0bb8fe6 100644
--- a/board/bf609-ezkit/Makefile
+++ b/board/bf609-ezkit/Makefile
@@ -30,6 +30,7 @@ include $(TOPDIR)/config.mk
 LIB= $(obj)lib$(BOARD).o
 
 COBJS-y:= $(BOARD).o
+COBJS-$(CONFIG_BFIN_SOFT_SWITCH)   += soft_switch.o
 
 SRCS   := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS-y))
diff --git a/board/bf609-ezkit/bf609-ezkit.c b/board/bf609-ezkit/bf609-ezkit.c
index d701c36..d54906b 100644
--- a/board/bf609-ezkit/bf609-ezkit.c
+++ b/board/bf609-ezkit/bf609-ezkit.c
@@ -11,6 +11,7 @@
 #include asm/blackfin.h
 #include asm/io.h
 #include asm/portmux.h
+#include soft_switch.h
 
 int checkboard(void)
 {
@@ -32,30 +33,20 @@ int board_early_init_f(void)
 }
 
 #ifdef CONFIG_DESIGNWARE_ETH
-#define TWI_ADDR 0x20
 int board_eth_init(bd_t *bis)
 {
int ret = 0;
-   uchar idira = 0x0;
-   uchar lata = 0xff;
 
if (CONFIG_DW_PORTS  1) {
static const unsigned short pins[] = P_RMII0;
if (!peripheral_request_list(pins, emac0)) {
-   /* enable phy clk */
-   ret = i2c_write(TWI_ADDR, 0x0, 1, idira, 1);
-   if (!ret) {
-   ret = i2c_write(TWI_ADDR, 0x14, 1, lata, 1);
-   if (!ret)
-   ret += designware_initialize(0, 
EMAC0_MACCFG, 1, 0);
-   }
+   ret += designware_initialize(0, EMAC0_MACCFG, 1, 0);
}
}
-
if (CONFIG_DW_PORTS  2) {
static const unsigned short pins[] = P_RMII1;
if (!peripheral_request_list(pins, emac1))
-   ret += designware_initialize(1, EMAC1_MACCFG, 1, 0, 1);
+   ret += designware_initialize(1, EMAC1_MACCFG, 1, 0);
}
 
return ret;
@@ -68,3 +59,10 @@ int board_mmc_init(bd_t *bis)
return bfin_mmc_init(bis);
 }
 #endif
+
+/* miscellaneous platform dependent initialisations */
+int misc_init_r(void)
+{
+   printf(other init\n);
+   return setup_board_switches();
+}
diff --git a/board/bf609-ezkit/soft_switch.c b/board/bf609-ezkit/soft_switch.c
new file mode 100644
index 000..9e2265a
--- /dev/null
+++ b/board/bf609-ezkit/soft_switch.c
@@ -0,0 +1,173 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) 2008-2011 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include common.h
+#include asm/blackfin.h
+#include asm/io.h
+#include i2c.h
+#include soft_switch.h
+
+#ifdef CONFIG_BFIN_BOARD_VERSION_1_0
+#define SWITCH_ADDR 0x21
+#else
+#define SWITCH_ADDR 0x20
+#endif
+
+#define NUM_SWITCH  3
+#define IODIRA  0x0
+#define IODIRB  0x1
+#define OLATA   0x14
+#define OLATB   0x15
+
+struct switch_config {
+   uchar dir0; /* IODIRA */
+   uchar dir1; /* IODIRB */
+   uchar value0; /* OLATA */
+   uchar value1; /* OLATB */
+};
+
+static struct switch_config switch_config_array[NUM_SWITCH] = {
+   {
+/*
+   U45 Port A  U45 Port B
+
+   7---  RMII_CLK_EN   |   7--- 
~TEMP_THERM_EN
+   | 6- ~CNT0ZM_EN |   | 6- 
~TEMP_IRQ_EN
+   | | 5--- ~CNT0DG_EN |   | | 5--- 
~UART0CTS_146_EN
+   | | | 4- ~CNT0UD_EN |   | | | 4- 
~UART0CTS_RST_EN
+   | | | | 3--- ~CAN0RX_EN |   | | | | 3--- 
~UART0CTS_RTS_LPBK
+   | | | | | 2- ~CAN0_ERR_EN   |   | | | | | 2- 
~UART0CTS_EN
+   | | | | | | 1--- ~CAN_STB   |   | | | | | | 1--- ~UART0RX_EN
+   | | | | | | | 0-  CAN_EN|   | | | | | | | 0- 
~UART0RTS_EN
+   | | | | | | | | |   | | | | | | | |
+   O O O O O O O O |   O O O O O O O O ( I/O 
direction )
+   1 0 0 0 0 0 1 1 |   1 1 1 1 1 0 0 0 ( value 
being set )
+*/
+   .dir0 = 0x0, /* all output */
+   .dir1 = 0x0, /* all output */
+   .value0 = RMII_CLK_EN | CAN_STB | CAN_EN,
+   .value1 = TEMP_THERM_EN | TEMP_IRQ_EN | UART0CTS_146_EN

[U-Boot] [PATCH 02/16] Blackfin: bf609-ezkit: new board port

2012-08-07 Thread Bob Liu

From: Mike Frysinger vap...@gentoo.org

Add basic support for new board bf609-ezkit.

Signed-off-by: Mike Frysinger vap...@gentoo.org
Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/initcode.c   |   96 ++-
 arch/blackfin/cpu/initcode.h   |9 ++
 arch/blackfin/cpu/serial1.h|   19 +++
 arch/blackfin/cpu/serial4.h|   35 +-
 arch/blackfin/include/asm/mach-bf609/portmux.h |5 +
 arch/blackfin/include/asm/mach-bf609/ports.h   |   56 +++--
 board/bf609-ezkit/Makefile |   54 +
 board/bf609-ezkit/bf609-ezkit.c|   63 ++
 boards.cfg |1 +
 common/cmd_reginfo.c   |4 +-
 include/configs/bf609-ezkit.h  |  148 
 11 files changed, 446 insertions(+), 44 deletions(-)
 create mode 100644 board/bf609-ezkit/Makefile
 create mode 100644 board/bf609-ezkit/bf609-ezkit.c
 create mode 100644 include/configs/bf609-ezkit.h

diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index ae3fe7a..9888f10 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -23,16 +23,18 @@
 
 #include serial.h
 
-#if 0
-
+#ifndef __ADSPBF60x__
 #include asm/mach-common/bits/pll.h
+#else
+#include asm/mach-common/bits/cgu.h
+#endif
 
 __attribute__((always_inline))
 static inline void serial_init(void)
 {
uint32_t uart_base = UART_BASE;
 
-#ifdef __ADSPBF54x__
+#if defined(__ADSPBF54x__) || defined(__ADSPBF60x__)
 # ifdef BFIN_BOOT_UART_USE_RTS
 #  define BFIN_UART_USE_RTS 1
 # else
@@ -42,7 +44,11 @@ static inline void serial_init(void)
size_t i;
 
/* force RTS rather than relying on auto RTS */
+#if BFIN_UART_HW_VER  4
bfin_write16(pUART-mcr, bfin_read16(pUART-mcr) | FCPOL);
+#else
+   bfin_write32(pUART-control, bfin_read32(pUART-control) | 
FCPOL);
+#endif
 
/* Wait for the line to clear up.  We cannot rely on UART
 * registers as none of them reflect the status of the RSR.
@@ -86,12 +92,16 @@ static inline void serial_init(void)
 __attribute__((always_inline))
 static inline void serial_deinit(void)
 {
-#ifdef __ADSPBF54x__
+#if defined(__ADSPBF54x__) || defined(__ADSPBF60x__)
uint32_t uart_base = UART_BASE;
 
if (BFIN_UART_USE_RTS  CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) {
/* clear forced RTS rather than relying on auto RTS */
+#if BFIN_UART_HW_VER  4
bfin_write16(pUART-mcr, bfin_read16(pUART-mcr)  ~FCPOL);
+#else
+   bfin_write32(pUART-control, bfin_read32(pUART-control)  
~FCPOL);
+#endif
}
 #endif
 }
@@ -107,7 +117,7 @@ static inline void serial_putc(char c)
if (c == '\n')
serial_putc('\r');
 
-   bfin_write16(pUART-thr, c);
+   bfin_write(pUART-thr, c);
 
while (!(_lsr_read(pUART)  TEMT))
continue;
@@ -156,6 +166,25 @@ program_nmi_handler(void)
 # define bfin_write_SPI_BAUD bfin_write_SPI0_BAUD
 #endif
 
+#ifdef __ADSPBF60x__
+
+#ifndef CONFIG_CGU_CTL_VAL
+# define CONFIG_CGU_CTL_VAL ((CONFIG_VCO_MULT  8) | CONFIG_CLKIN_HALF)
+#endif
+
+#ifndef CONFIG_CGU_DIV_VAL
+# define CONFIG_CGU_DIV_VAL \
+   (1  UPDT_P) | \
+   ((CONFIG_CCLK_DIVCSEL_P)   | \
+(CONFIG_SCLK0_DIV   S0SEL_P)  | \
+(CONFIG_SCLK_DIV  SYSSEL_P) | \
+(CONFIG_SCLK1_DIV   S1SEL_P)  | \
+(CONFIG_DCLK_DIVDSEL_P)   | \
+(CONFIG_OCLK_DIVOSEL_P))
+#endif
+
+#else /* __ADSPBF60x__ */
+
 /* PLL_DIV defines */
 #ifndef CONFIG_PLL_DIV_VAL
 # if (CONFIG_CCLK_DIV == 1)
@@ -279,6 +308,8 @@ program_nmi_handler(void)
 # endif
 #endif
 
+#endif /*  __ADSPBF60x__ */
+
 __attribute__((always_inline)) static inline void
 program_early_devices(ADI_BOOT_DATA *bs, uint *sdivB, uint *divB, uint *vcoB)
 {
@@ -287,8 +318,12 @@ program_early_devices(ADI_BOOT_DATA *bs, uint *sdivB, uint 
*divB, uint *vcoB)
/* Save the clock pieces that are used in baud rate calculation */
if (BFIN_DEBUG_EARLY_SERIAL || CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) 
{
serial_putc('b');
+#ifdef __ADSPBF60x__
+
+#else
*sdivB = bfin_read_PLL_DIV()  0xf;
*vcoB = (bfin_read_PLL_CTL()  9)  0x3f;
+#endif
*divB = serial_early_get_div();
serial_putc('c');
}
@@ -341,6 +376,10 @@ maybe_self_refresh(ADI_BOOT_DATA *bs)
if (!CONFIG_MEM_SIZE)
return false;
 
+#ifdef __ADSPBF60x__
+
+#else /* __ADSPBF60x__ */
+
/* If external memory is enabled, put it into self refresh first. */
 #if defined(EBIU_RSTCTL)
if (bfin_read_EBIU_RSTCTL()  DDR_SRESET) {
@@ -356,6 +395,7 @@ maybe_self_refresh(ADI_BOOT_DATA *bs)
}
 #endif
 
+#endif /* __ADSPBF60x__

[U-Boot] [PATCH 12/16] Blackfin: Bf60x: initcode: set up uart baud properly

2012-08-07 Thread Bob Liu

From: Sonic Zhang sonic.zh...@analog.com

Set up uart baud properly for booting u-boot over UART

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/initcode.c |8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index 3bb2b98..3197c40 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -433,7 +433,9 @@ program_early_devices(ADI_BOOT_DATA *bs, uint *sdivB, uint 
*divB, uint *vcoB)
if (BFIN_DEBUG_EARLY_SERIAL || CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) 
{
serial_putc('b');
 #ifdef __ADSPBF60x__
-
+   *sdivB = bfin_read_CGU_DIV();
+   *sdivB = ((*sdivB  8)  0x1f) * ((*sdivB  5)  0x7);
+   *vcoB = (bfin_read_CGU_CTL()  8)  0x7f;
 #else
*sdivB = bfin_read_PLL_DIV()  0xf;
*vcoB = (bfin_read_PLL_CTL()  9)  0x3f;
@@ -701,7 +703,9 @@ update_serial_clocks(ADI_BOOT_DATA *bs, uint sdivB, uint 
divB, uint vcoB)
serial_putc('b');
unsigned int sdivR, vcoR;
 #ifdef __ADSPBF60x__
-
+   sdivR = bfin_read_CGU_DIV();
+   sdivR = ((sdivR  8)  0x1f) * ((sdivR  5)  0x7);
+   vcoR = (bfin_read_CGU_CTL()  8)  0x7f;
 #else
sdivR = bfin_read_PLL_DIV()  0xf;
vcoR = (bfin_read_PLL_CTL()  9)  0x3f;
-- 
1.7.9.5


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[U-Boot] [PATCH 11/16] Blackfin: Bf60x: support clock init

2012-08-07 Thread Bob Liu

Add a way to set clock to values getting from config file bf609-ezkit.h

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/initcode.c |  221 +-
 arch/blackfin/include/asm/mach-common/bits/cgu.h |2 +
 include/configs/bf609-ezkit.h|   35 ++--
 3 files changed, 234 insertions(+), 24 deletions(-)

diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index 9888f10..3bb2b98 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -29,6 +29,121 @@
 #include asm/mach-common/bits/cgu.h
 #endif
 
+#ifdef __ADSPBF60x__
+#define CONFIG_BFIN_GET_DCLK_M (CONFIG_BFIN_GET_DCLK/100)
+
+#ifndef CONFIG_DMC_DDRCFG
+#if ((CONFIG_BFIN_GET_DCLK_M != 125)  \
+   (CONFIG_BFIN_GET_DCLK_M != 133)  \
+   (CONFIG_BFIN_GET_DCLK_M != 150)  \
+   (CONFIG_BFIN_GET_DCLK_M != 166)  \
+   (CONFIG_BFIN_GET_DCLK_M != 200)  \
+   (CONFIG_BFIN_GET_DCLK_M != 225)  \
+   (CONFIG_BFIN_GET_DCLK_M != 250))
+#error DDR2 CLK must be in (125, 133, 150, 166, 200, 225, 250)MHz
+#endif
+#endif
+
+/* DMC status bits */
+#define IDLE0x1
+#define MEMINITDONE 0x4
+#define SRACK   0x8
+#define PDACK   0x10
+#define DPDACK  0x20
+#define DLLCALDONE  0x2000
+#define PENDREF 0xF
+#define PHYRDPHASE  0xF0
+#define PHYRDPHASE_OFFSET   20
+
+/* DMC DLL control bits */
+#define DLLCALRDCNT 0xFF
+#define DATACYC_OFFSET  8
+
+struct ddr_config {
+   u32 ddr_clk;
+   u32 dmc_ddrctl;
+   u32 dmc_ddrcfg;
+   u32 dmc_ddrtr0;
+   u32 dmc_ddrtr1;
+   u32 dmc_ddrtr2;
+   u32 dmc_ddrmr;
+   u32 dmc_ddrmr1;
+};
+
+static struct ddr_config ddr_config_table[] = {
+   [0] = {
+   .ddr_clk= 125,  /* 125MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20705212,
+   .dmc_ddrtr1 = 0x201003CF,
+   .dmc_ddrtr2 = 0x00320107,
+   .dmc_ddrmr  = 0x0422,
+   .dmc_ddrmr1 = 0x4,
+   },
+   [1] = {
+   .ddr_clk= 133,  /* 133MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20806313,
+   .dmc_ddrtr1 = 0x2013040D,
+   .dmc_ddrtr2 = 0x00320108,
+   .dmc_ddrmr  = 0x0632,
+   .dmc_ddrmr1 = 0x4,
+   },
+   [2] = {
+   .ddr_clk= 150,  /* 150MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20A07323,
+   .dmc_ddrtr1 = 0x20160492,
+   .dmc_ddrtr2 = 0x00320209,
+   .dmc_ddrmr  = 0x0632,
+   .dmc_ddrmr1 = 0x4,
+   },
+   [3] = {
+   .ddr_clk= 166,  /* 166MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20A07323,
+   .dmc_ddrtr1 = 0x2016050E,
+   .dmc_ddrtr2 = 0x00320209,
+   .dmc_ddrmr  = 0x0632,
+   .dmc_ddrmr1 = 0x4,
+   },
+   [4] = {
+   .ddr_clk= 200,  /* 200MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20a07323,
+   .dmc_ddrtr1 = 0x2016050f,
+   .dmc_ddrtr2 = 0x00320509,
+   .dmc_ddrmr  = 0x0632,
+   .dmc_ddrmr1 = 0x4,
+   },
+   [5] = {
+   .ddr_clk= 225,  /* 225MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20E0A424,
+   .dmc_ddrtr1 = 0x302006DB,
+   .dmc_ddrtr2 = 0x0032020D,
+   .dmc_ddrmr  = 0x0842,
+   .dmc_ddrmr1 = 0x4,
+   },
+   [6] = {
+   .ddr_clk= 250,  /* 250MHz */
+   .dmc_ddrctl = 0x0904,
+   .dmc_ddrcfg = 0x0422,
+   .dmc_ddrtr0 = 0x20E0A424,
+   .dmc_ddrtr1 = 0x3020079E,
+   .dmc_ddrtr2 = 0x0032020D,
+   .dmc_ddrmr  = 0x0842,
+   .dmc_ddrmr1 = 0x4,
+   },
+};
+#endif
+
 __attribute__((always_inline))
 static inline void serial_init(void)
 {
@@ -174,7 +289,6 @@ program_nmi_handler(void)
 
 #ifndef CONFIG_CGU_DIV_VAL
 # define CONFIG_CGU_DIV_VAL \
-   (1  UPDT_P) | \
((CONFIG_CCLK_DIVCSEL_P)   | \
 (CONFIG_SCLK0_DIV   S0SEL_P)  | \
 (CONFIG_SCLK_DIV  SYSSEL_P) | \
@@ -409,12 +523,34 @@ program_clocks(ADI_BOOT_DATA *bs, bool put_into_srfs)
serial_putc('a');
 
 #ifdef __ADSPBF60x__
+   if (bfin_read_DMC0_STAT()  MEMINITDONE) {
+   bfin_write_DMC0_CTL

[U-Boot] [PATCH 13/16] Blackfin: Bf60x: add hw watchdog support

2012-08-07 Thread Bob Liu

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/initcode.c  |   14 ++
 arch/blackfin/cpu/start.S |2 ++
 include/configs/bf609-ezkit.h |1 +
 3 files changed, 17 insertions(+)

diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index 3197c40..c68302f 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -458,8 +458,22 @@ program_early_devices(ADI_BOOT_DATA *bs, uint *sdivB, uint 
*divB, uint *vcoB)
 */
if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS) {
serial_putc('e');
+#ifdef __ADSPBF60x__
+   int i;
+   bfin_write_SEC_GCTL(0x2);
+   while (i++  10);
+   bfin_write_SEC_FCTL(0xc1);
+   bfin_write_SEC_SCTL(2, bfin_read_SEC_SCTL(2) | 0x6);
+
+   bfin_write_SEC_CCTL(0x2);
+   while (i++  10);
+   bfin_write_SEC_GCTL(0x1);
+   bfin_write_SEC_CCTL(0x1);
+#endif

bfin_write_WDOG_CNT(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_INITCODE));
+#if CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART
bfin_write_WDOG_CTL(0);
+#endif
serial_putc('f');
}
 #endif
diff --git a/arch/blackfin/cpu/start.S b/arch/blackfin/cpu/start.S
index 90b4d1a..7155fc8 100644
--- a/arch/blackfin/cpu/start.S
+++ b/arch/blackfin/cpu/start.S
@@ -65,6 +65,7 @@ ENTRY(_start)
p5.h = HI(COREMMR_BASE);
 
 #ifdef CONFIG_HW_WATCHDOG
+#ifndef __ADSPBF60x__
 # ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START
 #  define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000
 # endif
@@ -78,6 +79,7 @@ ENTRY(_start)
/* fire up the watchdog - R0.L above needs to be 0x */
W[p4 + (WDOG_CTL - SYSMMR_BASE)] = r0;
 #endif
+#endif
 
/* Turn on the serial for debugging the init process */
serial_early_init
diff --git a/include/configs/bf609-ezkit.h b/include/configs/bf609-ezkit.h
index 311b2e4..64b1eb6 100644
--- a/include/configs/bf609-ezkit.h
+++ b/include/configs/bf609-ezkit.h
@@ -78,6 +78,7 @@
 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
 #define CONFIG_SYS_MALLOC_LEN  (256 * 1024)
 
+#define CONFIG_HW_WATCHDOG
 /*
  * Network Settings
  */
-- 
1.7.9.5


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[U-Boot] [PATCH 09/16] Blackfin: Bf60x: add reset support

2012-08-07 Thread Bob Liu

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/reset.c |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/blackfin/cpu/reset.c b/arch/blackfin/cpu/reset.c
index 33df0fc..b6718d3 100644
--- a/arch/blackfin/cpu/reset.c
+++ b/arch/blackfin/cpu/reset.c
@@ -70,8 +70,12 @@ static void bfin_reset(void)
 #endif
 
while (1)
+#if defined(__ADSPBF60x__)
+   bfin_write_RCU0_CTL(0x1);
+#else
/* Issue core reset */
asm(raise 1);
+#endif
 }
 
 /* We need to trampoline ourselves up into L1 since our linker
-- 
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[U-Boot] [PATCH 04/16] Blackfin: Rsi: add support for bf609-ezkit

2012-08-07 Thread Bob Liu

From: Sonic Zhang sonic.zh...@analog.com

Add support for bf609-ezkit to board file and mmc driver.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/include/asm/config-pre.h   |4 ++
 arch/blackfin/include/asm/mach-common/bits/dma.h |   47 +-
 arch/blackfin/include/asm/mach-common/bits/sdh.h |   38 -
 board/bf609-ezkit/bf609-ezkit.c  |7 
 drivers/mmc/bfin_sdh.c   |   45 +++--
 include/configs/bf609-ezkit.h|9 -
 6 files changed, 132 insertions(+), 18 deletions(-)

diff --git a/arch/blackfin/include/asm/config-pre.h 
b/arch/blackfin/include/asm/config-pre.h
index 4ce67d4..88aa1da 100644
--- a/arch/blackfin/include/asm/config-pre.h
+++ b/arch/blackfin/include/asm/config-pre.h
@@ -31,6 +31,8 @@
 #define BFIN_BOOT_16HOST_DMA  11  /* boot ldr from 16-bit host dma */
 #define BFIN_BOOT_8HOST_DMA   12  /* boot ldr from 8-bit host dma */
 #define BFIN_BOOT_NAND13  /* boot ldr from nand flash */
+#define BFIN_BOOT_RSI_MASTER  14  /* boot ldr from rsi */
+#define BFIN_BOOT_LP_SLAVE15  /* boot ldr from link port */
 
 #ifndef __ASSEMBLY__
 static inline const char *get_bfin_boot_mode(int bfin_boot)
@@ -49,6 +51,8 @@ static inline const char *get_bfin_boot_mode(int bfin_boot)
case BFIN_BOOT_16HOST_DMA: return 16bit dma;
case BFIN_BOOT_8HOST_DMA:  return 8bit dma;
case BFIN_BOOT_NAND:   return nand flash;
+   case BFIN_BOOT_RSI_MASTER: return rsi master;
+   case BFIN_BOOT_LP_SLAVE:   return link port slave;
default:   return INVALID;
}
 }
diff --git a/arch/blackfin/include/asm/mach-common/bits/dma.h 
b/arch/blackfin/include/asm/mach-common/bits/dma.h
index ee209c6..1126c44 100644
--- a/arch/blackfin/include/asm/mach-common/bits/dma.h
+++ b/arch/blackfin/include/asm/mach-common/bits/dma.h
@@ -9,8 +9,48 @@
 #define DMAEN  0x0001  /* DMA Channel Enable */
 #define WNR0x0002  /* Channel Direction (W/R*) */
 #define WDSIZE_8   0x  /* Transfer Word Size = 8 */
+
+#ifdef CONFIG_BF60x
+
+#define PSIZE_80x  /* Transfer Word Size = 
16 */
+#define PSIZE_16   0x0010  /* Transfer Word Size = 16 */
+#define PSIZE_32   0x0020  /* Transfer Word Size = 32 */
+#define PSIZE_64   0x0030  /* Transfer Word Size = 32 */
+#define WDSIZE_16  0x0100  /* Transfer Word Size = 16 */
+#define WDSIZE_32  0x0200  /* Transfer Word Size = 32 */
+#define WDSIZE_64  0x0300  /* Transfer Word Size = 32 */
+#define WDSIZE_128 0x0400  /* Transfer Word Size = 32 */
+#define WDSIZE_256 0x0500  /* Transfer Word Size = 32 */
+#define DMA2D  0x0400  /* DMA Mode (2D/1D*) */
+#define RESTART0x0004  /* DMA Buffer Clear 
SYNC */
+#define DI_EN_X0x0010  /* Data Interrupt 
Enable in X count */
+#define DI_EN_Y0x0020  /* Data Interrupt 
Enable in Y count */
+#define DI_EN_P0x0030  /* Data Interrupt 
Enable in Peripheral */
+#define DI_EN  DI_EN_X /* Data Interrupt Enable */
+#define NDSIZE_0   0x  /* Next Descriptor Size = 0 
(Stop/Autobuffer) */
+#define NDSIZE_1   0x0001  /* Next Descriptor Size = 1 */
+#define NDSIZE_2   0x0002  /* Next Descriptor Size = 2 */
+#define NDSIZE_3   0x0003  /* Next Descriptor Size = 3 */
+#define NDSIZE_4   0x0004  /* Next Descriptor Size = 4 */
+#define NDSIZE_5   0x0005  /* Next Descriptor Size = 5 */
+#define NDSIZE_6   0x0006  /* Next Descriptor Size = 6 */
+#define NDSIZE 0x0007  /* Next Descriptor Size */
+#define NDSIZE_OFFSET  16  /* Next Descriptor Size Offset 
*/
+#define DMAFLOW_LIST   0x4000  /* Descriptor List Mode */
+#define DMAFLOW_ARRAY  0x5000  /* Descriptor Array Mode */
+#define DMAFLOW_LIST_DEMAND0x6000  /* Descriptor Demand List Mode 
*/
+#define DMAFLOW_ARRAY_DEMAND   0x7000  /* Descriptor Demand Array Mode 
*/
+#define DMA_RUN_DFETCH 0x0100  /* DMA Channel Running 
Indicator (DFETCH) */
+#define DMA_RUN0x0200  /* DMA Channel Running 
Indicator */
+#define DMA_RUN_WAIT_TRIG  0x0300  /* DMA Channel Running 
Indicator (WAIT TRIG) */
+#define DMA_RUN_WAIT_ACK   0x0400  /* DMA Channel Running 
Indicator (WAIT ACK) */
+
+#else
+
 #define WDSIZE_16  0x0004  /* Transfer Word Size = 16

[U-Boot] [PATCH 05/16] Blackfin: Paraflash: add support for bf609-ezkit

2012-08-07 Thread Bob Liu

Add paraflash support for bf609-ezkit to board file.

Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/include/asm/mach-bf609/portmux.h |1 +
 board/bf609-ezkit/bf609-ezkit.c|8 +++---
 include/configs/bf609-ezkit.h  |   35 +++-
 include/configs/bfin_adi_common.h  |4 ++-
 4 files changed, 36 insertions(+), 12 deletions(-)

diff --git a/arch/blackfin/include/asm/mach-bf609/portmux.h 
b/arch/blackfin/include/asm/mach-bf609/portmux.h
index 1cf6fd8..757570f 100644
--- a/arch/blackfin/include/asm/mach-bf609/portmux.h
+++ b/arch/blackfin/include/asm/mach-bf609/portmux.h
@@ -241,6 +241,7 @@
 #define P_A23  (P_DEFINED | P_IDENT(GPIO_PB8) | P_FUNCT(0))
 #define P_A24  (P_DEFINED | P_IDENT(GPIO_PB10) | P_FUNCT(0))
 #define P_A25  (P_DEFINED | P_IDENT(GPIO_PB11) | P_FUNCT(0))
+#define P_NORCK (P_DEFINED | P_IDENT(GPIO_PB0) | P_FUNCT(0))
 
 #define P_AMS1 (P_DEFINED | P_IDENT(GPIO_PB1) | P_FUNCT(0))
 #define P_AMS2 (P_DEFINED | P_IDENT(GPIO_PB4) | P_FUNCT(0))
diff --git a/board/bf609-ezkit/bf609-ezkit.c b/board/bf609-ezkit/bf609-ezkit.c
index 398a6b0..d701c36 100644
--- a/board/bf609-ezkit/bf609-ezkit.c
+++ b/board/bf609-ezkit/bf609-ezkit.c
@@ -22,11 +22,11 @@ int checkboard(void)
 int board_early_init_f(void)
 {
static const unsigned short pins[] = {
-   P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12, P_A13,
-   P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21, P_A22,
-   P_A23, P_A24, P_A25, P_AMS1, P_ABE0, P_ABE1, 0,
+   P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12,
+   P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21,
+   P_A22, P_A23, P_A24, P_A25, P_NORCK, 0,
};
-   peripheral_request_list(pins, smc);
+   peripheral_request_list(pins, smc0);
 
return 0;
 }
diff --git a/include/configs/bf609-ezkit.h b/include/configs/bf609-ezkit.h
index 4dcfeca..91b0cf3 100644
--- a/include/configs/bf609-ezkit.h
+++ b/include/configs/bf609-ezkit.h
@@ -68,9 +68,9 @@
 #define CONFIG_MEM_SIZE128
 
 #define CONFIG_SMC_GCTL_VAL0x0010
-#define CONFIG_SMC_B1CTL_VAL   0x01002001
-#define CONFIG_SMC_B1TIM_VAL   0x08070977
-#define CONFIG_SMC_B1ETIM_VAL  0x00092231
+#define CONFIG_SMC_B0CTL_VAL   0x01007011
+#define CONFIG_SMC_B0TIM_VAL   0x08170977
+#define CONFIG_SMC_B0ETIM_VAL  0x00092231
 
 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
 #define CONFIG_SYS_MALLOC_LEN  (256 * 1024)
@@ -107,14 +107,35 @@
 #define CONFIG_SYS_FLASH_PROTECTION
 #define CONFIG_SYS_MAX_FLASH_BANKS 1
 #define CONFIG_SYS_MAX_FLASH_SECT  131
+#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
 
 /*
  * Env Storage Settings
  */
-#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_ENV_SIZE 0x600
-#undef CONFIG_CMD_EXPORTENV
-#undef CONFIG_CMD_IMPORTENV
+#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_OFFSET   0x1
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_SECT_SIZE0x1
+#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
+#elif (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET   0x6
+#define CONFIG_ENV_SIZE 0x2
+#else
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_OFFSET   0x8000
+#define CONFIG_ENV_SIZE 0x8000
+#define CONFIG_ENV_SECT_SIZE0x8000
+#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
+#define UBOOT_ENV_UPDATE \
+protect off 0xB000 +$(filesize); \
+erase 0xB000 +$(filesize); \
+cp.b $(loadaddr) 0xB000 $(filesize)
+#endif
+
+#define FLASHBOOT_ENV_SETTINGS flashboot=bootm 0xB010\0
 
 /*
  * SDH Settings
diff --git a/include/configs/bfin_adi_common.h 
b/include/configs/bfin_adi_common.h
index 5cec778..164e8ca 100644
--- a/include/configs/bfin_adi_common.h
+++ b/include/configs/bfin_adi_common.h
@@ -195,10 +195,12 @@
nand erase 0 0x4; \
nand write $(loadaddr) 0 0x4
 # else
-#  define UBOOT_ENV_UPDATE \
+#  ifndef UBOOT_ENV_UPDATE
+#   define UBOOT_ENV_UPDATE \
protect off 0x2000 +$(filesize); \
erase 0x2000 +$(filesize); \
cp.b $(loadaddr) 0x2000 $(filesize)
+#  endif
 # endif
 # ifdef CONFIG_NETCONSOLE
 #  define NETCONSOLE_ENV \
-- 
1.7.9.5


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[U-Boot] [PATCH 10/16] Blackfin: Bf60x: Check card ready for each RSI command

2012-08-07 Thread Bob Liu

From: Sonic Zhang sonic.zh...@analog.com

Set up RSI data before sending RSI command if data is applicable.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 drivers/mmc/bfin_sdh.c |   23 ---
 1 file changed, 20 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c
index 4dd9b78..f22429a 100644
--- a/drivers/mmc/bfin_sdh.c
+++ b/drivers/mmc/bfin_sdh.c
@@ -79,6 +79,9 @@ sdh_send_cmd(struct mmc *mmc, struct mmc_cmd *mmc_cmd)
sdh_cmd |= CMD_RSP;
if (flags  MMC_RSP_136)
sdh_cmd |= CMD_L_RSP;
+#ifdef RSI_BLKSZ
+   sdh_cmd |= CMD_DATA0_BUSY;
+#endif
 
bfin_write_SDH_ARGUMENT(arg);
bfin_write_SDH_COMMAND(sdh_cmd);
@@ -113,6 +116,12 @@ sdh_send_cmd(struct mmc *mmc, struct mmc_cmd *mmc_cmd)
 
bfin_write_SDH_STATUS_CLR(CMD_SENT_STAT | CMD_RESP_END_STAT |
CMD_TIMEOUT_STAT | CMD_CRC_FAIL_STAT);
+#ifdef RSI_BLKSZ
+   /* wait till card ready */
+   while (!(bfin_read_RSI_ESTAT()  SD_CARD_READY))
+   ;
+   bfin_write_RSI_ESTAT(SD_CARD_READY);
+#endif
 
return ret;
 }
@@ -122,7 +131,6 @@ static int sdh_setup_data(struct mmc *mmc, struct mmc_data 
*data)
 {
u16 data_ctl = 0;
u16 dma_cfg = 0;
-   int ret = 0;
unsigned long data_size = data-blocksize * data-blocks;
 
/* Don't support write yet. */
@@ -150,7 +158,7 @@ static int sdh_setup_data(struct mmc *mmc, struct mmc_data 
*data)
/* kick off transfer */
bfin_write_SDH_DATA_CTL(bfin_read_SDH_DATA_CTL() | DTX_DMA_E | DTX_E);
 
-   return ret;
+   return 0;
 }
 
 
@@ -160,15 +168,23 @@ static int bfin_sdh_request(struct mmc *mmc, struct 
mmc_cmd *cmd,
u32 status;
int ret = 0;
 
+   if (data) {
+   ret = sdh_setup_data(mmc, data);
+   if (ret)
+   return ret;
+   }
+
ret = sdh_send_cmd(mmc, cmd);
if (ret) {
bfin_write_SDH_COMMAND(0);
+   bfin_write_DMA_CONFIG(0);
+   bfin_write_SDH_DATA_CTL(0);
SSYNC();
printf(sending CMD%d failed\n, cmd-cmdidx);
return ret;
}
+
if (data) {
-   ret = sdh_setup_data(mmc, data);
do {
udelay(1);
status = bfin_read_SDH_STATUS();
@@ -253,6 +269,7 @@ static int bfin_sdh_init(struct mmc *mmc)
bfin_write_SDH_PWR_CTL(PWR_ON | ROD_CTL);
 #else
bfin_write_SDH_CFG(bfin_read_SDH_CFG() | PWR_ON);
+#endif
return 0;
 }
 
-- 
1.7.9.5


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[U-Boot] [PATCH 07/16] Blackfin: Spi: add bf6xx spi driver

2012-08-07 Thread Bob Liu

From: Scott Jiang scott.jiang.li...@gmail.com

Spi driver for bf60x is different from old one, so implement a new
driver for it.

Signed-off-by: Scott Jiang scott.jiang.li...@gmail.com
Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 .../blackfin/include/asm/mach-common/bits/spi6xx.h |  240 +++
 drivers/spi/Makefile   |1 +
 drivers/spi/bfin_spi6xx.c  |  308 
 include/configs/bf609-ezkit.h  |9 +
 4 files changed, 558 insertions(+)
 create mode 100644 arch/blackfin/include/asm/mach-common/bits/spi6xx.h
 create mode 100644 drivers/spi/bfin_spi6xx.c

diff --git a/arch/blackfin/include/asm/mach-common/bits/spi6xx.h 
b/arch/blackfin/include/asm/mach-common/bits/spi6xx.h
new file mode 100644
index 000..535a24a
--- /dev/null
+++ b/arch/blackfin/include/asm/mach-common/bits/spi6xx.h
@@ -0,0 +1,240 @@
+/*
+ * Analog Devices SPI3 controller driver
+ *
+ * Copyright (c) 2011 Analog Devices Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _SPI_CHANNEL_H_
+#define _SPI_CHANNEL_H_
+
+#include linux/types.h
+
+/* SPI_CONTROL */
+#define SPI_CTL_EN  0x0001/* Enable */
+#define SPI_CTL_MSTR0x0002/* Master/Slave */
+#define SPI_CTL_PSSE0x0004/* controls modf error in 
master mode */
+#define SPI_CTL_ODM 0x0008/* Open Drain Mode */
+#define SPI_CTL_CPHA0x0010/* Clock Phase */
+#define SPI_CTL_CPOL0x0020/* Clock Polarity */
+#define SPI_CTL_ASSEL   0x0040/* Slave Select Pin Control 
*/
+#define SPI_CTL_SELST   0x0080/* Slave Select Polarity 
in-between transfers */
+#define SPI_CTL_EMISO   0x0100/* Enable MISO */
+#define SPI_CTL_SIZE0x0600/* Word Transfer Size */
+#define SPI_CTL_SIZE08  0x/* SIZE: 8 bits */
+#define SPI_CTL_SIZE16  0x0200/* SIZE: 16 bits */
+#define SPI_CTL_SIZE32  0x0400/* SIZE: 32 bits */
+#define SPI_CTL_LSBF0x1000/* LSB First */
+#define SPI_CTL_FCEN0x2000/* Flow-Control Enable */
+#define SPI_CTL_FCCH0x4000/* Flow-Control Channel 
Selection */
+#define SPI_CTL_FCPL0x8000/* Flow-Control Polarity */
+#define SPI_CTL_FCWM0x0003/* Flow-Control Water-Mark */
+#define SPI_CTL_FIFO0   0x/* FCWM: TFIFO empty or 
RFIFO Full */
+#define SPI_CTL_FIFO1   0x0001/* FCWM: TFIFO 75% or more 
empty or RFIFO 75% or more full */
+#define SPI_CTL_FIFO2   0x0002/* FCWM: TFIFO 50% or more 
empty or RFIFO 50% or more full */
+#define SPI_CTL_FMODE   0x0004/* Fast-mode Enable */
+#define SPI_CTL_MIOM0x0030/* Multiple I/O Mode */
+#define SPI_CTL_MIO_DIS 0x/* MIOM: Disable */
+#define SPI_CTL_MIO_DUAL0x0010/* MIOM: Enable DIOM (Dual 
I/O Mode) */
+#define SPI_CTL_MIO_QUAD0x0020/* MIOM: Enable QUAD (Quad 
SPI Mode) */
+#define SPI_CTL_SOSI0x0040/* Start on MOSI */
+/* SPI_RX_CONTROL */
+#define SPI_RXCTL_REN   0x0001/* Receive Channel Enable */
+#define SPI_RXCTL_RTI   0x0004/* Receive Transfer Initiate 
*/
+#define SPI_RXCTL_RWCEN 0x0008/* Receive Word Counter 
Enable */
+#define SPI_RXCTL_RDR   0x0070/* Receive Data Request */
+#define SPI_RXCTL_RDR_DIS   0x/* RDR: Disabled */
+#define SPI_RXCTL_RDR_NE0x0010/* RDR: RFIFO not empty */
+#define SPI_RXCTL_RDR_250x0020/* RDR: RFIFO 25% full */
+#define SPI_RXCTL_RDR_500x0030/* RDR: RFIFO 50% full */
+#define SPI_RXCTL_RDR_750x0040/* RDR: RFIFO 75% full */
+#define SPI_RXCTL_RDR_FULL  0x0050/* RDR: RFIFO full */
+#define SPI_RXCTL_RDO   0x0100/* Receive Data Over-Run */
+#define SPI_RXCTL_RRWM  0x3000/* FIFO Regular Water-Mark */
+#define SPI_RXCTL_RWM_0 0x

[U-Boot] [PATCH 16/16] Blackfin: update license to Clear BSD license.

2012-08-07 Thread Bob Liu

From: Sonic Zhang sonic.zh...@analog.com

Per the request from ADI Legal.

Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/Clear_BSD.txt|   33 
 arch/blackfin/cpu/bootcount.c  |2 +-
 arch/blackfin/cpu/os_log.c |2 +-
 arch/blackfin/include/asm/mach-bf506/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf518/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf527/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf533/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf537/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf538/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf548/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf561/anomaly.h |3 +--
 arch/blackfin/include/asm/mach-bf609/anomaly.h |3 +--
 12 files changed, 44 insertions(+), 20 deletions(-)
 create mode 100644 arch/blackfin/Clear_BSD.txt

diff --git a/arch/blackfin/Clear_BSD.txt b/arch/blackfin/Clear_BSD.txt
new file mode 100644
index 000..bfa4b37
--- /dev/null
+++ b/arch/blackfin/Clear_BSD.txt
@@ -0,0 +1,33 @@
+The Clear BSD license:
+
+Copyright (c) 2012, Analog Devices, Inc.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted (subject to the limitations in the
+disclaimer below) provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright
+   notice, this list of conditions and the following disclaimer.
+
+* Redistributions in binary form must reproduce the above copyright
+   notice, this list of conditions and the following disclaimer in the
+   documentation and/or other materials provided with the
+   distribution.
+
+* Neither the name of Analog Devices, Inc.  nor the names of its
+   contributors may be used to endorse or promote products derived
+   from this software without specific prior written permission.
+
+NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
+GRANTED BY THIS LICENSE.  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
+HOLDERS AND CONTRIBUTORS AS IS AND ANY EXPRESS OR IMPLIED
+WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/arch/blackfin/cpu/bootcount.c b/arch/blackfin/cpu/bootcount.c
index 6cf6dd5..83e8546 100644
--- a/arch/blackfin/cpu/bootcount.c
+++ b/arch/blackfin/cpu/bootcount.c
@@ -3,7 +3,7 @@
  *
  * Copyright (c) 2010 Analog Devices Inc.
  *
- * Licensed under the 2-clause BSD.
+ * Licensed under the Clear BSD.
  */
 
 /* This version uses one 32bit storage and combines the magic/count */
diff --git a/arch/blackfin/cpu/os_log.c b/arch/blackfin/cpu/os_log.c
index e1c8e29..51501f7 100644
--- a/arch/blackfin/cpu/os_log.c
+++ b/arch/blackfin/cpu/os_log.c
@@ -3,7 +3,7 @@
  *
  * Copyright (c) 2009 Analog Devices Inc.
  *
- * Licensed under the 2-clause BSD.
+ * Licensed under the Clear BSD.
  */
 
 #include common.h
diff --git a/arch/blackfin/include/asm/mach-bf506/anomaly.h 
b/arch/blackfin/include/asm/mach-bf506/anomaly.h
index 5b3227a..00d5e43 100644
--- a/arch/blackfin/include/asm/mach-bf506/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf506/anomaly.h
@@ -6,8 +6,7 @@
  * DO NOT EDIT THIS FILE
  *
  * Copyright 2004-2011 Analog Devices Inc.
- * Licensed under the ADI BSD license.
- *   https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
+ * Licensed under the Clear BSD license.
  */
 
 /* This file should be up to date with:
diff --git a/arch/blackfin/include/asm/mach-bf518/anomaly.h 
b/arch/blackfin/include/asm/mach-bf518/anomaly.h
index 56383f7..845e6bc 100644
--- a/arch/blackfin/include/asm/mach-bf518/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf518/anomaly.h
@@ -6,8 +6,7 @@
  * DO NOT EDIT THIS FILE
  *
  * Copyright 2004-2011 Analog Devices Inc.
- * Licensed under the ADI BSD license.
- *   https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
+ * Licensed under the Clear BSD license.
  */
 
 /* This file should be up to date with:
diff --git a/arch/blackfin/include/asm/mach-bf527/anomaly.h 
b/arch/blackfin/include/asm/mach-bf527/anomaly.h
index 6884706..aa14110 100644
--- a/arch/blackfin/include/asm/mach-bf527/anomaly.h
+++ b/arch/blackfin/include/asm/mach-bf527/anomaly.h
@@ -6,8 +6,7 @@
  * DO NOT EDIT THIS FILE
  *
  * Copyright 2004-2011 Analog Devices Inc

[U-Boot] [PATCH 14/16] Blackfin: setup SMC if user desires it

2012-08-07 Thread Bob Liu

From: Mike Frysinger vap...@gentoo.org

The static memory controller is how people connect flashes to newer
Blackfin processors, so add knobs for people to program settings if
they so desire.

Signed-off-by: Mike Frysinger vap...@gentoo.org
Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/initcode.h |   51 ++
 1 file changed, 47 insertions(+), 4 deletions(-)

diff --git a/arch/blackfin/cpu/initcode.h b/arch/blackfin/cpu/initcode.h
index d263ab3..0b8c033 100644
--- a/arch/blackfin/cpu/initcode.h
+++ b/arch/blackfin/cpu/initcode.h
@@ -50,13 +50,12 @@ program_async_controller(ADI_BOOT_DATA *bs)
serial_putc('a');
 
 #ifdef __ADSPBF60x__
-
-#else /* __ADSPBF60x__ */
-
/* Program the async banks controller. */
+#ifdef EBIU_AMGCTL
bfin_write_EBIU_AMBCTL0(CONFIG_EBIU_AMBCTL0_VAL);
bfin_write_EBIU_AMBCTL1(CONFIG_EBIU_AMBCTL1_VAL);
bfin_write_EBIU_AMGCTL(CONFIG_EBIU_AMGCTL_VAL);
+#endif
 
serial_putc('b');
 
@@ -73,8 +72,52 @@ program_async_controller(ADI_BOOT_DATA *bs)
 # endif
 #endif
 
-#endif
serial_putc('c');
+
+#else  /* __ADSPBF60x__ */
+   /* Program the static memory controller. */
+# ifdef CONFIG_SMC_GCTL_VAL
+   bfin_write_SMC_GCTL(CONFIG_SMC_GCTL_VAL);
+# endif
+# ifdef CONFIG_SMC_B0CTL_VAL
+   bfin_write_SMC_B0CTL(CONFIG_SMC_B0CTL_VAL);
+# endif
+# ifdef CONFIG_SMC_B0TIM_VAL
+   bfin_write_SMC_B0TIM(CONFIG_SMC_B0TIM_VAL);
+# endif
+# ifdef CONFIG_SMC_B0ETIM_VAL
+   bfin_write_SMC_B0ETIM(CONFIG_SMC_B0ETIM_VAL);
+# endif
+# ifdef CONFIG_SMC_B1CTL_VAL
+   bfin_write_SMC_B1CTL(CONFIG_SMC_B1CTL_VAL);
+# endif
+# ifdef CONFIG_SMC_B1TIM_VAL
+   bfin_write_SMC_B1TIM(CONFIG_SMC_B1TIM_VAL);
+# endif
+# ifdef CONFIG_SMC_B1ETIM_VAL
+   bfin_write_SMC_B1ETIM(CONFIG_SMC_B1ETIM_VAL);
+# endif
+# ifdef CONFIG_SMC_B2CTL_VAL
+   bfin_write_SMC_B2CTL(CONFIG_SMC_B2CTL_VAL);
+# endif
+# ifdef CONFIG_SMC_B2TIM_VAL
+   bfin_write_SMC_B2TIM(CONFIG_SMC_B2TIM_VAL);
+# endif
+# ifdef CONFIG_SMC_B2ETIM_VAL
+   bfin_write_SMC_B2ETIM(CONFIG_SMC_B2ETIM_VAL);
+# endif
+# ifdef CONFIG_SMC_B3CTL_VAL
+   bfin_write_SMC_B3CTL(CONFIG_SMC_B3CTL_VAL);
+# endif
+# ifdef CONFIG_SMC_B3TIM_VAL
+   bfin_write_SMC_B3TIM(CONFIG_SMC_B3TIM_VAL);
+# endif
+# ifdef CONFIG_SMC_B3ETIM_VAL
+   bfin_write_SMC_B3ETIM(CONFIG_SMC_B3ETIM_VAL);
+# endif
+
+#endif
+   serial_putc('d');
 }
 
 #endif
-- 
1.7.9.5


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[U-Boot] [PATCH 15/16] Blackfin: Bf60x: add resume from hibernate

2012-08-07 Thread Bob Liu

From: Steven Miao real...@gmail.com

Add Bf60x resume from hibernate support

Signed-off-by: Steven Miao real...@gmail.com
Signed-off-by: Sonic Zhang sonic.zh...@analog.com
Signed-off-by: Bob Liu lliu...@gmail.com
---
 arch/blackfin/cpu/initcode.c |   46 ++
 1 file changed, 46 insertions(+)

diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index c68302f..0640c81 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -507,6 +507,11 @@ maybe_self_refresh(ADI_BOOT_DATA *bs)
return false;
 
 #ifdef __ADSPBF60x__
+   /* resume from hibernate, return false let ddr initialize */
+   if ((bfin_read32(DPM0_STAT)  0xF0) == 0x50) {
+   serial_putc('b');
+   return false;
+   }
 
 #else /* __ADSPBF60x__ */
 
@@ -821,6 +826,7 @@ program_memory_controller(ADI_BOOT_DATA *bs, bool 
put_into_srfs)
while (!(bfin_read_DMC0_STAT()  DLLCALDONE))
continue;
serial_putc('!');
+
 #else /* __ADSPBF60x__ */
 
/* Program the external memory controller before we come out of
@@ -888,7 +894,46 @@ check_hibernation(ADI_BOOT_DATA *bs, u16 vr_ctl, bool 
put_into_srfs)
return;
 
serial_putc('b');
+#ifdef __ADSPBF60x__
+   if (bfin_read32(DPM0_RESTORE0) != 0) {
+   uint32_t reg = bfin_read_DMC0_CTL();
+   reg = ~0x8;
+   bfin_write_DMC0_CTL(reg);
+
+   while ((bfin_read_DMC0_STAT()  0x8))
+   continue;
+   while (!(bfin_read_DMC0_STAT()  0x1))
+   continue;
+
+   serial_putc('z');
+   volatile uint32_t *hibernate_magic = bfin_read32(DPM0_RESTORE4);
+   __builtin_bfin_ssync(); /* make sure memory controller is done 
*/
+   if (hibernate_magic[0] == 0xDEADBEEF) {
+   serial_putc('c');
+
+   __builtin_bfin_ssync();
+
+   bfin_write_EVT15(hibernate_magic[1]);
+   bfin_write_IMASK(EVT_IVG15);
+   __asm__ __volatile__ (
+   /* load reti early to avoid anomaly 281 */
+   reti = %2;
+   /* clear hibernate magic */
+   [%0] = %1;
+   /* load stack pointer */
+   SP = [%0 + 8];
+   /* lower ourselves from reset ivg to ivg15 */
+   raise 15;
+   nop;nop;nop;
+   rti;
+   :
+   : p(hibernate_magic), d(0x2000 /* jump.s 0 
*/), d(0xffa0)
+   );
+   }
 
+
+   }
+#else
/* Are we coming out of hibernate (suspend to memory) ?
 * The memory layout is:
 * 0x0: hibernate magic for anomaly 307 (0xDEADBEEF)
@@ -920,6 +965,7 @@ check_hibernation(ADI_BOOT_DATA *bs, u16 vr_ctl, bool 
put_into_srfs)
}
serial_putc('d');
}
+#endif
 
serial_putc('e');
 }
-- 
1.7.9.5


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[U-Boot] usb showed wrong device count

2012-04-18 Thread Bob Liu

Hi folks,

After patch: usb: Add support for multiple-LUN mass storage devices
The usb device count isn't correct.

bfin usb start
(Re)start USB...
USB:   scanning bus for devices... 1 USB Device(s) found
   scanning bus for storage devices... max USB Storage Device
reached: 5 stopping
5 Storage Device(s) found
bfin

It used to be:
bfin usb start
(Re)start USB...
USB:   scanning bus for devices... 1 USB Device(s) found
   scanning bus for storage devices... 1 USB Device(s) found
bfin

Any idea? thanks.

-- 
Regards,
--Bob
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[U-Boot] [BUG] cfi_flash can't work correctly on latest uboot

2011-11-02 Thread Bob Liu

Hi, folks

I think this patch make cfi_flash can't work correctly.
http://git.denx.de/?p=u-boot.git;a=commitdiff;h=df4e813b72bf07d9026b00455f5e7dffd694ae48

--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1426,6 +1426,11 @@ int flash_real_protect (flash_info_t * info,
long sector, int prot)
 #endif
};

+   /*
+* Flash needs to be in status register read mode for
+* flash_full_status_check() to work correctly
+*/
+   flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);

--
without this line, flash can't be recognized. So it's correct here.

U-Boot 2011.09-svn2735 (ADI-2012R1-pre) (Nov 02 2011 - 15:05:23)

CPU:   ADSP bf526-0.0 (Detected Rev: 0.2) (parallel flash boot)
Board: ADI BF526 EZ-Board board
   Support: http://blackfin.uclinux.org/
Clock: VCO: 400 MHz, Core: 400 MHz, System: 80 MHz
RAM:   64 MiB
Flash: Flash protect timeout at address 20004000 data 1520ff01
Flash protect error at address 20004000
Vpp Low Error.
4 MiB
Flash protect timeout at address 2000 data 1520ff01
Flash protect error at address 2000
Flash protect timeout at address 20002000 data 1520ff01
Flash protect error at address 20002000
Block locked.
Vpp Low Error.
Flash protect timeout at address 20004000 data 1520ff01
Flash protect error at address 20004000
Vpp Low Error.
Flash protect timeout at address 20006000 data 1520ff01
Flash protect error at address 20006000
Flash protect timeout at address 20008000 data 1520ff01
Flash protect error at address 20008000
Block locked.
Vpp Low Error.
Flash protect timeout at address 2000a000 data 1520ff01
Flash protect error at address 2000a000
Block locked.
Vpp Low Error.
Flash protect timeout at address 2000c000 data 1520ff01
Flash protect error at address 2000c000
Vpp Low Error.
Flash protect timeout at address 2000e000 data 1520ff01
Flash protect error at address 2000e000
Block Erase Error.

--

if ((retcode =
 flash_full_status_check (info, sector, info-erase_blk_tout,
  prot ? protect : unprotect)) == 0) {
@@ -1975,6 +1980,13 @@ ulong flash_get_size (phys_addr_t base, int banknum)
case CFI_CMDSET_INTEL_PROG_REGIONS:
case CFI_CMDSET_INTEL_EXTENDED:
case CFI_CMDSET_INTEL_STANDARD:
+   /*
+* Set flash to read-id mode. Otherwise
+* reading protected status is not
+* guaranteed.
+*/
+   flash_write_cmd(info, sect_cnt, 0,
+   FLASH_CMD_READ_ID);

But with this two lines. flash ops are not correct.

I used old uboot version to read out data from flash.
Then tftpboot and run with latest uboot version, you can see that the read out
data from flash is different.
And without set flash to read-id mode here, it works fine.

U-Boot 2010.06 (ADI-2010R1-RC2) (Oct 20 2010 - 04:37:34)

CPU:   ADSP bf526-0.0 (Detected Rev: 0.2) (parallel flash boot)
Board: ADI BF526 EZ-Board board
   Support: http://blackfin.uclinux.org/
Clock: VCO: 400 MHz, Core: 400 MHz, System: 80 MHz
RAM:   64 MiB
Flash: 4 MiB
In:serial
Out:   serial
Err:   serial
KGDB:  [on serial] ready
Net:   bfin_mac
Hit any key to stop autoboot:  0
bfin
bfin md 0x2010
2010: 56190527 0b223987 d60baf4e 2e871c00'..V.9.N...
20100010: 0010 c42c1c00 a86adb94 01021005..,...j.
20100020: 32356662 2e302d36 2e332d30 2d382e30bf526-0.0-3.0.8-
20100030: 2d494441 31313032 702d3152 732d6572ADI-2011R1-pre-s
20100040: 00088b1f  fdc40302 4514780b.x.E
20100050: 570e38d6 3d33264f 24f48743 0649d303.8.WO3=C..$..I.
20100060: 93080932 834e9970 0931141a 648443a02...p.N...1..C.d
20100070: e0804212 12048762 56501a34 086bb2f1.B..b...4.PV..k.
20100080: 66e0888a d9782808 d165049d 75049945...f.(x...e.E..u
20100090: 31415041 ba02cba2 aebbb2ae 8093d34bAPA1K...
201000a0: 682f1a8a 9cffceb8 105ceeea 7f7df77d../h..\.}.}.
201000b0: 3c7cf3df 3aea984f 9d554ea7 4e753aaa..|O..:.NU..:uN
201000c0: b1a94e5d b13ae91e cc436dbe 749b42c2]N:..mC..B.t
201000d0: fa449283 2aa2ec29 a82e0846 b7089ae5..D.)..*F...
201000e0: cc1f9dc4 a9920651 113e5122 b1122213Q...Q
201000f0: 308f15a9 b6496a6a 12562598 49a8c8af...0jjI..%VI

bfin tftpboot 0x1000 u-boot.bin
Using bfin_mac device
TFTP from server 10.100.4.174; our IP address is 10.100.4.50
Filename 'u-boot.bin'.
Load address: 0x1000
Loading: ###
done
Bytes transferred = 213828 (34344 hex)
bfin go 0x1000
## Starting application at 0x1000 ...


U-Boot

[U-Boot] [HELP] How to load a big image file(40M)

2011-05-25 Thread Bob Liu

Hi, folks

I got a problem while loading big kernel image(size  40M) on ti pandaboard.
-
## Booting kernel from Legacy Image at 8200 ...
   Image Name:   Linux-2.6.39
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:44882584 Bytes = 42.8 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK
   kernel loaded at 0x80008000, end = 0x82ad5a98
images.os.start = 0x8200, images.os.end = 0x84acdad8
images.os.load = 0x80008000, load_end = 0x82ad5a98

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
-

Then nothing show, it seems overlap happened.
But even I changed env loadaddr from 0x8200 to 0x8300, the
kernel still can't boot.

--
Booting from mmc0 ...
## Booting kernel from Legacy Image at 8300 ...
   Image Name:   Linux-2.6.39
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:44882584 Bytes = 42.8 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK
   kernel loaded at 0x80008000, end = 0x82ad5a98
images.os.start = 0x8300, images.os.end = 0x85acdad8
images.os.load = 0x80008000, load_end = 0x82ad5a98

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
--

Any ideas is welcome, thanks

-- 
Regards,
--Bob
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