Re: [U-Boot] [PATCH] board_f: fix noncached reservation calculation

[Vikas MANOCHA]

Hi Tom,

> -Original Message-
> From: Tom Rini 
> Sent: Wednesday, August 28, 2019 12:31 PM
> To: Vikas MANOCHA 
> Cc: Stephen Warren ; twar...@wwwdotorg.org;
> u-boot@lists.denx.de; Stephen Warren 
> Subject: Re: [PATCH] board_f: fix noncached reservation calculation
> 
> On Wed, Aug 28, 2019 at 07:22:36PM +, Vikas MANOCHA wrote:
> > Hi,
> >
> > > -Original Message-
> > > From: Stephen Warren 
> > > Sent: Tuesday, August 27, 2019 7:50 PM
> > > To: Vikas MANOCHA ; Tom Rini
> > > 
> > > Cc: twar...@wwwdotorg.org; u-boot@lists.denx.de; Stephen Warren
> > > 
> > > Subject: Re: [PATCH] board_f: fix noncached reservation calculation
> > >
> > > On 8/27/19 6:01 PM, Vikas MANOCHA wrote:
> > > > Stephen Warren wrote at Tuesday, August 27, 2019 3:50 PM
> > > >> On 8/27/19 4:10 PM, Vikas MANOCHA wrote:
> > > >>> Stephen Warren wrote at Tuesday, August 27, 2019 10:55 AM
> > > >>>> The current code in reserve_noncached() has two issues:
> > > >>>>
> > > >>>> 1) The first update of gd->start_addr_sp always rounds down to
> > > >>>> a section start. However, the equivalent calculation in
> > > >>>> cache.c:noncached_init() always first rounds up to a section
> > > >>>> start, then subtracts a section size.
> > > >>>> These two calculations differ if the initial value is already
> > > >>>> rounded to section alignment.
> > > >>>
> > > >>> It shouldn't cause any issue, first one round down to section size.
> > > >>> Second
> > > >>> one(cache.c: noncached_init()) rounds up, so needs section size
> > > >>> subtraction.
> > > >>
> > > >> Here's an example where it fails, based on code before my patch:
> > > >>
> > > >> Assume that MMU section size is 2, and that mem_malloc_start and
> > > >> gd->start_addr_sp are both 1000M on entry to the functions, and
> > > >> gd->the
> > > >> noncached region is 1 (what Jetson TX1 uses). The example uses
> > > >> values assumed to be multiples of 1M to make the numbers easier to
> read.
> > > >>
> > > >> noncached_init:
> > > >>
> > > >> // mem_malloc_start = 1000
> > > >> end = ALIGN(mem_malloc_start, MMU_SECTION_SIZE) -
> > > MMU_SECTION_SIZE;
> > > >> // end = 1000 - 2 = 998 // was already aligned, so 1000 not 1002
> > > >> size = ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
> > > >> MMU_SECTION_SIZE); // size = 2 start = end - size; // start = 998
> > > >> - 2 = 996 // region is 996...998
> > > >
> > > > Thanks for this example, it definitely seems a bug.  Just that we
> > > > are fixing it
> > > by adding this gap in the reserve_noncached() also.
> > > > Better would be to fix this subtraction of MMU_SECTION_SIZE by
> > > > aligning
> > > down "end" location, like:
> > > >
> > > > end = ALIGN_DOWN(mem_malloc_start, MMU_SECTION_SIZE); // end
> =
> > > 1000
> > > > size = ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
> MMU_SECTION_SIZE);
> > > // size =
> > > > 2 start = end -size; // start = 998
> > >
> > > That would change yet another piece of code that's been stable for a
> while.
> > > It's late in the U-Boot release cycle, so I think we should be
> > > conservative, and not change any more code than necessary. Changing
> > > lots of extra code would run the risk of introducing more
> > > regressions. I'd rather (a) apply the original change I posted,
> > > which adjusts only the code that caused the regression, or (b) revert the
> patch that caused the regression.
> >
> > Ok, Either way is fine.
> >
> > >
> > > If you want to adjust the code in noncached_init, we can do that
> > > immediately after the release, to give maximum time for any
> > > regressions to be debugged and fixed before the next release.
> >
> > Ok.
> 
> So this patch keeps your use case working and fixes Stephen's problem, to be
> clear?  Thanks guys!

Yes, that's correct.

Cheers,
Vikas

> 
> --
> Tom
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Re: [U-Boot] [PATCH] board_f: fix noncached reservation calculation

[Vikas MANOCHA]

Hi,

> -Original Message-
> From: Stephen Warren 
> Sent: Tuesday, August 27, 2019 7:50 PM
> To: Vikas MANOCHA ; Tom Rini
> 
> Cc: twar...@wwwdotorg.org; u-boot@lists.denx.de; Stephen Warren
> 
> Subject: Re: [PATCH] board_f: fix noncached reservation calculation
> 
> On 8/27/19 6:01 PM, Vikas MANOCHA wrote:
> > Stephen Warren wrote at Tuesday, August 27, 2019 3:50 PM
> >> On 8/27/19 4:10 PM, Vikas MANOCHA wrote:
> >>> Stephen Warren wrote at Tuesday, August 27, 2019 10:55 AM
> >>>> The current code in reserve_noncached() has two issues:
> >>>>
> >>>> 1) The first update of gd->start_addr_sp always rounds down to a
> >>>> section start. However, the equivalent calculation in
> >>>> cache.c:noncached_init() always first rounds up to a section start,
> >>>> then subtracts a section size.
> >>>> These two calculations differ if the initial value is already
> >>>> rounded to section alignment.
> >>>
> >>> It shouldn't cause any issue, first one round down to section size.
> >>> Second
> >>> one(cache.c: noncached_init()) rounds up, so needs section size
> >>> subtraction.
> >>
> >> Here's an example where it fails, based on code before my patch:
> >>
> >> Assume that MMU section size is 2, and that mem_malloc_start and
> >> gd->start_addr_sp are both 1000M on entry to the functions, and the
> >> noncached region is 1 (what Jetson TX1 uses). The example uses values
> >> assumed to be multiples of 1M to make the numbers easier to read.
> >>
> >> noncached_init:
> >>
> >> // mem_malloc_start = 1000
> >> end = ALIGN(mem_malloc_start, MMU_SECTION_SIZE) -
> MMU_SECTION_SIZE;
> >> // end = 1000 - 2 = 998 // was already aligned, so 1000 not 1002 size
> >> = ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
> >> MMU_SECTION_SIZE); // size = 2 start = end - size; // start = 998 - 2
> >> = 996 // region is 996...998
> >
> > Thanks for this example, it definitely seems a bug.  Just that we are 
> > fixing it
> by adding this gap in the reserve_noncached() also.
> > Better would be to fix this subtraction of MMU_SECTION_SIZE by aligning
> down "end" location, like:
> >
> > end = ALIGN_DOWN(mem_malloc_start, MMU_SECTION_SIZE); // end =
> 1000
> > size = ALIGN(CONFIG_SYS_NONCACHED_MEMORY, MMU_SECTION_SIZE);
> // size =
> > 2 start = end -size; // start = 998
> 
> That would change yet another piece of code that's been stable for a while.
> It's late in the U-Boot release cycle, so I think we should be conservative, 
> and
> not change any more code than necessary. Changing lots of extra code
> would run the risk of introducing more regressions. I'd rather (a) apply the
> original change I posted, which adjusts only the code that caused the
> regression, or (b) revert the patch that caused the regression.

Ok, Either way is fine.

> 
> If you want to adjust the code in noncached_init, we can do that
> immediately after the release, to give maximum time for any regressions to
> be debugged and fixed before the next release.

Ok.

Cheers,
Vikas


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Re: [U-Boot] [PATCH] board_f: fix noncached reservation calculation

[Vikas MANOCHA]

Hi Stephen,

> -Original Message-
> From: Stephen Warren 
> Sent: Tuesday, August 27, 2019 3:50 PM
> To: Vikas MANOCHA ; Tom Rini
> 
> Cc: twar...@wwwdotorg.org; u-boot@lists.denx.de; Stephen Warren
> 
> Subject: Re: [PATCH] board_f: fix noncached reservation calculation
> 
> On 8/27/19 4:10 PM, Vikas MANOCHA wrote:
> > Hi Stephen,
> >
> >> -Original Message-
> >> From: Stephen Warren 
> >> Sent: Tuesday, August 27, 2019 10:55 AM
> >> To: Tom Rini 
> >> Cc: twar...@wwwdotorg.org; u-boot@lists.denx.de; Stephen Warren
> >> ; Vikas MANOCHA 
> >> Subject: [PATCH] board_f: fix noncached reservation calculation
> >>
> >> From: Stephen Warren 
> >>
> >> The current code in reserve_noncached() has two issues:
> >>
> >> 1) The first update of gd->start_addr_sp always rounds down to a
> >> section start. However, the equivalent calculation in
> >> cache.c:noncached_init() always first rounds up to a section start, then
> subtracts a section size.
> >> These two calculations differ if the initial value is already rounded
> >> to section alignment.
> >
> > It shouldn't cause any issue, first one round down to section size.
> > Second
> > one(cache.c: noncached_init()) rounds up, so needs section size
> subtraction.
> 
> Here's an example where it fails, based on code before my patch:
> 
> Assume that MMU section size is 2, and that mem_malloc_start and
> gd->start_addr_sp are both 1000M on entry to the functions, and the
> noncached region is 1 (what Jetson TX1 uses). The example uses values
> assumed to be multiples of 1M to make the numbers easier to read.
> 
> noncached_init:
> 
> // mem_malloc_start = 1000
> end = ALIGN(mem_malloc_start, MMU_SECTION_SIZE) -
> MMU_SECTION_SIZE; // end = 1000 - 2 = 998 // was already aligned, so 1000
> not 1002 size = ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
> MMU_SECTION_SIZE); // size = 2 start = end - size; // start = 998 - 2 = 996 //
> region is 996...998

Thanks for this example, it definitely seems a bug.  Just that we are fixing it 
by adding this gap in the reserve_noncached() also.
Better would be to fix this subtraction of MMU_SECTION_SIZE by aligning down 
"end" location, like:

end = ALIGN_DOWN(mem_malloc_start, MMU_SECTION_SIZE); // end = 1000
size = ALIGN(CONFIG_SYS_NONCACHED_MEMORY, MMU_SECTION_SIZE); // size = 2
start = end -size; // start = 998

> 
> reserve_noncached:
> 
> // gd->start_addr_sp = 1000
> gd->start_addr_sp &= ~(MMU_SECTION_SIZE - 1);
> // gd->start_addr_sp = 1000
> gd->start_addr_sp -= CONFIG_SYS_NONCACHED_MEMORY;

Here CONFIG_SYS_NONCACHED_MEMORY needs to be aligned to MMU SECTION SIZE before 
subtracting from start_addr_sp to fix the second issue you highlighted.

gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY, MMU_SECTION_SIZE);  // 
start of non cached = 998.

> // gd->start_addr_sp = 1000 - 1 = 999
> // region is 999...1000

> 
> So, the end of the region that's been reserved is 1000, yet the code that sets
> up the noncached region believes the end of the region is at 998. Even
> ignoring the difference in size calculation due to issue (2) below, that still
> means the reservation is in the wrong place, and the stack can end up
> overlaid with the noncached reservation, or even other data below it.
> 
> >> 2) The second update of gd->start_addr_sp subtracts exactly
> >> CONFIG_SYS_NONCACHED_MEMORY, whereas the equivalent
> calculation in
> >> cache.c:noncached_init() rounds the noncached size up to section
> >> alignment before subtracting it. The two calculations differ if the
> >> noncached region size is not a multiple of the MMU section size.
> >
> > Never thought CONFIG_SYS_NON_CACACHED_MEMORY could be non-
> multiple of
> > MMU section size for basic MMU setup in u-boot. It has granularity of
> section size.
> > Is it the case with Jetson TX1 ?
> 
> Yes, on Jetson TX1, the MMU section size is 2M, yet the noncached region is
> 1M. Nothing in the README docs for the nocached region state or imply that
> the noncached region needs to be a multiple of the MMU section size,

MMU setup granularity is section size, configuring any memory area less than 
section size is not possible in this basic mmu setup. Your patch rounds up this
noncached area to SECTION area which makes it robust.

> and
> all code that uses the config symbol before your patch rounds the config
> symbol to MMU section size, implying that its value doens't need to be
> rounded already.

It was using stack area well below the stack pointer, so was working fine. The 
patch
just didn’t take care of the cas

Re: [U-Boot] [PATCH] board_f: fix noncached reservation calculation

[Vikas MANOCHA]

Hi Stephen,

> -Original Message-
> From: Stephen Warren 
> Sent: Tuesday, August 27, 2019 10:55 AM
> To: Tom Rini 
> Cc: twar...@wwwdotorg.org; u-boot@lists.denx.de; Stephen Warren
> ; Vikas MANOCHA 
> Subject: [PATCH] board_f: fix noncached reservation calculation
> 
> From: Stephen Warren 
> 
> The current code in reserve_noncached() has two issues:
> 
> 1) The first update of gd->start_addr_sp always rounds down to a section
> start. However, the equivalent calculation in cache.c:noncached_init()
> always first rounds up to a section start, then subtracts a section size.
> These two calculations differ if the initial value is already rounded to 
> section
> alignment.

It shouldn't cause any issue, first one round down to section size. Second 
one(cache.c: noncached_init()) rounds up, so needs section size subtraction.

> 
> 2) The second update of gd->start_addr_sp subtracts exactly
> CONFIG_SYS_NONCACHED_MEMORY, whereas the equivalent calculation in
> cache.c:noncached_init() rounds the noncached size up to section alignment
> before subtracting it. The two calculations differ if the noncached region 
> size
> is not a multiple of the MMU section size.

Never thought CONFIG_SYS_NON_CACACHED_MEMORY could be non-multiple of MMU 
section size for basic MMU setup in u-boot. It has granularity of section size.
Is it the case with Jetson TX1 ?

> 
> In practice, one/both of those issues causes a practical problem on Jetson
> TX1; U-Boot triggers a synchronous abort during initialization, likely due to
> overlapping use of some memory region.
> 
> This change fixes both these issues by duplicating the exact calculations from
> noncached_init() into reserve_noncached().
> 
> However, this fix assumes that gd->start_addr_sp on entry to
> reserve_noncached() exactly matches mem_malloc_start on entry to
> noncached_init(). I haven't traced the code to see whether it absolutely
> guarantees this in all (or indeed any!) cases. Consequently, I added some
> comments in the hope that this condition will continue to be true.

It is enforced it in the code, reserve_noncached is called from 
reserve_malloc() after malloc area reservation.

> 
> Fixes: 5f7adb5b1c02 ("board_f: reserve noncached space below malloc
> area")
> Cc: Vikas Manocha 
> Signed-off-by: Stephen Warren 
> ---
>  arch/arm/lib/cache.c |  1 +
>  common/board_f.c | 15 ---
>  common/board_r.c |  4 
>  3 files changed, 17 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index
> 449544d11cff..463d283cb768 100644
> --- a/arch/arm/lib/cache.c
> +++ b/arch/arm/lib/cache.c
> @@ -77,6 +77,7 @@ void noncached_init(void)
>   phys_addr_t start, end;
>   size_t size;
> 
> + /* If this calculation changes, update board_f.c:reserve_noncached()
> +*/
>   end = ALIGN(mem_malloc_start, MMU_SECTION_SIZE) -
> MMU_SECTION_SIZE;
>   size = ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
> MMU_SECTION_SIZE);
>   start = end - size;
> diff --git a/common/board_f.c b/common/board_f.c index
> 6867abc8e679..591f18f391e2 100644
> --- a/common/board_f.c
> +++ b/common/board_f.c
> @@ -470,9 +470,18 @@ static int reserve_uboot(void)  #ifdef
> CONFIG_SYS_NONCACHED_MEMORY  static int reserve_noncached(void)  {
> - /* round down to SECTION SIZE (typicaly 1MB) limit */
> - gd->start_addr_sp &= ~(MMU_SECTION_SIZE - 1);
> - gd->start_addr_sp -= CONFIG_SYS_NONCACHED_MEMORY;
> + /*
> +  * The value of gd->start_addr_sp must match the value of
> malloc_start
> +  * calculated in boatrd_f.c:initr_malloc(), which is passed to
> +  * board_r.c:mem_malloc_init() and then used by
> +  * cache.c:noncached_init()
> +  *
> +  * These calculations must match the code in
> cache.c:noncached_init()
> +  */
> + gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE)
> -
> + MMU_SECTION_SIZE;
> + gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
> +MMU_SECTION_SIZE);
>   debug("Reserving %dM for noncached_alloc() at: %08lx\n",
> CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
> 
> diff --git a/common/board_r.c b/common/board_r.c index
> b7f68bba4a7e..d6fb5047a265 100644
> --- a/common/board_r.c
> +++ b/common/board_r.c
> @@ -247,6 +247,10 @@ static int initr_malloc(void)
> gd->malloc_ptr / 1024);
>  #endif
>   /* The malloc area is immediately below the monitor copy in DRAM
> */
> + /*
> +  * This value MUST match the value of gd->start_addr_sp in
> board_f.c:
> +  * reserve_non

[U-Boot] [PATCH v2] board_f: reserve noncached space below malloc area

[Vikas Manocha]

Noncached area at present is being initialized to random space after malloc
area. It works in most the cases as it goes to stack area & stack is not
overwriting it being far from it.

Signed-off-by: Vikas Manocha 
---
Changes in v2: added blank line before return

 common/board_f.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/common/board_f.c b/common/board_f.c
index 59745d5..58529d2 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -439,12 +439,29 @@ static int reserve_uboot(void)
return 0;
 }
 
+#ifdef CONFIG_SYS_NONCACHED_MEMORY
+static int reserve_noncached(void)
+{
+   /* round down to SECTION SIZE (typicaly 1MB) limit */
+   gd->start_addr_sp &= ~(MMU_SECTION_SIZE - 1);
+   gd->start_addr_sp -= CONFIG_SYS_NONCACHED_MEMORY;
+   debug("Reserving %dM for noncached_alloc() at: %08lx\n",
+ CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
+
+   return 0;
+}
+#endif
+
 /* reserve memory for malloc() area */
 static int reserve_malloc(void)
 {
gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
debug("Reserving %dk for malloc() at: %08lx\n",
  TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
+#ifdef CONFIG_SYS_NONCACHED_MEMORY
+   reserve_noncached();
+#endif
+
return 0;
 }
 
-- 
2.7.4

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Re: [U-Boot] [PATCH] board_f: reserve noncached space below malloc area

[Vikas MANOCHA]

Hi Simon,

> -Original Message-
> From: Simon Glass 
> Sent: Friday, August 9, 2019 10:00 AM
> To: Vikas MANOCHA 
> Cc: U-Boot Mailing List ; Bin Meng
> ; CITOOLS  revi...@lists.codex.cro.st.com>; Mario Six ; Patrick
> DELAUNAY 
> Subject: Re: [PATCH] board_f: reserve noncached space below malloc area
> 
> Hi Vikas,
> 
> On Thu, 8 Aug 2019 at 18:24, Vikas Manocha 
> wrote:
> >
> > Noncached area at present is being initialized to random space after
> > malloc area. It works in most the cases as it goes to stack area &
> > stack is not overwriting it being far from it.
> 
> Please can you add a motivation for this patch and what it does.

We are not reserving non-cached memory area (like for malloc, gd etc before 
relocation). 
With this patch we are reserving area just below memory area allocated to 
dynamic allocation.

> 
> >
> > Signed-off-by: Vikas Manocha 
> > ---
> >  common/board_f.c | 13 +
> >  1 file changed, 13 insertions(+)
> >
> > diff --git a/common/board_f.c b/common/board_f.c index
> > 59745d5..4910051 100644
> > --- a/common/board_f.c
> > +++ b/common/board_f.c
> > @@ -439,12 +439,25 @@ static int reserve_uboot(void)
> > return 0;
> >  }
> >
> > +#ifdef CONFIG_SYS_NONCACHED_MEMORY
> > +static int reserve_noncached(void)
> > +{
> > +   /* round down to SECTION SIZE (typicaly 1MB) limit */
> > +   gd->start_addr_sp &= ~(MMU_SECTION_SIZE - 1);
> > +   gd->start_addr_sp -= CONFIG_SYS_NONCACHED_MEMORY;
> 
> blank line before return.

Sure, I will add it in v2.

> > +   return 0;
> > +}
> > +#endif
> > +
> >  /* reserve memory for malloc() area */  static int
> > reserve_malloc(void)  {
> > gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
> > debug("Reserving %dk for malloc() at: %08lx\n",
> >   TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
> > +#ifdef CONFIG_SYS_NONCACHED_MEMORY
> > +   reserve_noncached(void);
> > +#endif
> 
> How about a new function for this (with the #ifndef inside it), and a debug()?

That is what I did first but this (non cached) memory area being tied to just 
below malloc, having it here enforces this contiguity.

> 
> Also I see noncached_init() calculates the size which seems brittle.
> Should it be added to gd?

Good point, creating new entry/ies in gd for it would make it bit cleaner but 
useless after initialization.
Static variables are used for this non cached memory init & allocation. It is 
just like for malloc, we don’t have entry in gd for it & I
think the reason is same.

Cheers,
Vikas

> 
> > return 0;
> >  }
> >
> > --
> > 2.7.4
> >
> 
> Regards,
> Simon
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[U-Boot] [PATCH] board_f: reserve noncached space below malloc area

[Vikas Manocha]

Noncached area at present is being initialized to random space after malloc
area. It works in most the cases as it goes to stack area & stack is not
overwriting it being far from it.

Signed-off-by: Vikas Manocha 
---
 common/board_f.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/common/board_f.c b/common/board_f.c
index 59745d5..4910051 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -439,12 +439,25 @@ static int reserve_uboot(void)
return 0;
 }
 
+#ifdef CONFIG_SYS_NONCACHED_MEMORY
+static int reserve_noncached(void)
+{
+   /* round down to SECTION SIZE (typicaly 1MB) limit */
+   gd->start_addr_sp &= ~(MMU_SECTION_SIZE - 1);
+   gd->start_addr_sp -= CONFIG_SYS_NONCACHED_MEMORY;
+   return 0;
+}
+#endif
+
 /* reserve memory for malloc() area */
 static int reserve_malloc(void)
 {
gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
debug("Reserving %dk for malloc() at: %08lx\n",
  TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
+#ifdef CONFIG_SYS_NONCACHED_MEMORY
+   reserve_noncached(void);
+#endif
return 0;
 }
 
-- 
2.7.4

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[U-Boot] [PATCH] arm: armv7m: clean up armv7m unified code compilation

[Vikas Manocha]

unified syntax should be selected by config ARM_ASM_UNIFIED

Signed-off-by: Vikas Manocha 
---
 arch/arm/include/asm/armv7m.h | 5 -
 arch/arm/lib/crt0.S   | 4 +---
 arch/arm/lib/relocate.S   | 1 +
 arch/arm/lib/vectors_m.S  | 2 +-
 4 files changed, 3 insertions(+), 9 deletions(-)

diff --git a/arch/arm/include/asm/armv7m.h b/arch/arm/include/asm/armv7m.h
index 278f302..ad67b4f 100644
--- a/arch/arm/include/asm/armv7m.h
+++ b/arch/arm/include/asm/armv7m.h
@@ -10,11 +10,6 @@
 #ifndef ARMV7M_H
 #define ARMV7M_H
 
-#if defined(__ASSEMBLY__)
-.syntax unified
-.thumb
-#endif
-
 /* armv7m fixed base addresses */
 #define V7M_SCS_BASE   0xE000E000
 #define V7M_NVIC_BASE  (V7M_SCS_BASE + 0x0100)
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index d7ff9f0..fe312db 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -8,9 +8,7 @@
 #include 
 #include 
 #include 
-#ifdef CONFIG_CPU_V7M
-#include 
-#endif
+#include 
 
 /*
  * This file handles the target-independent stages of the U-Boot
diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S
index c5b135d..e5f7267 100644
--- a/arch/arm/lib/relocate.S
+++ b/arch/arm/lib/relocate.S
@@ -6,6 +6,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/arm/lib/vectors_m.S b/arch/arm/lib/vectors_m.S
index d75e477..7d2d55c 100644
--- a/arch/arm/lib/vectors_m.S
+++ b/arch/arm/lib/vectors_m.S
@@ -5,7 +5,7 @@
  */
 
 #include 
-#include 
+#include 
 #include 
 
 .type __hard_fault_entry, %function
-- 
2.7.4

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[U-Boot] [PATCH] arm: armv7m: remove un-necessary If then instruction

[Vikas Manocha]

With gas option -mimplicit-it=always, IT block is inserted by the assembler
for thumb2.

Signed-off-by: Vikas Manocha 
---
 arch/arm/lib/crt0.S | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 0decce2..d7ff9f0 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -139,9 +139,6 @@ here:
mov r2, #0x /* prepare zero to clear BSS */
 
 clbss_l:cmpr0, r1  /* while not at end of BSS */
-#if defined(CONFIG_CPU_V7M)
-   itt lo
-#endif
strlo   r2, [r0]/* clear 32-bit BSS word */
addlo   r0, r0, #4  /* move to next */
blo clbss_l
-- 
2.7.4

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[U-Boot] [PATCH] arm: stm32: Remove redundant thumb build selection

[Vikas Manocha]

All armv7m arch builds are thumb & SYS_THUMB_BUILD is already selected by
CPU_ARMV7M.

Signed-off-by: Vikas Manocha 
---
 arch/arm/Kconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8a23c76..b711605 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1266,7 +1266,6 @@ config STM32
select CPU_V7M
select DM
select DM_SERIAL
-   select SYS_THUMB_BUILD
imply CMD_DM
 
 config ARCH_STI
-- 
2.7.4

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Re: [U-Boot] [PATCH] stm32f7: board: Fix memory init

[Vikas Manocha]

Hi Patrice,

On 08/02/2018 05:18 AM, Patrice Chotard wrote:
> Commit 1473b12ad0b3 ("lib: fdtdec: Update ram_base to store ram start
> adddress") brings regression on STM32F7 which can't boot.
> 
> Use fdtdec_setup_mem_size_base() to setup memory base and size.
> Use fdtdec_setup_memory_banksize() to setup memory bank base and size.
> 
> Reported-by: Mark Olsson 
> Signed-off-by: Patrice Chotard 
> Cc: Mark Olsson 

Reviewed-by: Vikas Manocha 
one minor comment below.

> ---
> 
>  board/st/stm32f746-disco/stm32f746-disco.c | 31 
> --
>  1 file changed, 4 insertions(+), 27 deletions(-)
> 
> diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
> b/board/st/stm32f746-disco/stm32f746-disco.c
> index e21cfc6e4955..a997e1825abf 100644
> --- a/board/st/stm32f746-disco/stm32f746-disco.c
> +++ b/board/st/stm32f746-disco/stm32f746-disco.c
> @@ -21,23 +21,9 @@
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> -int get_memory_base_size(fdt_addr_t *mr_base, fdt_addr_t *mr_size)
> -{
> - int mr_node;
> -
> - mr_node = fdt_path_offset(gd->fdt_blob, "/memory");
> - if (mr_node < 0)
> - return mr_node;
> - *mr_base = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, mr_node,
> -   "reg", 0, mr_size, false);
> - debug("mr_base = %lx, mr_size= %lx\n", *mr_base, *mr_size);
> -
> - return 0;
> -}
>  int dram_init(void)
>  {
> - int rv;
> - fdt_addr_t mr_base, mr_size;
> + int rv = 0;
this variable can be removed by returning 0 or error directly.

Cheers,
Vikas

>  
>  #ifndef CONFIG_SUPPORT_SPL
>   struct udevice *dev;
> @@ -48,24 +34,15 @@ int dram_init(void)
>   }
>  
>  #endif
> - rv = get_memory_base_size(_base, _size);
> - if (rv)
> - return rv;
> - gd->ram_size = mr_size;
> - gd->ram_top = mr_base;
> + if (fdtdec_setup_mem_size_base() != 0)
> + rv = -EINVAL;
>  
>   return rv;
>  }
>  
>  int dram_init_banksize(void)
>  {
> - fdt_addr_t mr_base, mr_size;
> - get_memory_base_size(_base, _size);
> - /*
> -  * Fill in global info with description of SRAM configuration
> -  */
> - gd->bd->bi_dram[0].start = mr_base;
> - gd->bd->bi_dram[0].size  = mr_size;
> + fdtdec_setup_memory_banksize();
>  
>   return 0;
>  }
> 
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Re: [U-Boot] [PATCH 1/6] stm32mp1: clk: define RCC_PLLNCFGR2_SHIFT macro

[Vikas Manocha]

Hi,

On 07/16/2018 01:41 AM, Patrick Delaunay wrote:
> This patch define RCC_PLLNCFGR2_SHIFT to reuse it in
> the pll function for set rate.
> 
> Signed-off-by: Patrick Delaunay 

Reviewed-by: Vikas Manocha 

Cheers,
Vikas

> ---
> 
>  drivers/clk/clk_stm32mp1.c | 15 ++-
>  1 file changed, 6 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
> index 3f00c198..5177758 100644
> --- a/drivers/clk/clk_stm32mp1.c
> +++ b/drivers/clk/clk_stm32mp1.c
> @@ -175,13 +175,14 @@
>  #define RCC_PLLNCFGR1_IFRGE_SHIFT24
>  #define RCC_PLLNCFGR1_IFRGE_MASK GENMASK(25, 24)
>  
> -/* used for ALL PLLNCFGR2 registers */
> +/* used for ALL PLLNCFGR2 registers , using stm32mp1_div_id */
> +#define RCC_PLLNCFGR2_SHIFT(div_id)  ((div_id) * 8)
>  #define RCC_PLLNCFGR2_DIVX_MASK  GENMASK(6, 0)
> -#define RCC_PLLNCFGR2_DIVP_SHIFT 0
> +#define RCC_PLLNCFGR2_DIVP_SHIFT RCC_PLLNCFGR2_SHIFT(_DIV_P)
>  #define RCC_PLLNCFGR2_DIVP_MASK  GENMASK(6, 0)
> -#define RCC_PLLNCFGR2_DIVQ_SHIFT 8
> +#define RCC_PLLNCFGR2_DIVQ_SHIFT RCC_PLLNCFGR2_SHIFT(_DIV_Q)
>  #define RCC_PLLNCFGR2_DIVQ_MASK  GENMASK(14, 8)
> -#define RCC_PLLNCFGR2_DIVR_SHIFT 16
> +#define RCC_PLLNCFGR2_DIVR_SHIFT RCC_PLLNCFGR2_SHIFT(_DIV_R)
>  #define RCC_PLLNCFGR2_DIVR_MASK  GENMASK(22, 16)
>  
>  /* used for ALL PLLNFRACR registers */
> @@ -814,10 +815,6 @@ static ulong stm32mp1_read_pll_freq(struct 
> stm32mp1_clk_priv *priv,
>   int divm, divn, divy, src;
>   ulong refclk, dfout;
>   u32 selr, cfgr1, cfgr2, fracr;
> - const u8 shift[_DIV_NB] = {
> - [_DIV_P] = RCC_PLLNCFGR2_DIVP_SHIFT,
> - [_DIV_Q] = RCC_PLLNCFGR2_DIVQ_SHIFT,
> - [_DIV_R] = RCC_PLLNCFGR2_DIVR_SHIFT };
>  
>   debug("%s(%d, %d)\n", __func__, pll_id, div_id);
>   if (div_id > _DIV_NB)
> @@ -833,7 +830,7 @@ static ulong stm32mp1_read_pll_freq(struct 
> stm32mp1_clk_priv *priv,
>  
>   divm = (cfgr1 & (RCC_PLLNCFGR1_DIVM_MASK)) >> RCC_PLLNCFGR1_DIVM_SHIFT;
>   divn = cfgr1 & RCC_PLLNCFGR1_DIVN_MASK;
> - divy = (cfgr2 >> shift[div_id]) & RCC_PLLNCFGR2_DIVX_MASK;
> + divy = (cfgr2 >> RCC_PLLNCFGR2_SHIFT(div_id)) & RCC_PLLNCFGR2_DIVX_MASK;
>  
>   debug("DIVN=%d DIVM=%d DIVY=%d\n", divn, divm, divy);
>  
> 
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Re: [U-Boot] [PATCH] serial: Remove duplicated line in Makefile

[Vikas Manocha]

Hi,

On 04/16/2018 01:35 AM, Patrice Chotard wrote:
> The line "-obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o"
> is found twice in Makefile.
> 
> Fixes: ae74de0dfd45 ("serial: stm32: Rename serial_stm32x7.c to 
> serial_stm32.c"
> 
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>

Acked-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> ---
> 
>  drivers/serial/Makefile | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> index 6937ef962868..16609edf4b5a 100644
> --- a/drivers/serial/Makefile
> +++ b/drivers/serial/Makefile
> @@ -60,7 +60,6 @@ obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
>  obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
>  obj-$(CONFIG_STI_ASC_SERIAL) += serial_sti_asc.o
>  obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
> -obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
>  obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
>  obj-$(CONFIG_BCM283X_PL011_SERIAL) += serial_bcm283x_pl011.o
>  obj-$(CONFIG_MSM_SERIAL) += serial_msm.o
> 
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Re: [U-Boot] [PATCH v2 00/10] splash screen on the stm32f769 disco board

[Vikas Manocha]

Thanks Patrice,

On 03/12/2018 10:09 AM, Patrice CHOTARD wrote:
> Hi Vikas
> 
> On 03/06/2018 08:44 PM, Vikas Manocha wrote:
>> Hi Patrice/Yannick,
>>
>> On 03/05/2018 11:50 PM, Patrice CHOTARD wrote:
>>>> There seems to be a dependency on patch for 
>>>> include/dt-bindings/mfd/stm32f7-rcc.h
>>>> adding some new macros. Is it also submitted to the list?
>>> Right, needed patches are already on the list
>>> http://patchwork.ozlabs.org/patch/870938/
>>
>> Great addition !
>>
>> Few points:
>> it seems above mentioned patchset also has dependency on another patchset 
>> http://patchwork.ozlabs.org/patch/870283/
>> After applying these two dependency patchsets, it creates conflicts with 
>> pathch "ARM: dts: stm32: Add timer support for STM32F7".
>> I understand you want to get it reviewed without waiting for other patchset 
>> acceptance, it would be good to mention all the dependencies.
>>
>> Also i observe that without applying f769 display patches, f746 display 
>> didn't work.
>> And F769 board display is not working, i see one error log:
>>
>> Board 1:
>> stm32_ltdc_probe: decode display timing error -4
>> & Board 2:
>> stm32_ltdc_probe: decode display timing error -668998023
>>
>> Cheers,
>> Vikas
>>
>>>
>>> Patrice
>>>
> 
> 
> We got a look at this issue with Yannick.
> 
> On my side, i got this problem because i used the 
> stm32f746-disco_defconfig by updating CONFIG_DEFAULT_DEVICE_TREE with 
> the following update, (and i suppose you do the same ;-) ):
> 
> CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco"
> 
> By using the stm32f769-disco_defconfig, everything is working fine.
> That's why Yannick added a dedicated defconfig file for STM32F769.

oh, i was also passing DEVICE_TREE during compilation.
With the stm32f769 config, it still stops after DRAM size.

"
U-Boot SPL 2018.03-rc4-00055-g0d3c012-dirty (Mar 12 2018 - 11:31:20 -0700)
Trying to boot from XIP

U-Boot 2018.03-rc4-00055-g0d3c012-dirty (Mar 12 2018 - 11:31:20 -0700)

Model: STMicroelectronics STM32F769-DISCO board
DRAM:  16 MiB

"

But I don't want to hold on for the series.

Acked-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> 
> Patrice
> 
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Re: [U-Boot] [PATCH v2 00/10] splash screen on the stm32f769 disco board

[Vikas Manocha]

Hi Patrice/Yannick,

On 03/05/2018 11:50 PM, Patrice CHOTARD wrote:
>> There seems to be a dependency on patch for 
>> include/dt-bindings/mfd/stm32f7-rcc.h
>> adding some new macros. Is it also submitted to the list?
> Right, needed patches are already on the list 
> http://patchwork.ozlabs.org/patch/870938/

Great addition !

Few points:
it seems above mentioned patchset also has dependency on another patchset 
http://patchwork.ozlabs.org/patch/870283/
After applying these two dependency patchsets, it creates conflicts with pathch 
"ARM: dts: stm32: Add timer support for STM32F7".
I understand you want to get it reviewed without waiting for other patchset 
acceptance, it would be good to mention all the dependencies.

Also i observe that without applying f769 display patches, f746 display didn't 
work.
And F769 board display is not working, i see one error log: 

Board 1:
stm32_ltdc_probe: decode display timing error -4
& Board 2:
stm32_ltdc_probe: decode display timing error -668998023

Cheers,
Vikas

> 
> Patrice
> 
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Re: [U-Boot] [PATCH 00/16] arm: stm32mp1: add initial support for STM32MP157

[Vikas Manocha]

Hi Patrick,

On 03/05/2018 06:24 AM, Patrick Delaunay wrote:
> 
> This patch-set adds initial support of STMicroelectronics STM32MP157
> microprocessor (MPU)
> - add new arm arch stm32mp1 (based on armv7)
> - support for stm32mp157 SOC (based on Cortex-A7)
> - add minimal support for board evaluation board STM32MP157C-ED1
I see patches for ram driver, armv7 generic, stm32f7  etc. in this patchset.
Please split the stuff other than STM32MP1 support in separate patch/patchset.

Cheers,
Vikas

> 
> 
> Patrick Delaunay (16):
>   tools/mkimage: add support for STM32 image format
>   spl: add SPL_RESET_SUPPORT
>   common: add a prototype for mach_cpu_init()
>   arm: armv7: solve issue for timer_rate_hz in arch timer
>   dm: gpio: Convert stm32f7 driver to livetree
>   gpio: stm32f7_gpio: handle node ngpios
>   stm32mp: stm32f7_i2c: use calloc instead of kmalloc
>   arm: stm32: add new architecture for STM32MP family
>   ram: stm32mp1: add driver
>   pmic: add stpmu1 support
>   pinctrl: stm32: update pincontrol for stmp32mp157
>   reset: stm32: adapt driver for stm32mp1
>   clk: add driver for stm32mp1
>   clk: stm32mp1: add clock tree initialization
>   dts: add device tree for STM32MP157C-ED1 board
>   board: st: add generic board for STM32MP1 family
> 
>  MAINTAINERS|7 +
>  arch/arm/Kconfig   |   25 +-
>  arch/arm/Makefile  |1 +
>  arch/arm/cpu/armv7/arch_timer.c|   22 +-
>  arch/arm/dts/Makefile  |3 +
>  arch/arm/dts/stm32mp15-ddr.dtsi|  155 ++
>  arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi   |  122 ++
>  arch/arm/dts/stm32mp157-u-boot.dtsi|  134 ++
>  arch/arm/dts/stm32mp157.dtsi   |  303 
>  arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi   |  133 ++
>  arch/arm/dts/stm32mp157c-ed1.dts   |  167 ++
>  arch/arm/mach-stm32mp/Kconfig  |   43 +
>  arch/arm/mach-stm32mp/Makefile |   10 +
>  arch/arm/mach-stm32mp/config.mk|   14 +
>  arch/arm/mach-stm32mp/cpu.c|  139 ++
>  arch/arm/mach-stm32mp/dram_init.c  |   34 +
>  arch/arm/mach-stm32mp/include/mach/ddr.h   |   12 +
>  arch/arm/mach-stm32mp/include/mach/gpio.h  |  115 ++
>  arch/arm/mach-stm32mp/include/mach/stm32.h |   27 +
>  arch/arm/mach-stm32mp/spl.c|   60 +
>  board/st/stm32mp1/Kconfig  |   12 +
>  board/st/stm32mp1/MAINTAINERS  |7 +
>  board/st/stm32mp1/Makefile |   13 +
>  board/st/stm32mp1/README   |  191 +++
>  board/st/stm32mp1/board.c  |   75 +
>  board/st/stm32mp1/spl.c|   33 +
>  board/st/stm32mp1/stm32mp1.c   |   27 +
>  common/image.c |1 +
>  common/spl/Kconfig |9 +
>  configs/stm32mp15_basic_defconfig  |   36 +
>  doc/device-tree-bindings/clock/st,stm32mp1.txt |  226 +++
>  doc/device-tree-bindings/ram/st,stm32mp1-ddr.txt   |  299 
>  drivers/Makefile   |1 +
>  drivers/clk/Kconfig|8 +
>  drivers/clk/Makefile   |1 +
>  drivers/clk/clk_stm32mp1.c | 1733 
> 
>  drivers/gpio/Kconfig   |2 +-
>  drivers/gpio/stm32f7_gpio.c|   15 +-
>  drivers/i2c/Kconfig|2 +-
>  drivers/i2c/stm32f7_i2c.c  |4 +-
>  drivers/pinctrl/pinctrl_stm32.c|9 +-
>  drivers/power/pmic/Kconfig |8 +
>  drivers/power/pmic/Makefile|1 +
>  drivers/power/pmic/stpmu1.c|   62 +
>  drivers/ram/Kconfig|2 +
>  drivers/ram/Makefile   |1 +
>  drivers/ram/stm32mp1/Kconfig   |   12 +
>  drivers/ram/stm32mp1/Makefile  |8 +
>  drivers/ram/stm32mp1/stm32mp1_ddr.c|  496 ++
>  drivers/ram/stm32mp1/stm32mp1_ddr.h|  210 +++
>  drivers/ram/stm32mp1/stm32mp1_ddr_regs.h   |  365 +
>  drivers/ram/stm32mp1/stm32mp1_ram.c|  197 +++
>  drivers/reset/Kconfig  |2 +-
>  drivers/reset/stm32-reset.c|   36 +-
>  drivers/serial/Kconfig |6 +-
>  include/common.h   |   10 +
>  include/configs/stm32mp1.h |   97 ++
>  include/dt-bindings/clock/stm32mp1-clks.h  |  243 +++
>  

Re: [U-Boot] [PATCH] mach-stm32: Use default memory map as background region

[Vikas Manocha]

Hi Patrice,

On 02/28/2018 08:15 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard 
> 
> On linux kernel side, on STM32F7 and STM32H7 SoCs, DMA requires
> uncachable regions. These regions are defined in DT.
> Since kernel linux v4.15, on ARMv7-M Cortex, kernel is able
> to configure MPU regions depending on DT settings.
> 
> As kernel is able to configure MPU, this allows to remove
> MPU region settings in bootloader.

I am not sure default configuration is same of all cortex-M variants which 
might lead to referring to different docs.
Regardless, It is good idea to configure MPU here instead of depending on 
default config, here code is making the picture clear.

Cheers,
Vikas

> 
> On Cortex M processors, MPU allows to use a default memory map.
> (see B3.5.4 MPU Control Register, MPU_CTRL in
> https://developer.arm.com/products/architecture/m-profile/docs/ddi0403/latest/armv7-m-architecture-reference-manual)
> Use the default memory map as background region for all STM32 SoCs
> family with an additional MPU region corresponding to the SDRAM area.
> 
> Signed-off-by: Patrice Chotard 
> ---
>  arch/arm/cpu/armv7m/mpu.c | 11 ++-
>  arch/arm/mach-stm32/soc.c | 36 +++-
>  2 files changed, 17 insertions(+), 30 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7m/mpu.c b/arch/arm/cpu/armv7m/mpu.c
> index 8e92a33fd4dd..e4d090e5de48 100644
> --- a/arch/arm/cpu/armv7m/mpu.c
> +++ b/arch/arm/cpu/armv7m/mpu.c
> @@ -10,12 +10,13 @@
>  #include 
>  #include 
>  
> -#define V7M_MPU_CTRL_ENABLE  (1 << 0)
> +#define V7M_MPU_CTRL_ENABLE  BIT(0)
>  #define V7M_MPU_CTRL_DISABLE (0 << 0)
> -#define V7M_MPU_CTRL_HFNMIENA(1 << 1)
> -#define VALID_REGION (1 << 4)
> +#define V7M_MPU_CTRL_HFNMIENABIT(1)
> +#define V7M_MPU_CTRL_PRIVDEFENA  BIT(2)
> +#define VALID_REGION BIT(4)
>  
> -#define ENABLE_REGION(1 << 0)
> +#define ENABLE_REGIONBIT(0)
>  
>  #define AP_SHIFT 24
>  #define XN_SHIFT 28
> @@ -36,7 +37,7 @@ void disable_mpu(void)
>  
>  void enable_mpu(void)
>  {
> - writel(V7M_MPU_CTRL_ENABLE | V7M_MPU_CTRL_HFNMIENA, _MPU->ctrl);
> + writel(V7M_MPU_CTRL_ENABLE | V7M_MPU_CTRL_PRIVDEFENA, _MPU->ctrl);
>  
>   /* Make sure new mpu config is effective for next memory access */
>   dsb();
> diff --git a/arch/arm/mach-stm32/soc.c b/arch/arm/mach-stm32/soc.c
> index df20d547c500..f6fd0b2e23c6 100644
> --- a/arch/arm/mach-stm32/soc.c
> +++ b/arch/arm/mach-stm32/soc.c
> @@ -15,35 +15,21 @@ int arch_cpu_init(void)
>  
>   struct mpu_region_config stm32_region_config[] = {
>   /*
> -  * Make all 4GB cacheable & executable. We are overriding it
> -  * with next region for any requirement. e.g. below region1,
> -  * 2 etc.
> -  * In other words, the area not coming in following
> -  * regions configuration is the one configured here in region_0
> -  * (cacheable & executable).
> +  * Make SDRAM area cacheable & executable.
>*/
> +#if defined(CONFIG_STM32F4)
>   { 0x, REGION_0, XN_DIS, PRIV_RW_USR_RW,
> - O_I_WB_RD_WR_ALLOC, REGION_4GB },
> -
> - /* armv7m code area */
> - { 0x, REGION_1, XN_DIS, PRIV_RW_USR_RW,
> - STRONG_ORDER, REGION_512MB },
> -
> - /* Device area : Not executable */
> - { 0x4000, REGION_2, XN_EN, PRIV_RW_USR_RW,
> - DEVICE_NON_SHARED, REGION_512MB },
> + O_I_WB_RD_WR_ALLOC, REGION_16MB },
> +#endif
>  
> - /*
> -  * Armv7m fixed configuration: strongly ordered & not
> -  * executable, not cacheable
> -  */
> - { 0xE000, REGION_3, XN_EN, PRIV_RW_USR_RW,
> - STRONG_ORDER, REGION_512MB },
> +#if defined(CONFIG_STM32F7)
> + { 0xC000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
> + O_I_WB_RD_WR_ALLOC, REGION_16MB },
> +#endif
>  
> -#if !defined(CONFIG_STM32H7)
> - /* Device area : Not executable */
> - { 0xA000, REGION_4, XN_EN, PRIV_RW_USR_RW,
> - DEVICE_NON_SHARED, REGION_512MB },
> +#if defined(CONFIG_STM32H7)
> + { 0xD000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
> + O_I_WB_RD_WR_ALLOC, REGION_32MB },
>  #endif
>   };
>  
> 
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Re: [U-Boot] [PATCH] ARM: dts: Add support for stm32f746-evaluation board support

[Vikas MANOCHA]

Hi,

<-Original Message-
; u-boot@lists.denx.de; 
albert.u.b...@aribaud.net; s...@chromium.org
; Christophe KERELLO 
<christophe.kere...@st.com>; Christophe PRIOUZEAU
<<christophe.priouz...@st.com>
 Hi,
<>
<> <-Original Message-----
<>s...@chromium.org; Vikas MANOCHA <vikas.mano...@st.com>
<> ; Patrick DELAUNAY
<> <patrick.delau...@st.com>; Christophe KERELLO
<> <<christophe.kere...@st.com>; Christophe PRIOUZEAU
<> <christophe.priouz...@st.com>
<>  support <
<>  <  <  _ STM32F746NGH6 microcontroller with 1 Mbyte Flash and 320+4 Kbytes
<> RAM <  _ Six 5 V power supply options:
<> <Power jack
<> <ST-LINK/V2-1 USB connector
<> <User USB HS connector
<> <User USB FS1 connector
<> <User USB FS2 connector
<> <Daughterboard
<> <  _ SAI Audio DAC, stereo audio jack which supports headset with
<> microphone <  _ Stereo digital microphone, audio jack connector used to 
connect
<> <external speakers
<> <  _ 2 Gbytes (or more) SDMMC interface microSD card <  _ RF-EEPROM on
<> I2C compatible serial interface <  _ RS-232 communication <  _ IrDA
<> transceiver <  _ JTAG/SWD and ETM trace debug support, ST-LINK/V2-1
<> embedded <  _ IEEE-802.3-2002 compliant Ethernet connector <  _ Camera
<> module <  _ 8Mx32 bit SDRAM, 1Mx16 bit SRAM & 8Mx16 bit Nor Flash <  _
<> 512 Mbits QuadSPI Nor Flash <  _ 5.7 inch 640x480 pixel TFT color LCD
<> with capacitive touch panel <  _ Joystick with 4-direction control and
<> selector <  _ Reset, WakeUp/Tamper or key button <  _ 4 color user
<> LEDs <  _ Extension connectors & memory connectors for daughterboard
<> or
<> <wrapping board
<> <  _ USB OTG HS and FS with Micro-AB connectors <  _ RTC with backup
<> battery <  _ CAN 2.0A/B compliant connection <  _ Potentiometer <  _
<> Motor control connector <  here :
<> <http://www.st.com/en/evaluation-tools/stm32746g-eval.html
<> <
<>  stm32f746-disco, the only difference is to pass "DEVICE_TREE=stm32746g- 
<eval".
<>
<> Can we just make it "stm32f746-eval" to be consistent with the other device 
tree names.
<> If kernel uses this name, then it needs to be fixed there also.
<

<> <
<> 
<> 
<>
<> Acked-by: Vikas Manocha <vikas.mano...@st.com>
<>
<> Cheers,
<> Vikas
<>
<> <---
<> < arch/arm/dts/Makefile   |   3 +-
<> < arch/arm/dts/stm32746g-eval.dts | 240
<> 
<> < 2 files changed, 242 insertions(+), 1 deletion(-)  create mode
<> 100644 arch/arm/dts/stm32746g-eval.dts <  a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index
<> c7695aa1f1dc..a2f6a10ae39d 100644
<> <--- a/arch/arm/dts/Makefile
<> <+++ b/arch/arm/dts/Makefile
<> <@@ -224,7 +224,8 @@ dtb-$(CONFIG_STM32F4) += stm32f429-disco.dtb \
<> <stm32f469-disco.dtb
<> <
<> < dtb-$(CONFIG_STM32F7) += stm32f746-disco.dtb \
<> <-   stm32f769-disco.dtb
<> <+   stm32f769-disco.dtb \
<> <+   stm32746g-eval.dtb
<> < dtb-$(CONFIG_STM32H7) += stm32h743i-disco.dtb \
<> <stm32h743i-eval.dtb
<> <
<>  b/arch/arm/dts/stm32746g-eval.dts new file mode 100644 index
<> <..4f6d38acccd7
<> <--- /dev/null
<> <+++ b/arch/arm/dts/stm32746g-eval.dts <@@ -0,0 +1,240 @@
<> <+/*
<> <+ * Copyright 2018 - Christophe Priouzeau
<> <christophe.priouz...@st.com> <+ * <+ * Based on:
<> <+ * stm32f746-disco.dts from U-boot 2018.01 <+ * Copyright 2016 - Lee
<> Jones <lee.jo...@linaro.org> <+ * <+ * This file is dual-licensed: you
<> can use it either under the terms <+ * of the GPL or the X11 license,
<> at your option. Note that this dual <+ * licensing only applies to
<> this file, and not this project as a <+ * whole.
<> <+ *
<> <+ *  a) This file is free software; you can redistribute it and/or
<> <+ * modify it under the terms of the GNU General Public License as
<> <+ * published by the Free Software Foundation; either version 2 of the
<> <+ * License, or (at your option) any later version.
<> <+ *
<> <+ * This file is distributed in the hope that it will be useful,
<> <+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
<> <+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
<>

Re: [U-Boot] [PATCH] ARM: dts: Add support for stm32f746-evaluation board support

[Vikas MANOCHA]

Hi,

<-Original Message-

; Patrick DELAUNAY 
<patrick.delau...@st.com>; Christophe KERELLO
<<christophe.kere...@st.com>; Christophe PRIOUZEAU <christophe.priouz...@st.com>

<
http://www.st.com/en/evaluation-tools/stm32746g-eval.html
<



Acked-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

<---
< arch/arm/dts/Makefile   |   3 +-
< arch/arm/dts/stm32746g-eval.dts | 240 
< 2 files changed, 242 insertions(+), 1 deletion(-)  create mode 100644 
arch/arm/dts/stm32746g-eval.dts
<

<+ *
<+ * Based on:
<+ * stm32f746-disco.dts from U-boot 2018.01
<+ * Copyright 2016 - Lee Jones <lee.jo...@linaro.org>
<+ *
<+ * This file is dual-licensed: you can use it either under the terms
<+ * of the GPL or the X11 license, at your option. Note that this dual
<+ * licensing only applies to this file, and not this project as a
<+ * whole.
<+ *
<+ *  a) This file is free software; you can redistribute it and/or
<+ * modify it under the terms of the GNU General Public License as
<+ * published by the Free Software Foundation; either version 2 of the
<+ * License, or (at your option) any later version.
<+ *
<+ * This file is distributed in the hope that it will be useful,
<+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
<+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
<+ * GNU General Public License for more details.
<+ *
<+ * Or, alternatively,
<+ *
<+ *  b) Permission is hereby granted, free of charge, to any person
<+ * obtaining a copy of this software and associated documentation
<+ * files (the "Software"), to deal in the Software without
<+ * restriction, including without limitation the rights to use,
<+ * copy, modify, merge, publish, distribute, sublicense, and/or
<+ * sell copies of the Software, and to permit persons to whom the
<+ * Software is furnished to do so, subject to the following
<+ * conditions:
<+ *
<+ * The above copyright notice and this permission notice shall be
<+ * included in all copies or substantial portions of the Software.
<+ *
<+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
<+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
<+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
<+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
<+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
<+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
<+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<+ * OTHER DEALINGS IN THE SOFTWARE.
<+ */
<+
<+/dts-v1/;
<+#include "stm32f746.dtsi"
<+#include 
<+
<+/ {
<+  model = "STMicroelectronics STM32F746G-EVAL board";
<+  compatible = "st,stm32f746g-eval", "st,stm32f746";
<+
<+  chosen {
<+  bootargs = "root=/dev/mmcblk0p1 rw rootwait";
<+  stdout-path = "serial0:115200n8";
<+  };
<+
<+  memory {
<+  reg = <0xC000 0x200>;
<+  };
<+
<+  aliases {
<+  serial0 = 
<+  spi0 = 
<+  mmc0 = 
<+  /* Aliases for gpios so as to use sequence */
<+  gpio0 = 
<+  gpio1 = 
<+  gpio2 = 
<+  gpio3 = 
<+  gpio4 = 
<+  gpio5 = 
<+  gpio6 = 
<+  gpio7 = 
<+  gpio8 = 
<+  gpio9 = 
<+  gpio10 = 
<+  };
<+
<+  led1 {
<+  compatible = "st,led1";
<+  led-gpio = < 10 0>;
<+  };
<+
<+  button1 {
<+  compatible = "st,button1";
<+  button-gpio = < 13 0>;
<+  };
<+};
<+
<+_hse {
<+  clock-frequency = <2500>;
<+};
<+
<+ {
<+  usart1_pins_a: usart1@0 {
<+  pins1 {
<+ pinmux = ;
<+  bias-disable;
<+  drive-push-pull;
<+  slew-rate = <2>;
<+  };
<+  pins2 {
<+  pinmux = ;
<+  bias-disable;
<+  };
<+  };
<+
<+  ethernet_mii: mii@0 {
<+pins {
<+pinmux = ,
<+   ,
<+   ,
<+   ,
<+   ,
<+   
,
<+

Re: [U-Boot] [PATCH v2 0/5] STM32: Clean unused and factorize .h files in arch-stm32

[Vikas Manocha]

Great !

On 02/09/2018 04:09 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard <patrice.chot...@st.com>

For the series,

Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> 
> Removes unused .h files in arch/arm/include/asm/arch-stm32xx 
> Factorize and clean some .h files to avoid to duplicate defines in 
> separate .h files
> 
> V2: _ create arch/arm/include/asm/arch-stm32 directory and move 
>   gpio.h and stm32f.h in it.
> 
> Patrice Chotard (5):
>   arch-stm32f4: Remove fmc.h file
>   arch-stm32: Move gpio.h for STM32 SoCs in include/asm/
>   arch-stm32: Factorize stm32.h for STM32F4 and F7
>   arch-stm32: Remove stm32_periph.h
>   arch-stm32: Clean arch-stm32f7/syscfg.h
> 
>  arch/arm/include/asm/arch-stm32/gpio.h   | 115 ++
>  arch/arm/include/asm/arch-stm32/stm32f.h |  22 
>  arch/arm/include/asm/arch-stm32f4/fmc.h  |  75 
>  arch/arm/include/asm/arch-stm32f4/gpio.h | 146 
> +--
>  arch/arm/include/asm/arch-stm32f4/stm32.h|  14 +--
>  arch/arm/include/asm/arch-stm32f4/stm32_periph.h |  38 --
>  arch/arm/include/asm/arch-stm32f7/gpio.h | 115 +-
>  arch/arm/include/asm/arch-stm32f7/stm32.h|  45 +--
>  arch/arm/include/asm/arch-stm32f7/stm32_periph.h |  23 
>  arch/arm/include/asm/arch-stm32f7/syscfg.h   |   9 --
>  arch/arm/include/asm/arch-stm32h7/gpio.h | 115 +-
>  board/st/stm32f746-disco/stm32f746-disco.c   |   1 -
>  drivers/mtd/stm32_flash.c|   2 +-
>  13 files changed, 144 insertions(+), 576 deletions(-)
>  create mode 100644 arch/arm/include/asm/arch-stm32/gpio.h
>  create mode 100644 arch/arm/include/asm/arch-stm32/stm32f.h
>  delete mode 100644 arch/arm/include/asm/arch-stm32f4/fmc.h
>  delete mode 100644 arch/arm/include/asm/arch-stm32f4/stm32_periph.h
>  delete mode 100644 arch/arm/include/asm/arch-stm32f7/stm32_periph.h
> 
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Re: [U-Boot] [PATCH 2/5] arch-stm32: Move gpio.h for STM32 SoCs in include/asm/

[Vikas Manocha]

Hi Patrice,

On 02/08/2018 05:35 AM, Patrice CHOTARD wrote:
> Hi Vikas
> 
> On 02/07/2018 08:28 PM, Vikas Manocha wrote:
>> Hi Patrice,
>>
>> On 02/07/2018 07:50 AM, patrice.chot...@st.com wrote:
>>> From: Patrice Chotard <patrice.chot...@st.com>
>>>
>>> Instead to have 3 identical gpio.h for all STM32 SoCs,
>>> migrate them in one file in include/asm.
>>
>> good move to consolidate these headers.
>> One comment below.
>>
>>>
>>> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>
> 
> [...]
> 
>>> -static inline unsigned stm32_gpio_to_pin(unsigned gpio)
>>> -{
>>> -   return gpio % 16;
>>> -}
>>> +#include 
>>
>> Hmm.. this header seems like dummy header(in all architectures f4/f7/h7) 
>> only to include gpio header here.
>> Also arch/arm/include/asm/ does not seems like good place for soc specific 
>> header files.
> 
> Agree, but omap have put several omap_.h files too.

I see omap files, they might be first ones to use this structure, i am not 
sure. But in any case, it does not look clean today.
How about creating asm/arch-stm32 to put common stuff like this gpio header.

-#include 
+#include 

It can be done with no modification required in SYS_SOC, the point you 
mentioned below.
It does not remove the arch-stm32f7/f7/h7/ gpio headers but avoids include/asm 
cluttering with SOC files.

Cheers,
Vikas

> 
>>
>> how about creating one level like arch/arm/include/asm/arch-stm32/ to 
>> include common gpio.h here. It would fix both of above points.
>> The same location can be used to move other commonalities in future.
> 
> It's possible to create an additionnal level
> arch/arm/include/asm/arch-stm32/  and put specificities to each SoCs into :
> 
> arch/arm/include/asm/arch-stm32/stm32f4
> arch/arm/include/asm/arch-stm32/stm32f7
> arch/arm/include/asm/arch-stm32/stm32h7
> 
> If we focus on stm32f7, this implies to modify the content of 
> CONFIG_SYS_SOC from "stm32f7" to "stm32/stm32f7" in 
> board/st/stm32f746-disco/Kconfig but:
> 
> 1) In any case, we can't include directly files located in 
> arch/arm/include/asm/arch-stm32 because SYS_SOC is used to build include 
> path.
> 
> For example in drivers/gpio/gpio-uclass.c,
> #include  is in fact #include /gpio.h
> 
> so equal to #include  
> 2) Other effect, now in "soc" environment variable, we will obtain 
> "stm32/stm32f7" instead of "stm32f7". This is not a big deal, but we 
> must add some code to extract the soc name from "soc" environment variable.
> 
> Both solution are not perfect.
> 
> Thanks
> 
> Patrice
> 
> 
>>
>> Cheers,
>> Vikas
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Re: [U-Boot] [PATCH 3/5] arch-stm32: Factorize stm32.h for STM32F4 and F7

[Vikas Manocha]

Hi,

On 02/07/2018 07:50 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard 
> 
> For STM32F4 and F7 SoCx family, a specific stm32.h file exists.
> Some common defines are duplicated or even unused in each of
> these stm32.h.
> 
> Factorize all common definition in arch/arm/include/asm/stm32f.h and keep
> specific definitions in each arch/arm/include/asm/arch-stm32fx/stm32.h.
> 
> Signed-off-by: Patrice Chotard 
> ---
>  arch/arm/include/asm/arch-stm32f4/stm32.h | 14 ++
>  arch/arm/include/asm/arch-stm32f7/stm32.h | 45 
> +--
>  arch/arm/include/asm/stm32f.h | 22 +++
>  drivers/mtd/stm32_flash.c |  2 +-
>  4 files changed, 26 insertions(+), 57 deletions(-)
>  create mode 100644 arch/arm/include/asm/stm32f.h
> 
> diff --git a/arch/arm/include/asm/arch-stm32f4/stm32.h 
> b/arch/arm/include/asm/arch-stm32f4/stm32.h
> index 763b18cb5412..86cca059075d 100644
> --- a/arch/arm/include/asm/arch-stm32f4/stm32.h
> +++ b/arch/arm/include/asm/arch-stm32f4/stm32.h
> @@ -11,17 +11,12 @@
>  #ifndef _MACH_STM32_H_
>  #define _MACH_STM32_H_
>  
> +#include 
> +
>  /*
>   * Peripheral memory map
>   */
>  #define STM32_SYSMEM_BASE0x1FFF
> -#define STM32_PERIPH_BASE0x4000
> -#define STM32_APB1PERIPH_BASE(STM32_PERIPH_BASE + 0x)
> -#define STM32_APB2PERIPH_BASE(STM32_PERIPH_BASE + 0x0001)
> -#define STM32_AHB1PERIPH_BASE(STM32_PERIPH_BASE + 0x0002)
> -#define STM32_AHB2PERIPH_BASE(STM32_PERIPH_BASE + 0x1000)
> -
> -#define STM32_BUS_MASK   0x
>  
>  /*
>   * Register maps
> @@ -37,15 +32,10 @@ struct stm32_u_id_regs {
>   */
>  #define STM32_U_ID_BASE  (STM32_SYSMEM_BASE + 0x7A10)
>  #define STM32_U_ID   ((struct stm32_u_id_regs *)STM32_U_ID_BASE)
> -
> -#define FLASH_CNTL_BASE  (STM32_AHB1PERIPH_BASE + 0x3C00)
> -
>  static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
>   [0 ... 3] = 16 * 1024,
>   [4] =   64 * 1024,
>   [5 ... 11] =128 * 1024
>  };
>  
> -void stm32_flash_latency_cfg(int latency);
> -
>  #endif /* _MACH_STM32_H_ */
> diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h 
> b/arch/arm/include/asm/arch-stm32f7/stm32.h
> index 40df89142608..3f097548d374 100644
> --- a/arch/arm/include/asm/arch-stm32f7/stm32.h
> +++ b/arch/arm/include/asm/arch-stm32f7/stm32.h
> @@ -8,46 +8,7 @@
>  #ifndef _ASM_ARCH_HARDWARE_H
>  #define _ASM_ARCH_HARDWARE_H
>  
> -/* STM32F746 */
> -#define ITCM_FLASH_BASE  0x0020UL
> -#define AXIM_FLASH_BASE  0x0800UL
> -
> -#define ITCM_SRAM_BASE   0xUL
> -#define DTCM_SRAM_BASE   0x2000UL
> -#define SRAM1_BASE   0x2001UL
> -#define SRAM2_BASE   0x2004C000UL
> -
> -#define PERIPH_BASE  0x4000UL
> -
> -#define APB1_PERIPH_BASE (PERIPH_BASE + 0x)
> -#define APB2_PERIPH_BASE (PERIPH_BASE + 0x0001)
> -#define AHB1_PERIPH_BASE (PERIPH_BASE + 0x0002)
> -#define AHB2_PERIPH_BASE (PERIPH_BASE + 0x1000)
> -#define AHB3_PERIPH_BASE (PERIPH_BASE + 0x2000)
> -
> -#define USART2_BASE  (APB1_PERIPH_BASE + 0x4400)
> -#define USART3_BASE  (APB1_PERIPH_BASE + 0x4800)
> -#define PWR_BASE (APB1_PERIPH_BASE + 0x7000)
> -
> -#define USART1_BASE  (APB2_PERIPH_BASE + 0x1000)
> -#define USART6_BASE  (APB2_PERIPH_BASE + 0x1400)
> -#define STM32_SYSCFG_BASE(APB2_PERIPH_BASE + 0x3800)
> -
> -#define STM32_GPIOA_BASE (AHB1_PERIPH_BASE + 0x)
> -#define STM32_GPIOB_BASE (AHB1_PERIPH_BASE + 0x0400)
> -#define STM32_GPIOC_BASE (AHB1_PERIPH_BASE + 0x0800)
> -#define STM32_GPIOD_BASE (AHB1_PERIPH_BASE + 0x0C00)
> -#define STM32_GPIOE_BASE (AHB1_PERIPH_BASE + 0x1000)
> -#define STM32_GPIOF_BASE (AHB1_PERIPH_BASE + 0x1400)
> -#define STM32_GPIOG_BASE (AHB1_PERIPH_BASE + 0x1800)
> -#define STM32_GPIOH_BASE (AHB1_PERIPH_BASE + 0x1C00)
> -#define STM32_GPIOI_BASE (AHB1_PERIPH_BASE + 0x2000)
> -#define STM32_GPIOJ_BASE (AHB1_PERIPH_BASE + 0x2400)
> -#define STM32_GPIOK_BASE (AHB1_PERIPH_BASE + 0x2800)
> -#define FLASH_CNTL_BASE  (AHB1_PERIPH_BASE + 0x3C00)
> -
> -
> -#define SDRAM_FMC_BASE   (AHB3_PERIPH_BASE + 0x4140)
> +#include 
>  
>  static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
>   [0 ... 3] = 32 * 1024,
> @@ -55,8 +16,4 @@ static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
>   [5 ... 7] = 256 * 1024
>  };
>  
> -#define STM32_BUS_MASK   GENMASK(31, 16)
> -
> -void stm32_flash_latency_cfg(int latency);
> -
>  #endif /* _ASM_ARCH_HARDWARE_H */
> diff --git a/arch/arm/include/asm/stm32f.h b/arch/arm/include/asm/stm32f.h

same comment, location of this header should be arch-stm32/stm32f.h

Cheers,
Vikas

> new file mode 100644
> 

Re: [U-Boot] [PATCH 2/5] arch-stm32: Move gpio.h for STM32 SoCs in include/asm/

[Vikas Manocha]

 /* GPIO port input data */
> - u32 odr;/* GPIO port output data */
> - u32 bsrr;   /* GPIO port bit set/reset */
> - u32 lckr;   /* GPIO port configuration lock */
> - u32 afr[2]; /* GPIO alternate function */
> -};
> -
> -struct stm32_gpio_priv {
> - struct stm32_gpio_regs *regs;
> -};
> -
> -static inline unsigned stm32_gpio_to_port(unsigned gpio)
> -{
> - return gpio / 16;
> -}
> -
> -static inline unsigned stm32_gpio_to_pin(unsigned gpio)
> -{
> - return gpio % 16;
> -}
> +#include 

Hmm.. this header seems like dummy header(in all architectures f4/f7/h7) only 
to include gpio header here.
Also arch/arm/include/asm/ does not seems like good place for soc specific 
header files.

how about creating one level like arch/arm/include/asm/arch-stm32/ to include 
common gpio.h here. It would fix both of above points.
The same location can be used to move other commonalities in future.

Cheers,
Vikas


[...] 

>  
>  #endif /* _STM32_GPIO_H_ */
> diff --git a/arch/arm/include/asm/stm32_gpio.h 
> b/arch/arm/include/asm/stm32_gpio.h
> new file mode 100644
> index ..d24e8096acfe
> --- /dev/null
> +++ b/arch/arm/include/asm/stm32_gpio.h
> @@ -0,0 +1,115 @@
> +/*
> + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
> + * Author(s): Vikas Manocha, <vikas.mano...@st.com> for STMicroelectronics.
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +
> +#ifndef _GPIO_H_
> +#define _GPIO_H_
> +
> +enum stm32_gpio_port {
> + STM32_GPIO_PORT_A = 0,
> + STM32_GPIO_PORT_B,
> + STM32_GPIO_PORT_C,
> + STM32_GPIO_PORT_D,
> + STM32_GPIO_PORT_E,
> + STM32_GPIO_PORT_F,
> + STM32_GPIO_PORT_G,
> + STM32_GPIO_PORT_H,
> + STM32_GPIO_PORT_I
> +};
> +
> +enum stm32_gpio_pin {
> + STM32_GPIO_PIN_0 = 0,
> + STM32_GPIO_PIN_1,
> + STM32_GPIO_PIN_2,
> + STM32_GPIO_PIN_3,
> + STM32_GPIO_PIN_4,
> + STM32_GPIO_PIN_5,
> + STM32_GPIO_PIN_6,
> + STM32_GPIO_PIN_7,
> + STM32_GPIO_PIN_8,
> + STM32_GPIO_PIN_9,
> + STM32_GPIO_PIN_10,
> + STM32_GPIO_PIN_11,
> + STM32_GPIO_PIN_12,
> + STM32_GPIO_PIN_13,
> + STM32_GPIO_PIN_14,
> + STM32_GPIO_PIN_15
> +};
> +
> +enum stm32_gpio_mode {
> + STM32_GPIO_MODE_IN = 0,
> + STM32_GPIO_MODE_OUT,
> + STM32_GPIO_MODE_AF,
> + STM32_GPIO_MODE_AN
> +};
> +
> +enum stm32_gpio_otype {
> + STM32_GPIO_OTYPE_PP = 0,
> + STM32_GPIO_OTYPE_OD
> +};
> +
> +enum stm32_gpio_speed {
> + STM32_GPIO_SPEED_2M = 0,
> + STM32_GPIO_SPEED_25M,
> + STM32_GPIO_SPEED_50M,
> + STM32_GPIO_SPEED_100M
> +};
> +
> +enum stm32_gpio_pupd {
> + STM32_GPIO_PUPD_NO = 0,
> + STM32_GPIO_PUPD_UP,
> + STM32_GPIO_PUPD_DOWN
> +};
> +
> +enum stm32_gpio_af {
> + STM32_GPIO_AF0 = 0,
> + STM32_GPIO_AF1,
> + STM32_GPIO_AF2,
> + STM32_GPIO_AF3,
> + STM32_GPIO_AF4,
> + STM32_GPIO_AF5,
> + STM32_GPIO_AF6,
> + STM32_GPIO_AF7,
> + STM32_GPIO_AF8,
> + STM32_GPIO_AF9,
> + STM32_GPIO_AF10,
> + STM32_GPIO_AF11,
> + STM32_GPIO_AF12,
> + STM32_GPIO_AF13,
> + STM32_GPIO_AF14,
> + STM32_GPIO_AF15
> +};
> +
> +struct stm32_gpio_dsc {
> + enum stm32_gpio_portport;
> + enum stm32_gpio_pin pin;
> +};
> +
> +struct stm32_gpio_ctl {
> + enum stm32_gpio_modemode;
> + enum stm32_gpio_otype   otype;
> + enum stm32_gpio_speed   speed;
> + enum stm32_gpio_pupdpupd;
> + enum stm32_gpio_af  af;
> +};
> +
> +struct stm32_gpio_regs {
> + u32 moder;  /* GPIO port mode */
> + u32 otyper; /* GPIO port output type */
> + u32 ospeedr;/* GPIO port output speed */
> + u32 pupdr;  /* GPIO port pull-up/pull-down */
> + u32 idr;/* GPIO port input data */
> + u32 odr;/* GPIO port output data */
> + u32 bsrr;   /* GPIO port bit set/reset */
> + u32 lckr;   /* GPIO port configuration lock */
> + u32 afr[2]; /* GPIO alternate function */
> +};
> +
> +struct stm32_gpio_priv {
> + struct stm32_gpio_regs *regs;
> +};
> +
> +#endif /* _GPIO_H_ */
> 
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Re: [U-Boot] [PATCH v2 1/3] mach-stm32: Add set_env_soc_name support

[Vikas Manocha]

On 02/06/2018 12:52 AM, Patrick DELAUNAY wrote:
> Hi Patrice,
> 
>> From: Patrice CHOTARD
>>
>> Sure, i will send a v3
>>
>> Thanks
>>
>> Patrice
>>
> 
> You can also activate CONFIG_ENV_VARS_UBOOT_CONFIG

Great ! Thanks Patrick.

Cheers,
Vikas

> 
> Then the variables are defined in ./include/env_default.h :
> 
> arch=CONFIG_SYS_ARCH
> cpu=CONFIG_SYS_CPU
> board=CONFIG_SYS_BOARD
> board_name=CONFIG_SYS_BOARD
> vendor=CONFIG_SYS_VENDOR
> soc=CONFIG_SYS_SOC
> 
> It is perhaps more simple.
> 
> Regards
> 
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Re: [U-Boot] [PATCH] configs: stm32: Enable CONFIG_ENV_VARS_UBOOT_CONFIG

[Vikas Manocha]

Hi,

On 02/06/2018 01:47 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> Enable CONFIG_ENV_VARS_UBOOT_CONFIG for all STM32 boards
> It allows to retrieve the SoC name into the "soc" environment
> variable.
> 
> Signed-off-by: Christophe Priouzeau <christophe.priouz...@st.com>
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>

Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> ---
>  include/configs/stm32f429-discovery.h  | 1 +
>  include/configs/stm32f429-evaluation.h | 1 +
>  include/configs/stm32f469-discovery.h  | 1 +
>  include/configs/stm32f746-disco.h  | 1 +
>  include/configs/stm32h743-disco.h  | 2 ++
>  include/configs/stm32h743-eval.h   | 2 ++
>  6 files changed, 8 insertions(+)
> 
> diff --git a/include/configs/stm32f429-discovery.h 
> b/include/configs/stm32f429-discovery.h
> index af9daad32072..92166a489496 100644
> --- a/include/configs/stm32f429-discovery.h
> +++ b/include/configs/stm32f429-discovery.h
> @@ -59,6 +59,7 @@
>  #define CONFIG_BOOTCOMMAND   \
>   "run bootcmd_romfs"
>  
> +#define CONFIG_ENV_VARS_UBOOT_CONFIG
>  #define CONFIG_EXTRA_ENV_SETTINGS \
>   "bootargs_romfs=uclinux.physaddr=0x0818 root=/dev/mtdblock0\0" \
>   "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
> diff --git a/include/configs/stm32f429-evaluation.h 
> b/include/configs/stm32f429-evaluation.h
> index ab33d0f3d2a2..79b77bd3781a 100644
> --- a/include/configs/stm32f429-evaluation.h
> +++ b/include/configs/stm32f429-evaluation.h
> @@ -52,6 +52,7 @@
>  #define CONFIG_BOOTCOMMAND   \
>   "run boot_sd"
>  
> +#define CONFIG_ENV_VARS_UBOOT_CONFIG
>  #define CONFIG_EXTRA_ENV_SETTINGS \
>   "boot_sd=mmc dev 0;fatload mmc 0 0x0070 stm32429i-eval.dtb; fatload 
> mmc 0 0x8000 zImage; icache off; bootz 0x8000 - 0x0070"
>  
> diff --git a/include/configs/stm32f469-discovery.h 
> b/include/configs/stm32f469-discovery.h
> index c290a66fddd3..99c3e08d330e 100644
> --- a/include/configs/stm32f469-discovery.h
> +++ b/include/configs/stm32f469-discovery.h
> @@ -54,6 +54,7 @@
>  #define CONFIG_BOOTCOMMAND   \
>   "run boot_sd"
>  
> +#define CONFIG_ENV_VARS_UBOOT_CONFIG
>  #define CONFIG_EXTRA_ENV_SETTINGS \
>   "boot_sd=mmc dev 0;fatload mmc 0 0x0070 stm32f469-disco.dtb; 
> fatload mmc 0 0x8000 zImage; icache off; bootz 0x8000 - 0x0070"
>  
> diff --git a/include/configs/stm32f746-disco.h 
> b/include/configs/stm32f746-disco.h
> index 3e952c2acd82..b99eb71b48c6 100644
> --- a/include/configs/stm32f746-disco.h
> +++ b/include/configs/stm32f746-disco.h
> @@ -52,6 +52,7 @@
>  #define CONFIG_BOOTCOMMAND   \
>   "run bootcmd_romfs"
>  
> +#define CONFIG_ENV_VARS_UBOOT_CONFIG
>  #define CONFIG_EXTRA_ENV_SETTINGS \
>   "bootargs_romfs=uclinux.physaddr=0x0818 root=/dev/mtdblock0\0" \
>   "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
> diff --git a/include/configs/stm32h743-disco.h 
> b/include/configs/stm32h743-disco.h
> index 531de701492a..1494203e83b2 100644
> --- a/include/configs/stm32h743-disco.h
> +++ b/include/configs/stm32h743-disco.h
> @@ -39,6 +39,8 @@
>  #define CONFIG_BOOTARGS  
> \
>   "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
>  
> +#define CONFIG_ENV_VARS_UBOOT_CONFIG
> +
>  /*
>   * Command line configuration.
>   */
> diff --git a/include/configs/stm32h743-eval.h 
> b/include/configs/stm32h743-eval.h
> index 531de701492a..1494203e83b2 100644
> --- a/include/configs/stm32h743-eval.h
> +++ b/include/configs/stm32h743-eval.h
> @@ -39,6 +39,8 @@
>  #define CONFIG_BOOTARGS  
> \
>   "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
>  
> +#define CONFIG_ENV_VARS_UBOOT_CONFIG
> +
>  /*
>   * Command line configuration.
>   */
> 
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Re: [U-Boot] [PATCH v2 1/3] mach-stm32: Add set_env_soc_name support

[Vikas Manocha]

Hi,

On 02/05/2018 02:33 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> This allows to create and set the environment variable
> "soc_name" which contains the current STM32 SoC's name.
> 
> Signed-off-by: Christophe Priouzeau <christophe.priouz...@st.com>
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>

For the series,
Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

One point below,
[...]

> +
>  #endif /* _ASM_ARCH_HARDWARE_H */
> diff --git a/arch/arm/mach-stm32/soc.c b/arch/arm/mach-stm32/soc.c
> index df20d547c500..06ca61b270cf 100644
> --- a/arch/arm/mach-stm32/soc.c
> +++ b/arch/arm/mach-stm32/soc.c
> @@ -8,6 +8,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  int arch_cpu_init(void)
>  {
> @@ -54,3 +55,17 @@ int arch_cpu_init(void)
>  
>   return 0;
>  }
> +
> +void set_env_soc_name(void)
> +{
> + char soc[16];
> +
> +#ifdef CONFIG_STM32F4
> + snprintf(soc, sizeof(soc), "stm32f4");
> +#elif CONFIG_STM32F7
> + snprintf(soc, sizeof(soc), "stm32f7");
> +#elif CONFIG_STM32H7
> + snprintf(soc, sizeof(soc), "stm32h7");
> +#endif

Can we move these conditional checks in the background like in some header file 
inline function & use it like get_soc_name();

Cheers,
Vikas

> + env_set("soc_name", soc);
> +}
> 
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Re: [U-Boot] [PATCH 0/8] Add get_cpu_id for STM32 SoCs

[Vikas Manocha]

Hi Patrice,

On 02/02/2018 12:22 AM, Patrice CHOTARD wrote:
> +Christophe Priouzeau who is the requester/developper of this feature
> 
> 
> On 01/31/2018 07:22 PM, Vikas Manocha wrote:
>> Hi Patrice,
>>
>> On 01/31/2018 08:08 AM, patrice.chot...@st.com wrote:
>>> From: Patrice Chotard <patrice.chot...@st.com>
>>>
>>> This series allows to get the cpu id of STM32 SoCs and to set
>>> the environment variable "soc_name" with the corresponding SoC name.
>>>
>>> This will be useful in some development environment to retrieve files
>>> correspondig to SoC family.
>>
>> can you provide some example ? We have the device tree compatible string to 
>> distinguish board & soc.
> 
> We will add STM32 SoCs support in buildroot environment
> Our objective is to propose a flexible solution to boot linux
> kernel from sdcard.
> 
> As for STM32F4, STM32F7 and STM32H7 linux defconfig is slightly 
> different (specific CONFIG_DRAM_BASE and CONFIG_DRAM_SIZE) we can't use 
> the same zImage for all these SoCs.
> 
> To simplify, we will embed all dtb/zImage in the sdcard and using the 
> soc_name environment variable to select the correct zImage.

soc name is already part of configuration (SYS_SOC). It would be simpler and 
less expensive (for both cpu & memory) to use it.
In this patchset, 56 Bytes(currently, which will increase with more SOCs 
support) of lookup table are becoming part of text apart from the additional 
code.

Cheers,
Vikas

> 
> Patrice
> 
> 
>>
>> Cheers,
>> Vikas
>>
>>>
>>> Patrice Chotard (8):
>>>mach-stm32: Add get_cpu_id support
>>>mach-stm32: Move BOARD_LATE_INIT flag to mach-stm32 Kconfig
>>>board: stm32f429-discovery: Add set_env_soc_name() in
>>>  board_late_init()
>>>board: stm32h743-evaluation: Add set_env_soc_name() in
>>>  board_late_init()
>>>board: stm32f743-discovery: Add set_env_soc_name() in
>>>  board_late_init()
>>>board: stm32f469-discovery: Add set_env_soc_name() in
>>>  board_late_init()
>>>board: stm32f469-discovery: Add set_env_soc_name() in
>>>  board_late_init()
>>>board: stm32f429-evaluation: Add set_env_soc_name() in
>>>  board_late_init()
>>>
>>>   arch/arm/include/asm/arch-stm32f4/stm32.h  |  2 +
>>>   arch/arm/include/asm/arch-stm32f7/stm32.h  |  2 +
>>>   arch/arm/include/asm/arch-stm32h7/stm32.h  |  4 ++
>>>   arch/arm/mach-stm32/Kconfig|  3 ++
>>>   arch/arm/mach-stm32/soc.c  | 46 
>>> ++
>>>   board/st/stm32f429-discovery/stm32f429-discovery.c |  7 
>>>   .../st/stm32f429-evaluation/stm32f429-evaluation.c |  7 
>>>   board/st/stm32f469-discovery/stm32f469-discovery.c |  7 
>>>   board/st/stm32f746-disco/stm32f746-disco.c |  2 +
>>>   board/st/stm32h743-disco/stm32h743-disco.c |  4 ++
>>>   board/st/stm32h743-eval/stm32h743-eval.c   |  4 ++
>>>   include/configs/stm32f746-disco.h  |  1 -
>>>   include/configs/stm32h743-disco.h  |  1 -
>>>   include/configs/stm32h743-eval.h   |  1 -
>>>   14 files changed, 88 insertions(+), 3 deletions(-)
>> >
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Re: [U-Boot] [PATCH 6/8] board: stm32f469-discovery: Add set_env_soc_name() in board_late_init()

[Vikas Manocha]

Hi,

On 01/31/2018 08:09 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard 
> 
> Add set_env_soc_name() call in board_late_init() to set environment
> variable "soc_name" with the name of current STM32 SoC.
> 
> Signed-off-by: Christophe Priouzeau 
> Signed-off-by: Patrice Chotard 
> ---
>  board/st/stm32f746-disco/stm32f746-disco.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
> b/board/st/stm32f746-disco/stm32f746-disco.c

does not match with the Subject, same mis-match in one more patch.
Can we club these board patches in one.

Cheers,
Vikas

> index 8da70281f976..0ad03ce96d33 100644
> --- a/board/st/stm32f746-disco/stm32f746-disco.c
> +++ b/board/st/stm32f746-disco/stm32f746-disco.c
> @@ -115,6 +115,8 @@ int board_late_init(void)
>   struct gpio_desc gpio = {};
>   int node;
>  
> + set_env_soc_name(get_cpu_id());
> +
>   node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
>   if (node < 0)
>   return -1;
> 
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Re: [U-Boot] [PATCH 0/8] Add get_cpu_id for STM32 SoCs

[Vikas Manocha]

Hi Patrice,

On 01/31/2018 08:08 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard 
> 
> This series allows to get the cpu id of STM32 SoCs and to set 
> the environment variable "soc_name" with the corresponding SoC name.
> 
> This will be useful in some development environment to retrieve files
> correspondig to SoC family.

can you provide some example ? We have the device tree compatible string to 
distinguish board & soc.

Cheers,
Vikas

> 
> Patrice Chotard (8):
>   mach-stm32: Add get_cpu_id support
>   mach-stm32: Move BOARD_LATE_INIT flag to mach-stm32 Kconfig
>   board: stm32f429-discovery: Add set_env_soc_name() in
> board_late_init()
>   board: stm32h743-evaluation: Add set_env_soc_name() in
> board_late_init()
>   board: stm32f743-discovery: Add set_env_soc_name() in
> board_late_init()
>   board: stm32f469-discovery: Add set_env_soc_name() in
> board_late_init()
>   board: stm32f469-discovery: Add set_env_soc_name() in
> board_late_init()
>   board: stm32f429-evaluation: Add set_env_soc_name() in
> board_late_init()
> 
>  arch/arm/include/asm/arch-stm32f4/stm32.h  |  2 +
>  arch/arm/include/asm/arch-stm32f7/stm32.h  |  2 +
>  arch/arm/include/asm/arch-stm32h7/stm32.h  |  4 ++
>  arch/arm/mach-stm32/Kconfig|  3 ++
>  arch/arm/mach-stm32/soc.c  | 46 
> ++
>  board/st/stm32f429-discovery/stm32f429-discovery.c |  7 
>  .../st/stm32f429-evaluation/stm32f429-evaluation.c |  7 
>  board/st/stm32f469-discovery/stm32f469-discovery.c |  7 
>  board/st/stm32f746-disco/stm32f746-disco.c |  2 +
>  board/st/stm32h743-disco/stm32h743-disco.c |  4 ++
>  board/st/stm32h743-eval/stm32h743-eval.c   |  4 ++
>  include/configs/stm32f746-disco.h  |  1 -
>  include/configs/stm32h743-disco.h  |  1 -
>  include/configs/stm32h743-eval.h   |  1 -
>  14 files changed, 88 insertions(+), 3 deletions(-)
> 
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Re: [U-Boot] [PATCH 1/8] mach-stm32: Add get_cpu_id support

[Vikas Manocha]

Hi Patrice,

On 01/31/2018 08:09 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard 
> 
> This allows to read the CPU ID into STM32 DBGMCU_IDCODE register
> and create an environment variable which contains the soc name.
> 
> Signed-off-by: Christophe Priouzeau 
> Signed-off-by: Patrice Chotard 
> ---
>  arch/arm/include/asm/arch-stm32f4/stm32.h |  2 ++
>  arch/arm/include/asm/arch-stm32f7/stm32.h |  2 ++
>  arch/arm/include/asm/arch-stm32h7/stm32.h |  4 +++
>  arch/arm/mach-stm32/soc.c | 46 
> +++
>  4 files changed, 54 insertions(+)
> 
> diff --git a/arch/arm/include/asm/arch-stm32f4/stm32.h 
> b/arch/arm/include/asm/arch-stm32f4/stm32.h
> index 0449fcecede0..87fd0fa893e5 100644
> --- a/arch/arm/include/asm/arch-stm32f4/stm32.h
> +++ b/arch/arm/include/asm/arch-stm32f4/stm32.h
> @@ -50,5 +50,7 @@ static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
>  };
>  
>  void stm32_flash_latency_cfg(int latency);
> +int get_cpu_id(void);
> +void set_env_soc_name(int cpu_id);
>  
>  #endif /* _MACH_STM32_H_ */
> diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h 
> b/arch/arm/include/asm/arch-stm32f7/stm32.h
> index f54e6f195575..dade6e9661ac 100644
> --- a/arch/arm/include/asm/arch-stm32f7/stm32.h
> +++ b/arch/arm/include/asm/arch-stm32f7/stm32.h
> @@ -63,5 +63,7 @@ static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
>  
>  
>  void stm32_flash_latency_cfg(int latency);
> +int get_cpu_id(void);
> +void set_env_soc_name(int cpu_id);
>  
>  #endif /* _ASM_ARCH_HARDWARE_H */
> diff --git a/arch/arm/include/asm/arch-stm32h7/stm32.h 
> b/arch/arm/include/asm/arch-stm32h7/stm32.h
> index f2922aa3237e..e520c7ea0dbd 100644
> --- a/arch/arm/include/asm/arch-stm32h7/stm32.h
> +++ b/arch/arm/include/asm/arch-stm32h7/stm32.h

how about creating one common header file for stm32.

> @@ -18,4 +18,8 @@
>   * arch/arm/include/asm/arch-stm32f4/stm32.h
>   * arch/arm/include/asm/arch-stm32f7/stm32.h
>   */
> +
> +int get_cpu_id(void);
> +void set_env_soc_name(int cpu_id);
> +
>  #endif /* _ASM_ARCH_HARDWARE_H */
> diff --git a/arch/arm/mach-stm32/soc.c b/arch/arm/mach-stm32/soc.c
> index df20d547c500..0933dfce656d 100644
> --- a/arch/arm/mach-stm32/soc.c
> +++ b/arch/arm/mach-stm32/soc.c
> @@ -9,6 +9,30 @@
>  #include 
>  #include 
>  
> +#define STM32_DBGMCU_IDCODE_DEV_ID   GENMASK(11, 0)

to make it clear it is MASK macro, pls replace xx_DEV_D with xx_MASK.

> +
> +#if !defined(CONFIG_STM32H7)
> +#define STM32_DBGMCU_IDCODE  0xE0042000
> +#else
> +#define STM32_DBGMCU_IDCODE  0x5C001000
> +#endif

move it to arch/soc register definitions like to 
arch/arm/include/asm/arch-stm32f7/stm32.h

> +
> +struct cpu_id_table {
> + unsigned intid;
> + const char  *name;
> + };
> +
> +const struct cpu_id_table stm32_cpu_id_table[] = {
> + { 0x413, "stm32f4" },
> + { 0x419, "stm32f4" },
> + { 0x434, "stm32f4" },
> + { 0x449, "stm32f7" },
> + { 0x451, "stm32f7" },
> + { 0x450, "stm32h7" },
> + { 0x452, "stm32f7" },
> + { 0 },
> +};
> +
>  int arch_cpu_init(void)
>  {
>   int i;
> @@ -54,3 +78,25 @@ int arch_cpu_init(void)
>  
>   return 0;
>  }
> +
> +int get_cpu_id(void)
> +{
> + return readl(STM32_DBGMCU_IDCODE) & STM32_DBGMCU_IDCODE_DEV_ID;
> +}
> +
> +void set_env_soc_name(int cpu_id)
> +{
> + char soc[16];
> + int i;
> +
> + memset(soc, '\0', sizeof(soc));

do we need it ?

Cheers,
Vikas

> +
> + for (i = 0; i < sizeof(stm32_cpu_id_table); i++) {
> + if (stm32_cpu_id_table[i].id == cpu_id) {
> + snprintf(soc, sizeof(soc), stm32_cpu_id_table[i].name);
> + break;
> + }
> + }
> +
> + env_set("soc_name", soc);
> +}
> 
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Re: [U-Boot] [PATCH 2/3] clk: clk_stm32f: Remove STMMAC clock setup

[Vikas Manocha]

Hi,

On 01/17/2018 12:46 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> Thanks to 'commit ba1f96672522 ("net: designware: add clock support")'
> we don't need anymore to setup the STMMAC clock in board.
> 
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>

Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> ---
>  arch/arm/include/asm/arch-stm32f7/stm32_periph.h | 1 -
>  board/st/stm32f746-disco/stm32f746-disco.c   | 1 -
>  drivers/clk/clk_stm32f.c | 6 --
>  3 files changed, 8 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h 
> b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
> index ae0faef..13f9c9b 100644
> --- a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
> +++ b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
> @@ -23,7 +23,6 @@ enum periph_id {
>  enum periph_clock {
>   SYSCFG_CLOCK_CFG,
>   TIMER2_CLOCK_CFG,
> - STMMAC_CLOCK_CFG,
>  };
>  
>  #endif /* __ASM_ARM_ARCH_PERIPH_H */
> diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
> b/board/st/stm32f746-disco/stm32f746-disco.c
> index 2e8aa86..58a5ef0 100644
> --- a/board/st/stm32f746-disco/stm32f746-disco.c
> +++ b/board/st/stm32f746-disco/stm32f746-disco.c
> @@ -75,7 +75,6 @@ static int stmmac_setup(void)
>   clock_setup(SYSCFG_CLOCK_CFG);
>   /* Set >RMII mode */
>   STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
> - clock_setup(STMMAC_CLOCK_CFG);
>  
>   return 0;
>  }
> diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
> index 63116e0..d0c7a90 100644
> --- a/drivers/clk/clk_stm32f.c
> +++ b/drivers/clk/clk_stm32f.c
> @@ -90,7 +90,6 @@
>  enum periph_clock {
>   SYSCFG_CLOCK_CFG,
>   TIMER2_CLOCK_CFG,
> - STMMAC_CLOCK_CFG,
>  };
>  
>  struct stm32_clk_info stm32f4_clk_info = {
> @@ -359,11 +358,6 @@ void clock_setup(int peripheral)
>   case TIMER2_CLOCK_CFG:
>   setbits_le32(_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
>   break;
> - case STMMAC_CLOCK_CFG:
> - setbits_le32(_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_EN);
> - setbits_le32(_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_RX_EN);
> - setbits_le32(_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_TX_EN);
> - break;
>   default:
>   break;
>   }
> 
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Re: [U-Boot] [PATCH 3/3] clk: clk_stm32f: Move SYSCFG clock setup into configure_clocks()

[Vikas Manocha]

Hi Patrice,

On 01/17/2018 12:46 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard 
> 
> Move SYSCFG clock setup into configure_clocks() instead of calling
> clock_setup() from drivers.

It is in board configuration.

> Move the RMII setup from board_early_init_f() to board_init()
> to insure that RMII bit is set only when clock driver is initialized.
> 
> Signed-off-by: Patrice Chotard 
> ---
>  arch/arm/include/asm/arch-stm32f7/stm32_periph.h |  1 -
>  board/st/stm32f746-disco/stm32f746-disco.c   | 19 ++-
>  drivers/clk/clk_stm32f.c | 10 --
>  3 files changed, 10 insertions(+), 20 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h 
> b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
> index 13f9c9b..7b8f66a 100644
> --- a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
> +++ b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
> @@ -21,7 +21,6 @@ enum periph_id {
>  };
>  
>  enum periph_clock {
> - SYSCFG_CLOCK_CFG,
>   TIMER2_CLOCK_CFG,
>  };
>  
> diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
> b/board/st/stm32f746-disco/stm32f746-disco.c
> index 58a5ef0..8da7028 100644
> --- a/board/st/stm32f746-disco/stm32f746-disco.c
> +++ b/board/st/stm32f746-disco/stm32f746-disco.c
> @@ -69,23 +69,10 @@ int dram_init_banksize(void)
>   return 0;
>  }
>  
> -#ifdef CONFIG_ETH_DESIGNWARE
> -static int stmmac_setup(void)
> -{
> - clock_setup(SYSCFG_CLOCK_CFG);
> - /* Set >RMII mode */
> - STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
> -
> - return 0;
> -}
> -
>  int board_early_init_f(void)
>  {
> - stmmac_setup();
> -
>   return 0;
>  }
> -#endif
>  
>  #ifdef CONFIG_SPL_BUILD
>  #ifdef CONFIG_SPL_OS_BOOT
> @@ -162,5 +149,11 @@ int board_late_init(void)
>  int board_init(void)
>  {
>   gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
> +
> +#ifdef CONFIG_ETH_DESIGNWARE
> + /* Set >RMII mode */
> + STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
> +#endif
> +
>   return 0;
>  }
> diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
> index d0c7a90..1ae5b70 100644
> --- a/drivers/clk/clk_stm32f.c
> +++ b/drivers/clk/clk_stm32f.c
> @@ -67,8 +67,6 @@
>  #define RCC_DCKCFGRX_SDMMC1SEL   BIT(28)
>  #define RCC_DCKCFGR2_SDMMC2SEL   BIT(29)
>  
> -#define RCC_APB2ENR_SAI1EN   BIT(22)
> -
>  /*
>   * RCC AHB1ENR specific definitions
>   */
> @@ -86,9 +84,9 @@
>   * RCC APB2ENR specific definitions
>   */
>  #define RCC_APB2ENR_SYSCFGEN BIT(14)
> +#define RCC_APB2ENR_SAI1EN   BIT(22)
>  
>  enum periph_clock {
> - SYSCFG_CLOCK_CFG,
>   TIMER2_CLOCK_CFG,
>  };
>  
> @@ -227,6 +225,9 @@ static int configure_clocks(struct udevice *dev)
>   /* gate the SAI clock, needed for MMC 1&2 clocks */
>   setbits_le32(>apb2enr, RCC_APB2ENR_SAI1EN);
>  
> + /* gate the SYSCFG clock, needed to set RMII ethernet interface */

RMII interface only required for f746 disco board.

> + setbits_le32(>apb2enr, RCC_APB2ENR_SYSCFGEN);

RMII & Syscfg is board specific requirement, here it will configure it for all 
stm32f devices.

Cheers,
Vikas

> +
>   return 0;
>  }
>  
> @@ -352,9 +353,6 @@ static int stm32_clk_enable(struct clk *clk)
>  void clock_setup(int peripheral)
>  {
>   switch (peripheral) {
> - case SYSCFG_CLOCK_CFG:
> - setbits_le32(_RCC->apb2enr, RCC_APB2ENR_SYSCFGEN);
> - break;
>   case TIMER2_CLOCK_CFG:
>   setbits_le32(_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
>   break;
> 
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Re: [U-Boot] [PATCH 1/3] ARM: dts: stm32: Add STMMAC clocks for stm32f746

[Vikas Manocha]

Hi,

On 01/17/2018 12:46 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> Add ETHMAC, ETHMACRX and ETHMACTX clocks for STMMAC.
> 
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>

Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> ---
>  arch/arm/dts/stm32f746.dtsi | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
> index 929bf82..46d148e 100644
> --- a/arch/arm/dts/stm32f746.dtsi
> +++ b/arch/arm/dts/stm32f746.dtsi
> @@ -65,6 +65,9 @@
>   compatible = "st,stm32-dwmac";
>   reg = <0x40028000 0x8000>;
>   reg-names = "stmmaceth";
> + clocks = < 0 STM32F7_AHB1_CLOCK(ETHMAC)>,
> +  < 0 STM32F7_AHB1_CLOCK(ETHMACTX)>,
> +  < 0 STM32F7_AHB1_CLOCK(ETHMACRX)>;
>   interrupts = <61>, <62>;
>   interrupt-names = "macirq", "eth_wake_irq";
>   snps,pbl = <8>;
> 
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Re: [U-Boot] [PATCH 2/2] configs: stm32: move config flag from defconfig to Kconfig

[Vikas Manocha]

Hi,

On 01/12/2018 12:23 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> Move system flags from defconfig to mach-stm32/Kconfig
> 
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>

Reviewed-by: Vikas Manocha <vikas.mano...@st.com>
One comment below 


> ---
>  arch/arm/mach-stm32/Kconfig   | 22 ++
>  configs/stm32f429-discovery_defconfig | 11 ---
>  configs/stm32f469-discovery_defconfig | 11 ---
>  configs/stm32f746-disco_defconfig | 11 ---
>  4 files changed, 22 insertions(+), 33 deletions(-)
> 
> diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
> index f4c93f1..5f7a2b5 100644
> --- a/arch/arm/mach-stm32/Kconfig
> +++ b/arch/arm/mach-stm32/Kconfig
> @@ -2,9 +2,31 @@ if STM32
>  
>  config STM32F4
>   bool "stm32f4 family"
> + select CLK
> + select DM_GPIO
> + select DM_RESET
> + select MISC
> + select PINCTRL
> + select PINCTRL_STM32
> + select RAM
> + select STM32_SDRAM
> + select STM32_RCC
> + select STM32_RESET
> + select STM32_SERIAL
>  
>  config STM32F7
>   bool "stm32f7 family"
> + select CLK
> + select DM_GPIO
> + select DM_RESET
> + select MISC
> + select PINCTRL
> + select PINCTRL_STM32
> + select RAM
> + select STM32_SDRAM
> + select STM32_RCC
> + select STM32_RESET
> + select STM32_SERIAL

Can you have one common selection(like STM32_SERIAL) like under 'if STM32'.

Cheers,
Vikas

>   select SUPPORT_SPL
>   select SPL
>   select SPL_CLK
> diff --git a/configs/stm32f429-discovery_defconfig 
> b/configs/stm32f429-discovery_defconfig
> index 6f7a12f..ec67aad 100644
> --- a/configs/stm32f429-discovery_defconfig
> +++ b/configs/stm32f429-discovery_defconfig
> @@ -19,16 +19,5 @@ CONFIG_CMD_TIMER=y
>  CONFIG_OF_CONTROL=y
>  CONFIG_OF_EMBED=y
>  CONFIG_ENV_IS_IN_FLASH=y
> -CONFIG_CLK=y
> -CONFIG_DM_GPIO=y
> -CONFIG_MISC=y
> -CONFIG_STM32_RCC=y
>  # CONFIG_MMC is not set
>  CONFIG_MTD_NOR_FLASH=y
> -CONFIG_PINCTRL=y
> -CONFIG_PINCTRL_STM32=y
> -CONFIG_RAM=y
> -CONFIG_STM32_SDRAM=y
> -CONFIG_DM_RESET=y
> -CONFIG_STM32_RESET=y
> -CONFIG_STM32_SERIAL=y
> diff --git a/configs/stm32f469-discovery_defconfig 
> b/configs/stm32f469-discovery_defconfig
> index 5b70aa9..8190b82 100644
> --- a/configs/stm32f469-discovery_defconfig
> +++ b/configs/stm32f469-discovery_defconfig
> @@ -26,17 +26,6 @@ CONFIG_CMD_FS_GENERIC=y
>  CONFIG_OF_CONTROL=y
>  CONFIG_OF_EMBED=y
>  # CONFIG_BLK is not set
> -CONFIG_CLK=y
> -CONFIG_DM_GPIO=y
> -CONFIG_MISC=y
> -CONFIG_STM32_RCC=y
>  CONFIG_DM_MMC=y
>  CONFIG_ARM_PL180_MMCI=y
>  CONFIG_MTD_NOR_FLASH=y
> -CONFIG_PINCTRL=y
> -CONFIG_PINCTRL_STM32=y
> -CONFIG_RAM=y
> -CONFIG_STM32_SDRAM=y
> -CONFIG_DM_RESET=y
> -CONFIG_STM32_RESET=y
> -CONFIG_STM32_SERIAL=y
> diff --git a/configs/stm32f746-disco_defconfig 
> b/configs/stm32f746-disco_defconfig
> index 69df866..f8fa198 100644
> --- a/configs/stm32f746-disco_defconfig
> +++ b/configs/stm32f746-disco_defconfig
> @@ -39,10 +39,6 @@ CONFIG_OF_CONTROL=y
>  CONFIG_NET_RANDOM_ETHADDR=y
>  CONFIG_NETCONSOLE=y
>  # CONFIG_BLK is not set
> -CONFIG_CLK=y
> -CONFIG_DM_GPIO=y
> -CONFIG_MISC=y
> -CONFIG_STM32_RCC=y
>  CONFIG_DM_MMC=y
>  # CONFIG_SPL_DM_MMC is not set
>  CONFIG_ARM_PL180_MMCI=y
> @@ -53,14 +49,7 @@ CONFIG_SPI_FLASH=y
>  CONFIG_SPI_FLASH_STMICRO=y
>  CONFIG_DM_ETH=y
>  CONFIG_ETH_DESIGNWARE=y
> -CONFIG_PINCTRL=y
>  # CONFIG_PINCTRL_FULL is not set
> -CONFIG_PINCTRL_STM32=y
> -CONFIG_RAM=y
> -CONFIG_STM32_SDRAM=y
> -CONFIG_DM_RESET=y
> -CONFIG_STM32_RESET=y
> -CONFIG_STM32_SERIAL=y
>  CONFIG_DM_SPI=y
>  CONFIG_STM32_QSPI=y
>  CONFIG_OF_LIBFDT_OVERLAY=y
> 
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Re: [U-Boot] [PATCH 1/2] serial: stm32: Rename serial_stm32x7.c to serial_stm32.c

[Vikas Manocha]

Hi,

On 01/12/2018 12:23 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> Now this driver is used across stm32f4, stm32f7 and stm32h7
> SoCs family, give it a generic name.
> 
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>

Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> ---
>  arch/arm/mach-stm32/Kconfig | 2 +-
>  configs/stm32f429-discovery_defconfig   | 2 +-
>  configs/stm32f469-discovery_defconfig   | 2 +-
>  configs/stm32f746-disco_defconfig   | 2 +-
>  drivers/serial/Kconfig  | 2 +-
>  drivers/serial/Makefile | 2 +-
>  drivers/serial/{serial_stm32x7.c => serial_stm32.c} | 4 ++--
>  drivers/serial/{serial_stm32x7.h => serial_stm32.h} | 4 ++--
>  8 files changed, 10 insertions(+), 10 deletions(-)
>  rename drivers/serial/{serial_stm32x7.c => serial_stm32.c} (98%)
>  rename drivers/serial/{serial_stm32x7.h => serial_stm32.h} (97%)
> 
> diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
> index b618b60..f4c93f1 100644
> --- a/arch/arm/mach-stm32/Kconfig
> +++ b/arch/arm/mach-stm32/Kconfig
> @@ -38,7 +38,7 @@ config STM32H7
>   select STM32_SDRAM
>   select STM32_RCC
>   select STM32_RESET
> - select STM32X7_SERIAL
> + select STM32_SERIAL
>   select SYSCON
>  
>  source "arch/arm/mach-stm32/stm32f4/Kconfig"
> diff --git a/configs/stm32f429-discovery_defconfig 
> b/configs/stm32f429-discovery_defconfig
> index 52bd931..6f7a12f 100644
> --- a/configs/stm32f429-discovery_defconfig
> +++ b/configs/stm32f429-discovery_defconfig
> @@ -31,4 +31,4 @@ CONFIG_RAM=y
>  CONFIG_STM32_SDRAM=y
>  CONFIG_DM_RESET=y
>  CONFIG_STM32_RESET=y
> -CONFIG_STM32X7_SERIAL=y
> +CONFIG_STM32_SERIAL=y
> diff --git a/configs/stm32f469-discovery_defconfig 
> b/configs/stm32f469-discovery_defconfig
> index afffddf..5b70aa9 100644
> --- a/configs/stm32f469-discovery_defconfig
> +++ b/configs/stm32f469-discovery_defconfig
> @@ -39,4 +39,4 @@ CONFIG_RAM=y
>  CONFIG_STM32_SDRAM=y
>  CONFIG_DM_RESET=y
>  CONFIG_STM32_RESET=y
> -CONFIG_STM32X7_SERIAL=y
> +CONFIG_STM32_SERIAL=y
> diff --git a/configs/stm32f746-disco_defconfig 
> b/configs/stm32f746-disco_defconfig
> index 321321f..69df866 100644
> --- a/configs/stm32f746-disco_defconfig
> +++ b/configs/stm32f746-disco_defconfig
> @@ -60,7 +60,7 @@ CONFIG_RAM=y
>  CONFIG_STM32_SDRAM=y
>  CONFIG_DM_RESET=y
>  CONFIG_STM32_RESET=y
> -CONFIG_STM32X7_SERIAL=y
> +CONFIG_STM32_SERIAL=y
>  CONFIG_DM_SPI=y
>  CONFIG_STM32_QSPI=y
>  CONFIG_OF_LIBFDT_OVERLAY=y
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index 122b8e7..7b20b47 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -529,7 +529,7 @@ config STI_ASC_SERIAL
> on STiH410 SoC. This is a basic implementation,  it supports
> following baudrate 9600, 19200, 38400, 57600 and 115200.
>  
> -config STM32X7_SERIAL
> +config STM32_SERIAL
>   bool "STMicroelectronics STM32 SoCs on-chip UART"
>   depends on DM_SERIAL && (STM32F4 || STM32F7 || STM32H7)
>   help
> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> index 7adcee3..5ef603a 100644
> --- a/drivers/serial/Makefile
> +++ b/drivers/serial/Makefile
> @@ -44,7 +44,7 @@ obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
>  obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
>  obj-$(CONFIG_STI_ASC_SERIAL) += serial_sti_asc.o
>  obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
> -obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
> +obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
>  obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
>  obj-$(CONFIG_MSM_SERIAL) += serial_msm.o
>  obj-$(CONFIG_MVEBU_A3700_UART) += serial_mvebu_a3700.o
> diff --git a/drivers/serial/serial_stm32x7.c b/drivers/serial/serial_stm32.c
> similarity index 98%
> rename from drivers/serial/serial_stm32x7.c
> rename to drivers/serial/serial_stm32.c
> index d1580e3..286b954 100644
> --- a/drivers/serial/serial_stm32x7.c
> +++ b/drivers/serial/serial_stm32.c
> @@ -11,7 +11,7 @@
>  #include 
>  #include 
>  #include 
> -#include "serial_stm32x7.h"
> +#include "serial_stm32.h"
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> @@ -148,7 +148,7 @@ static const struct dm_serial_ops stm32_serial_ops = {
>  };
>  
>  U_BOOT_DRIVER(serial_stm32) = {
> - .name = "serial_stm32x7",
> + .name = "serial_stm32",
>   .id = UCLASS_SERIAL,
>   .of_match = of_match_ptr(stm32_serial_id),
> 

Re: [U-Boot] [PATCH] mach-stm32: Factorize MPU's region config for STM32 SoCs

[Vikas Manocha]

looks good,

On 11/15/2017 11:59 PM, patrice.chot...@st.com wrote:
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> MPU's region setup can be factorized between STM32F4/F7/H7 SoCs family
> and used a common MPU's region config.
> 
> Only one exception for STM32H7 which doesn't have device area
> located at 0xA000 .
> 
> For STM32F4, configure_clocks() need to be moved from arch_cpu_init()
> to board_early_init_f().
> 
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>

Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> ---
>  arch/arm/mach-stm32/Makefile   |  3 +-
>  arch/arm/mach-stm32/{stm32h7 => }/soc.c| 25 +--
>  arch/arm/mach-stm32/stm32f4/Makefile   |  2 +-
>  arch/arm/mach-stm32/stm32f4/soc.c  | 41 --
>  arch/arm/mach-stm32/stm32f7/Makefile   |  2 +-
>  arch/arm/mach-stm32/stm32f7/soc.c  | 49 
> --
>  arch/arm/mach-stm32/stm32h7/Makefile   |  8 
>  board/st/stm32f429-discovery/stm32f429-discovery.c |  2 +
>  8 files changed, 16 insertions(+), 116 deletions(-)
>  rename arch/arm/mach-stm32/{stm32h7 => }/soc.c (75%)
>  delete mode 100644 arch/arm/mach-stm32/stm32f4/soc.c
>  delete mode 100644 arch/arm/mach-stm32/stm32f7/soc.c
>  delete mode 100644 arch/arm/mach-stm32/stm32h7/Makefile
> 
> diff --git a/arch/arm/mach-stm32/Makefile b/arch/arm/mach-stm32/Makefile
> index 0f5ac37..c2806af 100644
> --- a/arch/arm/mach-stm32/Makefile
> +++ b/arch/arm/mach-stm32/Makefile
> @@ -4,7 +4,6 @@
>  #
>  # SPDX-License-Identifier:   GPL-2.0+
>  #
> -
> +obj-y += soc.o
>  obj-$(CONFIG_STM32F4) += stm32f4/
>  obj-$(CONFIG_STM32F7) += stm32f7/
> -obj-$(CONFIG_STM32H7) += stm32h7/
> diff --git a/arch/arm/mach-stm32/stm32h7/soc.c b/arch/arm/mach-stm32/soc.c
> similarity index 75%
> rename from arch/arm/mach-stm32/stm32h7/soc.c
> rename to arch/arm/mach-stm32/soc.c
> index 692dbcc..df20d54 100644
> --- a/arch/arm/mach-stm32/stm32h7/soc.c
> +++ b/arch/arm/mach-stm32/soc.c
> @@ -9,11 +9,6 @@
>  #include 
>  #include 
>  
> -u32 get_cpu_rev(void)
> -{
> - return 0;
> -}
> -
>  int arch_cpu_init(void)
>  {
>   int i;
> @@ -30,11 +25,11 @@ int arch_cpu_init(void)
>   { 0x, REGION_0, XN_DIS, PRIV_RW_USR_RW,
>   O_I_WB_RD_WR_ALLOC, REGION_4GB },
>  
> - /* Code area, executable & strongly ordered */
> - { 0xD000, REGION_1, XN_EN, PRIV_RW_USR_RW,
> - STRONG_ORDER, REGION_8MB },
> + /* armv7m code area */
> + { 0x, REGION_1, XN_DIS, PRIV_RW_USR_RW,
> + STRONG_ORDER, REGION_512MB },
>  
> - /* Device area in all H7 : Not executable */
> + /* Device area : Not executable */
>   { 0x4000, REGION_2, XN_EN, PRIV_RW_USR_RW,
>   DEVICE_NON_SHARED, REGION_512MB },
>  
> @@ -42,8 +37,14 @@ int arch_cpu_init(void)
>* Armv7m fixed configuration: strongly ordered & not
>* executable, not cacheable
>*/
> - { 0xE000, REGION_4, XN_EN, PRIV_RW_USR_RW,
> + { 0xE000, REGION_3, XN_EN, PRIV_RW_USR_RW,
>   STRONG_ORDER, REGION_512MB },
> +
> +#if !defined(CONFIG_STM32H7)
> + /* Device area : Not executable */
> + { 0xA000, REGION_4, XN_EN, PRIV_RW_USR_RW,
> + DEVICE_NON_SHARED, REGION_512MB },
> +#endif
>   };
>  
>   disable_mpu();
> @@ -53,7 +54,3 @@ int arch_cpu_init(void)
>  
>   return 0;
>  }
> -
> -void s_init(void)
> -{
> -}
> diff --git a/arch/arm/mach-stm32/stm32f4/Makefile 
> b/arch/arm/mach-stm32/stm32f4/Makefile
> index 020e783..63db820 100644
> --- a/arch/arm/mach-stm32/stm32f4/Makefile
> +++ b/arch/arm/mach-stm32/stm32f4/Makefile
> @@ -8,4 +8,4 @@
>  # SPDX-License-Identifier:   GPL-2.0+
>  #
>  
> -obj-y += soc.o clock.o timer.o
> +obj-y += clock.o timer.o
> diff --git a/arch/arm/mach-stm32/stm32f4/soc.c 
> b/arch/arm/mach-stm32/stm32f4/soc.c
> deleted file mode 100644
> index 9eb655a..000
> --- a/arch/arm/mach-stm32/stm32f4/soc.c
> +++ /dev/null
> @@ -1,41 +0,0 @@
> -/*
> - * (C) Copyright 2015
> - * Kamil Lulko, <kamil.lu...@gmail.com>
> - *
> - * SPDX-License-Identifier:  GPL-2.0+
> - */
> -
> -#include 
> -#include 
> -#include 
> -#include 
> -
> -u32 get_cpu_rev(void)
> -{
> - return 0;
> -}
> -
> -int arch_cpu_init(void)
> -{
> - struct mpu_region_config stm32_reg

Re: [U-Boot] [PATCH 00/11] Extend clk_stm32f7 driver

[Vikas Manocha]

LGTM.

Cheers,
Vikas

On 11/15/2017 04:14 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard 
> 
> It's the second step to prepare STM32F4 conversion to driver model and 
> device tree support. STM32F4 and STM32F7 RCC IPs are similar, differences
> between these 2 SoCs can be managed with different compatible string and
> allows to use a common clock driver. 
> 
> This series update the clk_stm32f7 driver :
>   _ retrieve PWR IP base address from DT instead of using hardcoded value.
>   _ update compatible string to manage differences between STM32F4 and
> STM32F7
>   _ introduce STM32F4 support.
>   _ enable RCC MFD support which allows reset support for STM32F7/F4.
>   _ add MMC clock configuration for MMC usag for STM32F4/F7.
>   _ migrate some defines/struct to common include/stm32_rcc.h to 
> factorize code between STM32F4/F7.
> 
> Patrice Chotard (11):
>   ARM: DTS: stm32: add pwrcfg node for stm32f746
>   clk: stm32f7: retrieve PWR base address from DT
>   clk: stm32f7: add dedicated STM32F7 compatible string
>   ARM: DTS: stm32: update rcc compatible for STM32F746
>   clk: stm32f7: add STM32F4 support
>   clk: stm32f7: rename clk_stm32f7.c to clk_stm32f.c
>   clk: stm32fx: migrate define from rcc.h to driver
>   configs: stm32f746-disco: enable MISC/DM_RESET/STM32_RESET and
> STM32_RCC
>   dm: misc: bind STM32F4/F7 clock from rcc MFD driver
>   clk: clk_stm32fx: add clock configuration for mmc usage
>   stm32: migrate clock structs in include/stm32_rcc.h
> 
>  arch/arm/dts/stm32f7-u-boot.dtsi   |   4 +
>  arch/arm/dts/stm32f746.dtsi|   9 +-
>  arch/arm/include/asm/arch-stm32f4/stm32.h  |  35 ---
>  arch/arm/include/asm/arch-stm32f4/stm32_pwr.h  |  23 ++
>  arch/arm/include/asm/arch-stm32f7/rcc.h|  31 ---
>  arch/arm/include/asm/arch-stm32f7/stm32.h  |  41 
>  arch/arm/include/asm/arch-stm32f7/stm32_pwr.h  |  25 ++
>  arch/arm/mach-stm32/stm32f4/clock.c|  27 +-
>  arch/arm/mach-stm32/stm32f4/timer.c|   1 +
>  arch/arm/mach-stm32/stm32f7/timer.c|   1 +
>  board/st/stm32f429-discovery/stm32f429-discovery.c |   1 +
>  configs/stm32f746-disco_defconfig  |   4 +
>  drivers/clk/Kconfig|   8 +
>  drivers/clk/Makefile   |   2 +-
>  drivers/clk/{clk_stm32f7.c => clk_stm32f.c}| 272 
> +++--
>  drivers/misc/stm32_rcc.c   |  42 +++-
>  include/dt-bindings/mfd/stm32f7-rcc.h  |   1 +
>  include/stm32_rcc.h|  91 +++
>  18 files changed, 401 insertions(+), 217 deletions(-)
>  create mode 100644 arch/arm/include/asm/arch-stm32f4/stm32_pwr.h
>  delete mode 100644 arch/arm/include/asm/arch-stm32f7/rcc.h
>  create mode 100644 arch/arm/include/asm/arch-stm32f7/stm32_pwr.h
>  rename drivers/clk/{clk_stm32f7.c => clk_stm32f.c} (56%)
>  create mode 100644 include/stm32_rcc.h
> 
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Re: [U-Boot] [PATCH] mach-stm32: Fix mpu region's attribute for STM32H7

[Vikas MANOCHA]

Hi Patrice,

Cheers,
Vikas

> -Original Message-
> From: Patrice CHOTARD
> Sent: Tuesday, November 14, 2017 12:41 AM
> To: Vikas MANOCHA <vikas.mano...@st.com>; u-boot@lists.denx.de; 
> albert.u.b...@aribaud.net; s...@chromium.org
> Cc: Patrick DELAUNAY <patrick.delau...@st.com>; Christophe KERELLO 
> <christophe.kere...@st.com>
> Subject: Re: [PATCH] mach-stm32: Fix mpu region's attribute for STM32H7
> 
> Hi Vikas
> 
> On 11/14/2017 03:16 AM, Vikas MANOCHA wrote:
> > Hi Patrice,
> >
> >> -Original Message-
> >> From: Patrice CHOTARD
> >> Sent: Monday, November 13, 2017 8:26 AM
> >> To: u-boot@lists.denx.de; albert.u.b...@aribaud.net;
> >> s...@chromium.org; Vikas MANOCHA <vikas.mano...@st.com>
> >> Cc: Patrice CHOTARD <patrice.chot...@st.com>; Patrick DELAUNAY
> >> <patrick.delau...@st.com>; Christophe KERELLO
> >> <christophe.kere...@st.com>
> >> Subject: [PATCH] mach-stm32: Fix mpu region's attribute for STM32H7
> >>
> >> From: Patrice Chotard <patrice.chot...@st.com>
> >>
> >> The SDRAM region was setup with the wrong attributes.
> >> It must be set to :
> >>_ XN_EN (Execution of an instruction fetched from this region permitted)
> >>_ O_I_WB_RD_WR_ALLOC (Outer and inner write-back, write and read
> >> allocate)
> >>
> >
> > H7 mpu configuration seems same as F7, can we have one config for F7 & H7.
> 
> Between F7 and H7, there is one difference regarding the F7's region 3 which 
> is not needed on H7 because FMC/QSPI registers are
> located inside H7's region 2.

Yes, that’s correct. Any way we can handle it at one place.
In any case, for easy maintenance let's keep the same configuration/code for 
two with this above exception.

> 
> Just one question about F7's region 1, why is it only 512MB and not 1GB long, 
> to include ITCM and DTCM area ? (see Embedded SRAM
> chapter of
> RM0385 Reference manual)

because 512MB (0x2000_) is size of armv7m code area.

Cheers,
Vikas

> 
> Nevertheless, i just notice that for H7, i can remove region 1 which overlaps 
> region 0 with exactly the same attribute.
> 
> Thanks
> 
> >
> >> This fixes hard fault when trying to load and execute kernel linux in this 
> >> area.
> >>
> >> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>
> >
> > In any case,
> > Reviewed-by: Vikas Manocha <vikas.mano...@st.com>
> >
> > Cheers,
> > Vikas
> >
> >> ---
> >>   arch/arm/mach-stm32/stm32h7/soc.c | 9 ++---
> >>   1 file changed, 6 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/arch/arm/mach-stm32/stm32h7/soc.c
> >> b/arch/arm/mach-stm32/stm32h7/soc.c
> >> index 692dbcc..e0d3f11 100644
> >> --- a/arch/arm/mach-stm32/stm32h7/soc.c
> >> +++ b/arch/arm/mach-stm32/stm32h7/soc.c
> >> @@ -30,9 +30,12 @@ int arch_cpu_init(void)
> >>{ 0x, REGION_0, XN_DIS, PRIV_RW_USR_RW,
> >>O_I_WB_RD_WR_ALLOC, REGION_4GB },
> >>
> >> -  /* Code area, executable & strongly ordered */
> >> -  { 0xD000, REGION_1, XN_EN, PRIV_RW_USR_RW,
> >> -  STRONG_ORDER, REGION_8MB },
> >> +  /*
> >> +   * Code area, executable, Outer and inner write-back,
> >> +   * no write allocate
> >> +   */
> >> +  { 0xD000, REGION_1, XN_DIS, PRIV_RW_USR_RW,
> >> +  O_I_WB_RD_WR_ALLOC, REGION_32MB },
> >>
> >>/* Device area in all H7 : Not executable */
> >>{ 0x4000, REGION_2, XN_EN, PRIV_RW_USR_RW,
> >> --
> >> 1.9.1
> >
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Re: [U-Boot] [PATCH] mach-stm32: Fix mpu region's attribute for STM32H7

[Vikas MANOCHA]

Hi Patrice,

> -Original Message-
> From: Patrice CHOTARD
> Sent: Monday, November 13, 2017 8:26 AM
> To: u-boot@lists.denx.de; albert.u.b...@aribaud.net; s...@chromium.org; Vikas 
> MANOCHA <vikas.mano...@st.com>
> Cc: Patrice CHOTARD <patrice.chot...@st.com>; Patrick DELAUNAY 
> <patrick.delau...@st.com>; Christophe KERELLO
> <christophe.kere...@st.com>
> Subject: [PATCH] mach-stm32: Fix mpu region's attribute for STM32H7
> 
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> The SDRAM region was setup with the wrong attributes.
> It must be set to :
>   _ XN_EN (Execution of an instruction fetched from this region permitted)
>   _ O_I_WB_RD_WR_ALLOC (Outer and inner write-back, write and read allocate)
> 

H7 mpu configuration seems same as F7, can we have one config for F7 & H7.

> This fixes hard fault when trying to load and execute kernel linux in this 
> area.
> 
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>

In any case,
Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> ---
>  arch/arm/mach-stm32/stm32h7/soc.c | 9 ++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/mach-stm32/stm32h7/soc.c 
> b/arch/arm/mach-stm32/stm32h7/soc.c
> index 692dbcc..e0d3f11 100644
> --- a/arch/arm/mach-stm32/stm32h7/soc.c
> +++ b/arch/arm/mach-stm32/stm32h7/soc.c
> @@ -30,9 +30,12 @@ int arch_cpu_init(void)
>   { 0x, REGION_0, XN_DIS, PRIV_RW_USR_RW,
>   O_I_WB_RD_WR_ALLOC, REGION_4GB },
> 
> - /* Code area, executable & strongly ordered */
> - { 0xD000, REGION_1, XN_EN, PRIV_RW_USR_RW,
> - STRONG_ORDER, REGION_8MB },
> + /*
> +  * Code area, executable, Outer and inner write-back,
> +  * no write allocate
> +  */
> + { 0xD000, REGION_1, XN_DIS, PRIV_RW_USR_RW,
> + O_I_WB_RD_WR_ALLOC, REGION_32MB },
> 
>   /* Device area in all H7 : Not executable */
>   { 0x4000, REGION_2, XN_EN, PRIV_RW_USR_RW,
> --
> 1.9.1

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Re: [U-Boot] [PATCH 2/2] dm: clk: fix PWR_CR3 register's bit 2 name

[Vikas MANOCHA]

Hi,

> -Original Message-
> From: Patrice CHOTARD
> Sent: Monday, October 09, 2017 2:41 AM
> To: u-boot@lists.denx.de; albert.u.b...@aribaud.net; s...@chromium.org; Vikas 
> MANOCHA <vikas.mano...@st.com>
> Cc: Patrice CHOTARD <patrice.chot...@st.com>; Patrick DELAUNAY 
> <patrick.delau...@st.com>; Christophe KERELLO
> <christophe.kere...@st.com>
> Subject: [PATCH 2/2] dm: clk: fix PWR_CR3 register's bit 2 name
> 
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> Fix bit 2 name of PWR_CR3 register to match with the last STM32H7 reference 
> manual available here :
> 
> http://www.st.com/content/st_com/en/support/resources/
> resource-selector.html?querycriteria=productId=SS1951$$
> resourceCategory=technical_literature$$resourceType=reference_manual
> 
> Update also comment about voltage scaling 1 values
> 
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>

Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> ---
>  drivers/clk/clk_stm32h7.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/clk/clk_stm32h7.c b/drivers/clk/clk_stm32h7.c index 
> 9ca497a..ffa902d 100644
> --- a/drivers/clk/clk_stm32h7.c
> +++ b/drivers/clk/clk_stm32h7.c
> @@ -109,7 +109,7 @@ DECLARE_GLOBAL_DATA_PTR;
>  #define  QSPISRC_PER_CK  3
> 
>  #define PWR_CR3  0x0c
> -#define PWR_CR3_SDEN BIT(2)
> +#define PWR_CR3_SCUENBIT(2)
>  #define PWR_D3CR 0x18
>  #define PWR_D3CR_VOS_MASKGENMASK(15, 14)
>  #define PWR_D3CR_VOS_SHIFT   14
> @@ -361,11 +361,11 @@ int configure_clocks(struct udevice *dev)
>   writel(0x0, >d2ccip1r);
>   writel(0x0, >d2ccip2r);
> 
> - /* Set voltage scaling at scale 1 */
> + /* Set voltage scaling at scale 1 (1,15 - 1,26 Volts) */
>   clrsetbits_le32(pwr_base + PWR_D3CR, PWR_D3CR_VOS_MASK,
>   VOS_SCALE_1 << PWR_D3CR_VOS_SHIFT);
> - /* disable step down converter */
> - clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_SDEN);
> + /* Lock supply configuration update */
> + clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_SCUEN);
>   while (!(readl(pwr_base + PWR_D3CR) & PWR_D3CR_VOSREADY))
>   ;
> 
> --
> 1.9.1

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Re: [U-Boot] [PATCH 1/2] dm: clk: remove CLK() macro for clk_stm32h7

[Vikas MANOCHA]

Hi,

> -Original Message-
> From: Patrice CHOTARD
> Sent: Monday, October 09, 2017 2:41 AM
> To: u-boot@lists.denx.de; albert.u.b...@aribaud.net; s...@chromium.org; Vikas 
> MANOCHA <vikas.mano...@st.com>
> Cc: Patrice CHOTARD <patrice.chot...@st.com>; Patrick DELAUNAY 
> <patrick.delau...@st.com>; Christophe KERELLO
> <christophe.kere...@st.com>
> Subject: [PATCH 1/2] dm: clk: remove CLK() macro for clk_stm32h7
> 
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> CLK() macro is a residue of a previously reworked patch, remove it.
> 
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>

Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> ---
>  drivers/clk/clk_stm32h7.c | 223 
> ++
>  1 file changed, 108 insertions(+), 115 deletions(-)
> 
> diff --git a/drivers/clk/clk_stm32h7.c b/drivers/clk/clk_stm32h7.c index 
> fd0e3ab..9ca497a 100644
> --- a/drivers/clk/clk_stm32h7.c
> +++ b/drivers/clk/clk_stm32h7.c
> @@ -195,13 +195,6 @@ struct clk_cfg {
>   const char *name;
>  };
> 
> -#define CLK(_gate_offset, _bit_idx, _name) \ -{ \
> - .gate_offset = _gate_offset,\
> - .gate_bit_idx = _bit_idx,\
> - .name = _name,\
> -}
> -
>  /*
>   * the way all these entries are sorted in this array could seem
>   * unlogical, but we are dependant of kernel DT_bindings, @@ -210,114 
> +203,114 @@ struct clk_cfg {
>   */
> 
>  static const struct clk_cfg clk_map[] = {
> - CLK(RCC_AHB3ENR,  31, "d1sram1"),   /* peripheral clocks */
> - CLK(RCC_AHB3ENR,  30, "itcm"),
> - CLK(RCC_AHB3ENR,  29, "dtcm2"),
> - CLK(RCC_AHB3ENR,  28, "dtcm1"),
> - CLK(RCC_AHB3ENR,   8, "flitf"),
> - CLK(RCC_AHB3ENR,   5, "jpgdec"),
> - CLK(RCC_AHB3ENR,   4, "dma2d"),
> - CLK(RCC_AHB3ENR,   0, "mdma"),
> - CLK(RCC_AHB1ENR,  28, "usb2ulpi"),
> - CLK(RCC_AHB1ENR,  17, "eth1rx"),
> - CLK(RCC_AHB1ENR,  16, "eth1tx"),
> - CLK(RCC_AHB1ENR,  15, "eth1mac"),
> - CLK(RCC_AHB1ENR,  14, "art"),
> - CLK(RCC_AHB1ENR,  26, "usb1ulpi"),
> - CLK(RCC_AHB1ENR,   1, "dma2"),
> - CLK(RCC_AHB1ENR,   0, "dma1"),
> - CLK(RCC_AHB2ENR,  31, "d2sram3"),
> - CLK(RCC_AHB2ENR,  30, "d2sram2"),
> - CLK(RCC_AHB2ENR,  29, "d2sram1"),
> - CLK(RCC_AHB2ENR,   5, "hash"),
> - CLK(RCC_AHB2ENR,   4, "crypt"),
> - CLK(RCC_AHB2ENR,   0, "camitf"),
> - CLK(RCC_AHB4ENR,  28, "bkpram"),
> - CLK(RCC_AHB4ENR,  25, "hsem"),
> - CLK(RCC_AHB4ENR,  21, "bdma"),
> - CLK(RCC_AHB4ENR,  19, "crc"),
> - CLK(RCC_AHB4ENR,  10, "gpiok"),
> - CLK(RCC_AHB4ENR,   9, "gpioj"),
> - CLK(RCC_AHB4ENR,   8, "gpioi"),
> - CLK(RCC_AHB4ENR,   7, "gpioh"),
> - CLK(RCC_AHB4ENR,   6, "gpiog"),
> - CLK(RCC_AHB4ENR,   5, "gpiof"),
> - CLK(RCC_AHB4ENR,   4, "gpioe"),
> - CLK(RCC_AHB4ENR,   3, "gpiod"),
> - CLK(RCC_AHB4ENR,   2, "gpioc"),
> - CLK(RCC_AHB4ENR,   1, "gpiob"),
> - CLK(RCC_AHB4ENR,   0, "gpioa"),
> - CLK(RCC_APB3ENR,   6, "wwdg1"),
> - CLK(RCC_APB1LENR, 29, "dac12"),
> - CLK(RCC_APB1LENR, 11, "wwdg2"),
> - CLK(RCC_APB1LENR,  8, "tim14"),
> - CLK(RCC_APB1LENR,  7, "tim13"),
> - CLK(RCC_APB1LENR,  6, "tim12"),
> - CLK(RCC_APB1LENR,  5, "tim7"),
> - CLK(RCC_APB1LENR,  4, "tim6"),
> - CLK(RCC_APB1LENR,  3, "tim5"),
> - CLK(RCC_APB1LENR,  2, "tim4"),
> - CLK(RCC_APB1LENR,  1, "tim3"),
> - CLK(RCC_APB1LENR,  0, "tim2"),
> - CLK(RCC_APB1HENR,  5, "mdios"),
> - CLK(RCC_APB1HENR,  4, "opamp"),
> - CLK(RCC_APB1HENR,  1, "crs"),
> - CLK(RCC_APB2ENR,  18, "tim17"),
> - CLK(RCC_APB2ENR,  17, "tim16"),
> - CLK(RCC_APB2ENR,  16, "tim15"),
> - CLK(RCC_APB2ENR,   1, "tim8"),
> - CLK(RCC_APB2ENR,   0, "tim1"),
> - CLK(RCC_APB4ENR,  26, "tmpsens"),
> - CLK(RCC_APB4ENR,  16, "rtcapb"),
> - CLK(RCC_APB4ENR,  15, "vref"),
> - CLK(RCC_APB4ENR,  14, "comp12"),
> - CLK(RCC_APB4ENR,   1, "syscfg"),
> - CLK(RCC_AHB3ENR,  16, "sdmmc1&q

Re: [U-Boot] [PATCH] ARM: stm32f7: fix prescaler calculation of timer

[Vikas MANOCHA]

> -Original Message-
> From: Bo Shen [mailto:voice.s...@gmail.com]
> Sent: Monday, October 02, 2017 10:48 PM
> To: albert.u.b...@aribaud.net; Vikas MANOCHA <vikas.mano...@st.com>
> Cc: u-boot@lists.denx.de; Bo Shen <voice.s...@gmail.com>
> Subject: [PATCH] ARM: stm32f7: fix prescaler calculation of timer
> 
> As the timer 2 is on APB1 bus, the maximum of clock frequency of APB1 timer 
> clock is half of SYSCLK. Then to calculate the timer
> prescaler for timer 2 which need to be divided by 2.
> 
> Signed-off-by: Bo Shen <voice.s...@gmail.com>

Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> ---
>  arch/arm/mach-stm32/stm32f7/timer.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-stm32/stm32f7/timer.c 
> b/arch/arm/mach-stm32/stm32f7/timer.c
> index c15f8bb..b04c101 100644
> --- a/arch/arm/mach-stm32/stm32f7/timer.c
> +++ b/arch/arm/mach-stm32/stm32f7/timer.c
> @@ -26,7 +26,7 @@ int timer_init(void)
>   /* Stop the timer */
>   writel(readl(_regs_ptr->cr1) & ~GPT_CR1_CEN, _regs_ptr->cr1);
> 
> - writel((CONFIG_SYS_CLK_FREQ/CONFIG_SYS_HZ_CLOCK) - 1,
> + writel((CONFIG_SYS_CLK_FREQ / 2 / CONFIG_SYS_HZ_CLOCK) - 1,
>   _regs_ptr->psc);
> 
>   /* Configure timer for auto-reload */
> --
> 2.7.4

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Re: [U-Boot] [PATCH v1 0/6] Update stm32x7 serial driver

[Vikas MANOCHA]

Hi,

> -Original Message-
> From: Patrice CHOTARD
> Sent: Wednesday, September 27, 2017 6:45 AM
> To: u-boot@lists.denx.de; albert.u.b...@aribaud.net; s...@chromium.org; Vikas 
> MANOCHA <vikas.mano...@st.com>
> Cc: Patrice CHOTARD <patrice.chot...@st.com>; Patrick DELAUNAY 
> <patrick.delau...@st.com>; Christophe KERELLO
> <christophe.kere...@st.com>
> Subject: [PATCH v1 0/6] Update stm32x7 serial driver
> 
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> This series update the serial_stm32x7 driver used by both STM32F7 and STM32H7 
> SoCs :
>   _ clean the code by using BIT and GENMASK macro
>   _ remove useless CLK and OF_CONTROL flags
>   _ add fifo support for H7
>   _ introduce STM32F4 support
> 
> Currently, STM32F4 uses a dedicated serial driver 
> drivers/serial/serial_stm32.c.
> whereas STM32F7 and STM32H7 uses drivers/serial/serial/serial_stm32x7.c .
> There is no reason to have 2 separate serial driver for STM32 SoCs family.
> 
> It's the first step to prepare STM32F4 conversion to driver model and device 
> tree support. Hence this conversion will be done,
> serial_stm32x7.c driver will support alls SoCs (ie F4/F7 and H7) it will be 
> then renamed with the generic name serial_stm32.c

For all series:
Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> 
> Patrice Chotard (6):
>   serial: stm32x7: cleanup code
>   serial: stm32x7: remove stm32f7-usart and stm32h7-usart compatible
>   serial: stm32x7: prepare the ground to STM32F4 support
>   serial: stm32x7: add fifo support for STM32H7
>   serial: stm32x7: add STM32F4 support
>   serial: stm32x7: remove useless CONFIG_CLK and OF_CONTROL flag
> 
>  arch/arm/dts/stm32h743.dtsi |  4 +-
>  drivers/serial/Kconfig  |  4 +-
>  drivers/serial/serial_stm32x7.c | 84 
> ++---
>  drivers/serial/serial_stm32x7.h | 71 +++---
>  4 files changed, 99 insertions(+), 64 deletions(-)
> 
> --
> 1.9.1

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Re: [U-Boot] [PATCH v2 3/9] dm: clk: add clk driver support for stm32h7 SoCs

[Vikas MANOCHA]

Thanks Patrice,

> -Original Message-
> From: Patrice CHOTARD
> Sent: Tuesday, September 26, 2017 5:27 AM
> To: Vikas MANOCHA <vikas.mano...@st.com>; u-boot@lists.denx.de; 
> albert.u.b...@aribaud.net; s...@chromium.org
> Cc: Patrick DELAUNAY <patrick.delau...@st.com>; Christophe KERELLO 
> <christophe.kere...@st.com>
> Subject: Re: [PATCH v2 3/9] dm: clk: add clk driver support for stm32h7 SoCs
> 
> Hi Vikas
> 
> On 09/26/2017 10:51 AM, Patrice CHOTARD wrote:
> > Hi Vikas
> >
> > On 09/25/2017 09:51 AM, Patrice CHOTARD wrote:
> >> Hi Vikas
> >>
> >> On 09/20/2017 03:39 AM, Vikas Manocha wrote:
> >>> Hi Patrice,
> >>>
> >>> On 09/13/2017 09:00 AM, patrice.chot...@st.com wrote:
> >>>> From: Patrice Chotard <patrice.chot...@st.com>
> >>>>
> >>>> This driver implements basic clock setup, only clock gating is
> >>>> implemented.
> >>>>
> >>>> This driver doesn't implement .of_match as it's binded by MFD RCC
> >>>> driver.
> >>>>
> >>>> Files include/dt-bindings/clock/stm32h7-clks.h and
> >>>> doc/device-tree-bindings/clock/st,stm32h7-rcc.txt
> >>>> will be available soon in a kernel tag, as all the bindings have
> >>>> been acked by Rob Herring [1].
> >>>>
> >>>> [1] http://lkml.iu.edu/hypermail/linux/kernel/1704.0/00935.html
> >>>>
> >>>> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>
> >>>> ---
> >
> > [...]
> >
> >>>> +
> >>>> +#define PWR_CR3    0x0c #define PWR_CR3_SDEN
> >>>> +BIT(2)
> >>>
> >>> Can we use SCUEN suffix to match the Ref Manual.
> >>
> >> Which version of reference manual do you use ? in mine its SDEN, but
> >> i propably use a too old ref manual.
> >>
> >
> > I have found the last version of STM32H7 ref manual, mine was too old,
> > ok i will update the PWR_CR3_SDEN to PWR_CR3_SCUEN
> 
> After double check, in the STM32H7x3 reference manual available on st.com 
> (DocID029587 Rev 2), bit 2 of PWR_CR3 reg is described as
> following:
> 
> "Bit 2 SCUEN: Supply configuration update enable This bit is read-only:
> 0: Supply configuration update locked.
> 1: Single write enabled to Supply configuration (LDOEN and BYPASS)"
> 
> Whereas in the one i used, bit 2 of PWR_CR3 is described as:
> 
> "Bit 2 SDEN (1)(2) : SD converter Enable
> 0: Step down converter disabled
> 1: Step down converter enabled. (Default)"
> 
> If i follow ref manual DocID029587 Rev 2, this bit is read-only, so the write 
> access of PWR_CR3 bit(2) in clk_stm32h7.c is useless. But
> after write access removal, the both STM32H7 disco and eval board doesn't 
> boot.
> 
> The reference manual is wrong regarding with at least this bit. I will 
> contact PWR architect to solve this point.

Ok, By the Rev3 of the Ref manual is also available online but does not matter 
for this bit. Even the explanation for this bit does not make sense if system 
does not boot without it.

Cheers,
Vikas

> 
> Patrice
> 
> 
> >
> > thanks
> >
> > Patrice
> >
> >>>
> >>>> +#define PWR_D3CR    0x18
> >>>> +#define PWR_D3CR_VOS_MASK    GENMASK(15, 14) #define
> >>>> +PWR_D3CR_VOS_SHIFT    14 #define    VOS_SCALE_3    1
> >>>> +#define    VOS_SCALE_2    2 #define    VOS_SCALE_1
> >>>> +3 #define PWR_D3CR_VOSREADY    BIT(13)
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Re: [U-Boot] [PATCH v2 3/9] dm: clk: add clk driver support for stm32h7 SoCs

[Vikas Manocha]

Hi Patrice,

On 09/13/2017 09:00 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard 
> 
> This driver implements basic clock setup, only clock gating
> is implemented.
> 
> This driver doesn't implement .of_match as it's binded
> by MFD RCC driver.
> 
> Files include/dt-bindings/clock/stm32h7-clks.h and
> doc/device-tree-bindings/clock/st,stm32h7-rcc.txt
> will be available soon in a kernel tag, as all the
> bindings have been acked by Rob Herring [1].
> 
> [1] http://lkml.iu.edu/hypermail/linux/kernel/1704.0/00935.html
> 
> Signed-off-by: Patrice Chotard 
> ---
>  doc/device-tree-bindings/clock/st,stm32h7-rcc.txt | 152 
>  drivers/clk/Makefile  |   1 +
>  drivers/clk/clk_stm32h7.c | 802 
> ++
>  include/dt-bindings/clock/stm32h7-clks.h  | 167 +
>  4 files changed, 1122 insertions(+)
>  create mode 100644 doc/device-tree-bindings/clock/st,stm32h7-rcc.txt
>  create mode 100644 drivers/clk/clk_stm32h7.c
>  create mode 100644 include/dt-bindings/clock/stm32h7-clks.h
> 
> diff --git a/doc/device-tree-bindings/clock/st,stm32h7-rcc.txt 
> b/doc/device-tree-bindings/clock/st,stm32h7-rcc.txt
> new file mode 100644
> index 000..9d4b587
> --- /dev/null
> +++ b/doc/device-tree-bindings/clock/st,stm32h7-rcc.txt
> @@ -0,0 +1,152 @@
> +STMicroelectronics STM32H7 Reset and Clock Controller
> +=
> +
> +The RCC IP is both a reset and a clock controller.
> +
> +Please refer to clock-bindings.txt for common clock controller binding usage.
> +Please also refer to reset.txt for common reset controller binding usage.
> +
> +Required properties:
> +- compatible: Should be:
> +  "st,stm32h743-rcc"
> +
> +- reg: should be register base and length as documented in the
> +  datasheet
> +
> +- #reset-cells: 1, see below
> +
> +- #clock-cells : from common clock binding; shall be set to 1
> +
> +- clocks: External oscillator clock phandle
> +  - high speed external clock signal (HSE)
> +  - low speed external clock signal (LSE)
> +  - external I2S clock (I2S_CKIN)
> +
> +- st,syscfg: phandle for pwrcfg, mandatory to disable/enable backup domain
> +  write protection (RTC clock).

st,syscfg is confusing if we are using it for PWR or SYSCFG peripheral of the 
device.
Also why company name to reference the phandle, it can just be syscfg or better 
something like pwr_xxx as we it pointing to pwrcfg phandle.

> +
> +- pll x node: Allow to register a pll with specific parameters.
> +  Please see PLL section below.
> +
> +Example:
> +
> + rcc: rcc@58024400 {
> + #reset-cells = <1>;
> + #clock-cells = <2>
> + compatible = "st,stm32h743-rcc", "st,stm32-rcc";
> + reg = <0x58024400 0x400>;
> + clocks = <_hse>, <_lse>, <_i2s_ckin>;
> +
> + st,syscfg = <>;

see above.

> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + vco1@58024430 {
> + #clock-cells = <0>;
> + compatible = "stm32,pll";
> + reg = <0>;
> + };
> +
> + vco2@58024438 {
> + #clock-cells = <0>;
> + compatible = "stm32,pll";
> + reg = <1>;
> + st,clock-div = <2>;
> + st,clock-mult = <40>;
> + st,frac-status = <0>;
> + st,frac = <0>;
> + st,vcosel = <1>;
> + st,pllrge = <2>;
> + };
> + };
> +
> +
> +STM32H7 PLL
> +---
> +
> +The VCO of STM32 PLL could be reprensented like this:
> +
> +  Vref-   
> +>| / DIVM  |>| x DIVN | --> VCO
> +  -   
> +  ^
> +  |
> +   ---
> +  | FRACN |
> +   ---
> +
> +When the PLL is configured in integer mode:
> +- VCO = ( Vref / DIVM ) * DIVN
> +
> +When the PLL is configured in fractional mode:
> +- VCO = ( Vref / DIVM ) * ( DIVN + FRACN / 2^13)
> +
> +
> +Required properties for pll node:
> +- compatible: Should be:
> +  "stm32,pll"
> +
> +- #clock-cells: from common clock binding; shall be set to 0
> +- reg: Should be the pll number.
> +
> +Optional properties:
> +- st,clock-div:  DIVM division factor   : <1..63>
> +- st,clock-mult: DIVN multiplication factor : <4..512>
> +
> +- st,frac-status:
> +   - 0 Pll is configured in integer mode
> +   - 1 Pll is configure in fractional mode
> +
> +- st,frac: Fractional part of the multiplication factor : <0..8191>
> +
> +- st,vcosel: VCO selection
> +  - 0: Wide VCO range:192 to 836 MHz
> +  - 1: Medium VCO range:150 to 420 MHz
> +
> +- st,pllrge: PLL input frequency range
> +  - 0: The PLL input (Vref / DIVM) clock range frequency 

Re: [U-Boot] [PATCH v2 2/9] serial: stm32x7: add STM32H7 support

[Vikas Manocha]

Hi Patrice,

On 09/13/2017 09:00 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard 
> 
> STM32F7 and STM32H7 shares the same UART block, add
> STM32H7 compatible string.
> 
> Signed-off-by: Patrice Chotard 
> ---
>  drivers/serial/Kconfig  | 7 ---
>  drivers/serial/serial_stm32x7.c | 2 ++
>  2 files changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index aeed538..0775d95 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -524,10 +524,11 @@ config STI_ASC_SERIAL
>  
>  config STM32X7_SERIAL
>   bool "STMicroelectronics STM32 SoCs on-chip UART"
> - depends on DM_SERIAL && STM32F7
> + depends on DM_SERIAL && (STM32F7 || STM32H7)
>   help
> -   If you have a machine based on a STM32 F7 you can enable its
> -   onboard serial ports, say Y to this option. If unsure, say N.
> +   If you have a machine based on a STM32 F7 or H7 SoC you can
> +   enable its onboard serial ports, say Y to this option.
> +   If unsure, say N.
>  
>  config MPC8XX_CONS
>   bool "Console driver for MPC8XX"
> diff --git a/drivers/serial/serial_stm32x7.c b/drivers/serial/serial_stm32x7.c
> index bf118a7..2f4eafa 100644
> --- a/drivers/serial/serial_stm32x7.c
> +++ b/drivers/serial/serial_stm32x7.c
> @@ -112,6 +112,8 @@ static int stm32_serial_probe(struct udevice *dev)
>  static const struct udevice_id stm32_serial_id[] = {
>   {.compatible = "st,stm32f7-usart"},
>   {.compatible = "st,stm32f7-uart"},
> + {.compatible = "st,stm32h7-usart"},
> + {.compatible = "st,stm32h7-uart"},

two compatibles are consuming space & time without adding any value.

Cheers,
Vikas

>   {}
>  };
>  
> 
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Re: [U-Boot] [PATCH v2 1/9] pinctrl: stm32: add stm32h743-pinctrl compatible

[Vikas Manocha]

On 09/13/2017 09:00 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> STM32H7 SoCs uses the same pinctrl block as found into
> STM32F7 SoCs
> 
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>
> ---
>  drivers/pinctrl/pinctrl_stm32.c | 1 +
>  1 file changed, 1 insertion(+)
> 

Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

> diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
> index fb2593c..bf2a86c 100644
> --- a/drivers/pinctrl/pinctrl_stm32.c
> +++ b/drivers/pinctrl/pinctrl_stm32.c
> @@ -183,6 +183,7 @@ static struct pinctrl_ops stm32_pinctrl_ops = {
>  
>  static const struct udevice_id stm32_pinctrl_ids[] = {
>   { .compatible = "st,stm32f746-pinctrl" },
> + { .compatible = "st,stm32h743-pinctrl" },
>   { }
>  };
>  
> 
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Re: [U-Boot] [PATCH] spl: fix usage of $(SPL_TPL_) for some files

[Vikas MANOCHA]

Hi,

> -Original Message-
> From: Dr. Philipp Tomsich [mailto:philipp.toms...@theobroma-systems.com]
> Sent: Monday, August 21, 2017 3:17 AM
> To: Vikas MANOCHA <vikas.mano...@st.com>
> Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Alexandru Gagniuc 
> <ale...@adaptrum.com>; Kever Yang <kever.y...@rock-chips.com>;
> Simon Glass <s...@chromium.org>; Stefan Agner <stefan.ag...@toradex.com>
> Subject: Re: [PATCH] spl: fix usage of $(SPL_TPL_) for some files
> 
> Vikas,
> 
> thanks for reporting this.
> Fortunately, a fix has already been merged by Tom as
>   commit b5c4d81b3507b3abb239ea8323515fce09dc378f

Great, Thanks Philipp for this info.

Cheers,
Vikas

> 
> Best,
> Philipp.
> 
> > On 20 Aug 2017, at 19:45, Vikas Manocha <vikas.mano...@st.com> wrote:
> >
> > Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
> > ---
> > common/spl/Makefile | 6 +++---
> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/common/spl/Makefile b/common/spl/Makefile index
> > 112b3e6..fde0d09 100644
> > --- a/common/spl/Makefile
> > +++ b/common/spl/Makefile
> > @@ -12,9 +12,9 @@ ifdef CONFIG_SPL_BUILD
> > obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
> > obj-$(CONFIG_$(SPL_TPL_)BOOTROM_SUPPORT) += spl_bootrom.o
> > obj-$(CONFIG_$(SPL_TPL_)LOAD_FIT) += spl_fit.o
> > -obj-$(CONFIG_$(SPL_TPL_)SPL_NOR_SUPPORT) += spl_nor.o
> > -obj-$(CONFIG_$(SPL_TPL_)SPL_XIP_SUPPORT) += spl_xip.o
> > -obj-$(CONFIG_$(SPL_TPL_)SPL_YMODEM_SUPPORT) += spl_ymodem.o
> > +obj-$(CONFIG_$(SPL_TPL_)NOR_SUPPORT) += spl_nor.o
> > +obj-$(CONFIG_$(SPL_TPL_)XIP_SUPPORT) += spl_xip.o
> > +obj-$(CONFIG_$(SPL_TPL_)YMODEM_SUPPORT) += spl_ymodem.o
> > ifndef CONFIG_SPL_UBI
> > obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += spl_nand.o
> > obj-$(CONFIG_$(SPL_TPL_)ONENAND_SUPPORT) += spl_onenand.o
> > --
> > 1.9.1
> >

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[U-Boot] [PATCH] spl: stm32: make falcon mode activation configurable

[Vikas Manocha]

With this change, it will be possible to de-select falcon mode & spl
will only boot U-Boot.

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
Suggested-by: Bo Shen <voice.s...@gmail.com>
---
 arch/arm/mach-stm32/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
index f70f5ec..947ce5f 100644
--- a/arch/arm/mach-stm32/Kconfig
+++ b/arch/arm/mach-stm32/Kconfig
@@ -18,7 +18,7 @@ config STM32F7
select SPL_OF_CONTROL
select SPL_OF_LIBFDT
select SPL_OF_TRANSLATE
-   select SPL_OS_BOOT
+   imply SPL_OS_BOOT
select SPL_PINCTRL
select SPL_RAM
select SPL_SERIAL_SUPPORT
-- 
1.9.1

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[U-Boot] [PATCH] spl: fix usage of $(SPL_TPL_) for some files

[Vikas Manocha]

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---
 common/spl/Makefile | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/common/spl/Makefile b/common/spl/Makefile
index 112b3e6..fde0d09 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -12,9 +12,9 @@ ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
 obj-$(CONFIG_$(SPL_TPL_)BOOTROM_SUPPORT) += spl_bootrom.o
 obj-$(CONFIG_$(SPL_TPL_)LOAD_FIT) += spl_fit.o
-obj-$(CONFIG_$(SPL_TPL_)SPL_NOR_SUPPORT) += spl_nor.o
-obj-$(CONFIG_$(SPL_TPL_)SPL_XIP_SUPPORT) += spl_xip.o
-obj-$(CONFIG_$(SPL_TPL_)SPL_YMODEM_SUPPORT) += spl_ymodem.o
+obj-$(CONFIG_$(SPL_TPL_)NOR_SUPPORT) += spl_nor.o
+obj-$(CONFIG_$(SPL_TPL_)XIP_SUPPORT) += spl_xip.o
+obj-$(CONFIG_$(SPL_TPL_)YMODEM_SUPPORT) += spl_ymodem.o
 ifndef CONFIG_SPL_UBI
 obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += spl_nand.o
 obj-$(CONFIG_$(SPL_TPL_)ONENAND_SUPPORT) += spl_onenand.o
-- 
1.9.1

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Re: [U-Boot] [PATCH v2 3/7] stm32: stm32f7: add spl build support

[Vikas MANOCHA]

Hi,

> On Aug 18, 2017, at 6:31 PM, Robert Nelson <robertcnel...@gmail.com> wrote:
> 
>> On Fri, Aug 18, 2017 at 4:28 PM, Vikas MANOCHA <vikas.mano...@st.com> wrote:
>> Hi Bo,
>> 
>>> -Original Message-
>>> From: Bo Shen [mailto:voice.s...@gmail.com]
>>> Sent: Thursday, August 17, 2017 10:07 PM
>>> To: Robert Nelson <robertcnel...@gmail.com>; Vikas MANOCHA 
>>> <vikas.mano...@st.com>
>>> Cc: U-Boot-Denx <u-boot@lists.denx.de>; Christophe PRIOUZEAU 
>>> <christophe.priouz...@st.com>; Alexandre TORGUE
>>> <alexandre.tor...@st.com>
>>> Subject: Re: [U-Boot] [PATCH v2 3/7] stm32: stm32f7: add spl build support
>>> 
>>> 
>>> Hi Vikas,
>>>   Try to remove this magic (press 'c' on the keyboard when at the boot 
>>> time),
>> 
>> It helps to select between U-Boot or OS booting.
>> 
>>> I'd suggest to add a follow-up patch to move all the
>>> selected SPL related configuration from "arch/arm/mach-stm32/Kconfig" under 
>>> STM32F7 to default configuration file (stm32f746-
>>> disco_defconfig). Then if the people want just boot up u-boot itself, what 
>>> they need to do is just run "make menuconfig" and then de-
>>> select "Activate Falcon Mode"
>>> (SPL_OS_BOOT). Then everything will be fine.
>> 
>> Yes, Agree. How about using "imply" instead of "select" for SPL_OS_BOOT to 
>> make it configurable.
> 
> Well, we really need a /doc/README.stm32 that explains this
> "different" default..  It's definitely different then
> omap/imx/tegra/atmel in this tree. But the processor is also more
> handicapped, so not wasting time in normal u-boot just booting the
> kernel via spl/falcon more makes sense.

That's the current configuration with one additional key entry check which is 
insignificant in terms of any overhead.

Making SPL_OS_BOOT configurable is also adding option to compile spl to boot 
UBoot directly without any overhead.

Cheers,
Vikas 

> 
> Regards,
> 
> -- 
> Robert Nelson
> https://rcn-ee.com/
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Re: [U-Boot] [PATCH v2 3/7] stm32: stm32f7: add spl build support

[Vikas MANOCHA]

Hi Bo,

> -Original Message-
> From: Bo Shen [mailto:voice.s...@gmail.com]
> Sent: Thursday, August 17, 2017 10:07 PM
> To: Robert Nelson <robertcnel...@gmail.com>; Vikas MANOCHA 
> <vikas.mano...@st.com>
> Cc: U-Boot-Denx <u-boot@lists.denx.de>; Christophe PRIOUZEAU 
> <christophe.priouz...@st.com>; Alexandre TORGUE
> <alexandre.tor...@st.com>
> Subject: Re: [U-Boot] [PATCH v2 3/7] stm32: stm32f7: add spl build support
> 
> 
> Hi Vikas,
>Try to remove this magic (press 'c' on the keyboard when at the boot time),

It helps to select between U-Boot or OS booting.

> I'd suggest to add a follow-up patch to move all the
> selected SPL related configuration from "arch/arm/mach-stm32/Kconfig" under 
> STM32F7 to default configuration file (stm32f746-
> disco_defconfig). Then if the people want just boot up u-boot itself, what 
> they need to do is just run "make menuconfig" and then de-
> select "Activate Falcon Mode"
> (SPL_OS_BOOT). Then everything will be fine.

Yes, Agree. How about using "imply" instead of "select" for SPL_OS_BOOT to make 
it configurable.

Cheers,
Vikas

> 
>Thanks.
> 
> Best Regards,
> Bo Shen
> 
> On 08/10/2017 11:36 AM, Robert Nelson wrote:
> > On Thu, Aug 10, 2017 at 1:10 PM, Vikas Manocha <vikas.mano...@st.com> wrote:
> >> One other point,
> >>
> >> On 08/10/2017 11:07 AM, Vikas Manocha wrote:
> >>> Hi Robert,
> >>>
> >>> On 08/10/2017 11:03 AM, Robert Nelson wrote:
> >>>> Hi Vikas,
> >>>>
> >>>> On Sun, May 28, 2017 at 2:55 PM, Vikas Manocha <vikas.mano...@st.com> 
> >>>> wrote:
> >>>>> This commit supports booting from stm32 internal nor flash. spl
> >>>>> U-Boot initializes the sdram memory, copies next image (e.g.
> >>>>> standard U-Boot) to sdram & then jumps to entry point.
> >>>>>
> >>>>> Here are the flash memory addresses for U-Boot-spl & standard U-Boot:
> >>>>>  - spl U-Boot: 0x0800_
> >>>>>  - standard U-Boot   : 0x0800_8000
> >>>> Is there another patchset missing on mainline for booting via spl?
> >>> No, you just need to flash spl & next image at above mentioned addresses. 
> >>> By default spl expects kernel image.
> >>>
> >>> To boot u-boot, press keyboard character 'c'.
> >>> you might need to keep on pressing 'c' it for some time as the keyboard 
> >>> entry acceptance & detection window is very small.
> >>>
> >>> Cheers,
> >>> Vikas
> >>>
> >>>> on mainline with the stm32f746-disco board:
> >>>>
> >>>> U-Boot SPL 2017.09-rc1-00177-gd529124fdc (Aug 10 2017 - 12:33:35)
> >>>> Trying to boot from XIP Hard fault
> >>>> pc : 08008008lr : 08000adbxPSR : 2100
> >>>> r12 : 2004f338   r3 : 0005r2 : 081c
> >>>> r1 : ff9ar0 : 
> >>>> Resetting CPU ...
> >>>>
> >>>> resetting ...
> >>>>
> >>>> I'm using openocd to program
> >>>>
> >>>> openocd -f board/stm32f7discovery.cfg \
> >>>>-c "init" \
> >>>>-c "reset init" \
> >>>>-c "flash probe 0" \
> >>>>-c "flash write_image erase ./spl/u-boot-spl.bin 0x0800" \
> >>>>-c "flash write_image erase ./u-boot.img 0x08008000" \
> >> it should be u-boot-dtb.bin.
> > Bingo!
> >
> > Thanks Vikas!!
> >
> > U-Boot SPL 2017.09-rc1-00177-gd529124fdc (Aug 10 2017 - 12:33:35)
> > Trying to boot from XIP
> >
> >
> > U-Boot 2017.09-rc1-00177-gd529124fdc (Aug 10 2017 - 12:33:35 -0500)
> >
> > Model: STMicroelectronics STM32F746-DISCO board
> > DRAM:  8 MiB
> > Flash: 1 MiB
> > Using default environment
> >
> > In:serial@40011000
> > Out:   serial@40011000
> > Err:   serial@40011000
> > usr button is at LOW LEVEL
> > Net:
> > Warning: ethernet@40028000 (eth0) using random MAC address -
> > 02:4a:de:c3:c8:80
> > eth0: ethernet@40028000
> > Hit SPACE in 3 seconds to stop autoboot.
> > U-Boot >
> >
> > Regards,
> >

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Re: [U-Boot] [PATCH v2 3/7] stm32: stm32f7: add spl build support

[Vikas Manocha]

One other point,

On 08/10/2017 11:07 AM, Vikas Manocha wrote:
> Hi Robert,
> 
> On 08/10/2017 11:03 AM, Robert Nelson wrote:
>> Hi Vikas,
>>
>> On Sun, May 28, 2017 at 2:55 PM, Vikas Manocha <vikas.mano...@st.com> wrote:
>>> This commit supports booting from stm32 internal nor flash. spl U-Boot
>>> initializes the sdram memory, copies next image (e.g. standard U-Boot)
>>> to sdram & then jumps to entry point.
>>>
>>> Here are the flash memory addresses for U-Boot-spl & standard U-Boot:
>>> - spl U-Boot: 0x0800_
>>> - standard U-Boot   : 0x0800_8000
>>
>> Is there another patchset missing on mainline for booting via spl?
> 
> No, you just need to flash spl & next image at above mentioned addresses. By 
> default spl expects kernel image. 
> 
> To boot u-boot, press keyboard character 'c'.
> you might need to keep on pressing 'c' it for some time as the keyboard entry 
> acceptance & detection window is very small.
> 
> Cheers,
> Vikas
> 
>>
>> on mainline with the stm32f746-disco board:
>>
>> U-Boot SPL 2017.09-rc1-00177-gd529124fdc (Aug 10 2017 - 12:33:35)
>> Trying to boot from XIP
>> Hard fault
>> pc : 08008008lr : 08000adbxPSR : 2100
>> r12 : 2004f338   r3 : 0005r2 : 081c
>> r1 : ff9ar0 : 
>> Resetting CPU ...
>>
>> resetting ...
>>
>> I'm using openocd to program
>>
>> openocd -f board/stm32f7discovery.cfg \
>>   -c "init" \
>>   -c "reset init" \
>>   -c "flash probe 0" \
>>   -c "flash write_image erase ./spl/u-boot-spl.bin 0x0800" \
>>   -c "flash write_image erase ./u-boot.img 0x08008000" \

it should be u-boot-dtb.bin.

Cheers,
Vikas

>>   -c "reset run" \
>>   -c "shutdown"
>>
>> Regards,
>>
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Re: [U-Boot] [PATCH v2 3/7] stm32: stm32f7: add spl build support

[Vikas Manocha]

Hi Robert,

On 08/10/2017 11:03 AM, Robert Nelson wrote:
> Hi Vikas,
> 
> On Sun, May 28, 2017 at 2:55 PM, Vikas Manocha <vikas.mano...@st.com> wrote:
>> This commit supports booting from stm32 internal nor flash. spl U-Boot
>> initializes the sdram memory, copies next image (e.g. standard U-Boot)
>> to sdram & then jumps to entry point.
>>
>> Here are the flash memory addresses for U-Boot-spl & standard U-Boot:
>> - spl U-Boot: 0x0800_
>> - standard U-Boot   : 0x0800_8000
> 
> Is there another patchset missing on mainline for booting via spl?

No, you just need to flash spl & next image at above mentioned addresses. By 
default spl expects kernel image. 

To boot u-boot, press keyboard character 'c'.
you might need to keep on pressing 'c' it for some time as the keyboard entry 
acceptance & detection window is very small.

Cheers,
Vikas

> 
> on mainline with the stm32f746-disco board:
> 
> U-Boot SPL 2017.09-rc1-00177-gd529124fdc (Aug 10 2017 - 12:33:35)
> Trying to boot from XIP
> Hard fault
> pc : 08008008lr : 08000adbxPSR : 2100
> r12 : 2004f338   r3 : 0005r2 : 081c
> r1 : ff9ar0 : 
> Resetting CPU ...
> 
> resetting ...
> 
> I'm using openocd to program
> 
> openocd -f board/stm32f7discovery.cfg \
>   -c "init" \
>   -c "reset init" \
>   -c "flash probe 0" \
>   -c "flash write_image erase ./spl/u-boot-spl.bin 0x0800" \
>   -c "flash write_image erase ./u-boot.img 0x08008000" \
>   -c "reset run" \
>   -c "shutdown"
> 
> Regards,
> 
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Re: [U-Boot] [PATCH 09/15] ARM: DTS: stm32: add gpio compatible and aliases for stm32h743

[Vikas MANOCHA]

Hi Patrice,

> -Original Message-
> From: Patrice CHOTARD
> Sent: Friday, August 04, 2017 6:19 AM
> To: u-boot@lists.denx.de; albert.u.b...@aribaud.net; s...@chromium.org; Vikas 
> MANOCHA <vikas.mano...@st.com>
> Cc: Patrice CHOTARD <patrice.chot...@st.com>; Patrick DELAUNAY 
> <patrick.delau...@st.com>; Christophe KERELLO
> <christophe.kere...@st.com>
> Subject: [PATCH 09/15] ARM: DTS: stm32: add gpio compatible and aliases for 
> stm32h743
> 
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> This is needed to bind stm32-gpio driver

Same, it should be fixed in previous patch " DTS: stm32: add stm32h743i-disco 
files"

Cheers,
Vikas

> 
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>
> ---
>  arch/arm/dts/stm32h743-pinctrl.dtsi | 11 +++
>  arch/arm/dts/stm32h743i-disco.dts   | 11 +++
>  2 files changed, 22 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32h743-pinctrl.dtsi 
> b/arch/arm/dts/stm32h743-pinctrl.dtsi
> index d438818..f32d086 100644
> --- a/arch/arm/dts/stm32h743-pinctrl.dtsi
> +++ b/arch/arm/dts/stm32h743-pinctrl.dtsi
> @@ -54,6 +54,7 @@
>   gpioa: gpio@5802 {
>   gpio-controller;
>   #gpio-cells = <2>;
> + compatible = "st,stm32-gpio";
>   reg = <0x0 0x400>;
>   clocks = < GPIOA_CK>;
>   st,bank-name = "GPIOA";
> @@ -62,6 +63,7 @@
>   gpiob: gpio@58020400 {
>   gpio-controller;
>   #gpio-cells = <2>;
> + compatible = "st,stm32-gpio";
>   reg = <0x400 0x400>;
>   clocks = < GPIOB_CK>;
>   st,bank-name = "GPIOB";
> @@ -70,6 +72,7 @@
>   gpioc: gpio@58020800 {
>   gpio-controller;
>   #gpio-cells = <2>;
> + compatible = "st,stm32-gpio";
>   reg = <0x800 0x400>;
>   clocks = < GPIOC_CK>;
>   st,bank-name = "GPIOC";
> @@ -78,6 +81,7 @@
>   gpiod: gpio@58020c00 {
>   gpio-controller;
>   #gpio-cells = <2>;
> + compatible = "st,stm32-gpio";
>   reg = <0xc00 0x400>;
>   clocks = < GPIOD_CK>;
>   st,bank-name = "GPIOD";
> @@ -86,6 +90,7 @@
>   gpioe: gpio@58021000 {
>   gpio-controller;
>   #gpio-cells = <2>;
> + compatible = "st,stm32-gpio";
>   reg = <0x1000 0x400>;
>   clocks = < GPIOE_CK>;
>   st,bank-name = "GPIOE";
> @@ -94,6 +99,7 @@
>   gpiof: gpio@58021400 {
>   gpio-controller;
>   #gpio-cells = <2>;
> + compatible = "st,stm32-gpio";
>   reg = <0x1400 0x400>;
>   clocks = < GPIOF_CK>;
>   st,bank-name = "GPIOF";
> @@ -102,6 +108,7 @@
>   gpiog: gpio@58021800 {
>   gpio-controller;
>   #gpio-cells = <2>;
> + compatible = "st,stm32-gpio";
>   reg = <0x1800 0x400>;
>   clocks = < GPIOG_CK>;
>   st,bank-name = "GPIOG";
> @@ -110,6 +117,7 @@
>   gpioh: gpio@58021c00 {
>   gpio-controller;
>   #gpio-cells = <2>;
> + compatible = "st,stm32-gpio";
>   reg = <0x1c00 0x400>;
>   clocks = < GPIOH_CK>;
>   st,bank-name = "GPIOH";
> @@ -118,6 +126,7 @@
>   gpioi: gpio@58022000 {
>   gpio-controller;
> 

Re: [U-Boot] [PATCH 08/15] ARM: DTS: stm32: update usart compatible string for stm32h743

[Vikas MANOCHA]

Hi Patrice,

> -Original Message-
> From: Patrice CHOTARD
> Sent: Friday, August 04, 2017 6:19 AM
> To: u-boot@lists.denx.de; albert.u.b...@aribaud.net; s...@chromium.org; Vikas 
> MANOCHA <vikas.mano...@st.com>
> Cc: Patrice CHOTARD <patrice.chot...@st.com>; Patrick DELAUNAY 
> <patrick.delau...@st.com>; Christophe KERELLO
> <christophe.kere...@st.com>
> Subject: [PATCH 08/15] ARM: DTS: stm32: update usart compatible string for 
> stm32h743
> 
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> Align STM32H7 serial compatible string with the one which will be available 
> in next kernel tag. The bindings has been acked by Rob
> Herring [1].
> This compatible string will be usefull to add stm32h7 specific feature for 
> this serial driver.

Please merge this patch with previous patch "ARM: DTS: stm32: add 
stm32h743i-disco files"
H7 usart sting is already part of driver code which is patch 02 of the series.

Cheers,
Vikas

> 
> [1] https://lkml.org/lkml/2017/7/17/739
> 
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>
> ---
>  arch/arm/dts/stm32h743.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/dts/stm32h743.dtsi b/arch/arm/dts/stm32h743.dtsi index 
> 30b5cb4..fd926a7 100644
> --- a/arch/arm/dts/stm32h743.dtsi
> +++ b/arch/arm/dts/stm32h743.dtsi
> @@ -76,7 +76,7 @@
>   };
> 
>   usart1: serial@40011000 {
> - compatible = "st,stm32f7-usart", "st,stm32f7-uart";
> + compatible = "st,stm32h7-usart", "st,stm32h7-uart";
>   reg = <0x40011000 0x400>;
>   interrupts = <37>;
>   status = "disabled";
> @@ -84,7 +84,7 @@
>   };
> 
>   usart2: serial@40004400 {
> - compatible = "st,stm32f7-usart", "st,stm32f7-uart";
> + compatible = "st,stm32h7-usart", "st,stm32h7-uart";
>   reg = <0x40004400 0x400>;
>   interrupts = <38>;
>   status = "disabled";
> --
> 1.9.1

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Re: [U-Boot] [PATCH 1/1] armv7m: mpu_config add missing break

[Vikas Manocha]

Hi,

On 07/30/2017 11:34 AM, Heinrich Schuchardt wrote:
> For DEVICE_NON_SHARED the newly assigned value of attr
> is overwritten due to a missing break.
> 
> The problem was indicated by cppcheck.
> 
> Signed-off-by: Heinrich Schuchardt <xypron.g...@gmx.de>

reviewed-by : Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> ---
>  arch/arm/cpu/armv7m/mpu.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/cpu/armv7m/mpu.c b/arch/arm/cpu/armv7m/mpu.c
> index 31a243b49a..4622aa4826 100644
> --- a/arch/arm/cpu/armv7m/mpu.c
> +++ b/arch/arm/cpu/armv7m/mpu.c
> @@ -68,6 +68,7 @@ void mpu_config(struct mpu_region_config *reg_config)
>   break;
>   case DEVICE_NON_SHARED:
>   attr = (2 << TEX_SHIFT) | BUFFERABLE;
> + break;
>   default:
>   attr = 0; /* strongly ordered */
>   break;
> 
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Re: [U-Boot] [PATCH v2 1/1] stmf32f4: soc: fix buildman compilation error

[Vikas MANOCHA]

Hi,

> -Original Message-
> From: Patrice CHOTARD
> Sent: Friday, July 28, 2017 2:54 AM
> To: u-boot@lists.denx.de; albert.u.b...@aribaud.net; s...@chromium.org; Vikas 
> MANOCHA <vikas.mano...@st.com>
> Cc: Patrice CHOTARD <patrice.chot...@st.com>; Patrick DELAUNAY 
> <patrick.delau...@st.com>; Christophe KERELLO
> <christophe.kere...@st.com>
> Subject: [PATCH v2 1/1] stmf32f4: soc: fix buildman compilation error
> 
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> fix the following compilation error reported by buidlman:
> 
>arm:  +   stm32f429-discovery
> +arch/arm/mach-stm32/stm32f4/soc.c: In function 'arch_cpu_init':
> +arch/arm/mach-stm32/stm32f4/soc.c:30:2: error: 'for' loop initial 
> declarations are only allowed in C99 or C11 mode
> +  for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
> +  ^
> +arch/arm/mach-stm32/stm32f4/soc.c:30:2: note: use option -std=c99, 
> -std=gnu99, -std=c11 or -std=gnu11 to compile your code
> +make[3]: *** [arch/arm/mach-stm32/stm32f4/soc.o] Error 1
> +make[2]: *** [arch/arm/mach-stm32/stm32f4] Error 2
> +make[1]: *** [arch/arm/mach-stm32] Error 2
> +make: *** [sub-make] Error 2
> 
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>

Acked-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> ---
>  arch/arm/mach-stm32/stm32f4/soc.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-stm32/stm32f4/soc.c 
> b/arch/arm/mach-stm32/stm32f4/soc.c
> index 3f45a25..9eb655a 100644
> --- a/arch/arm/mach-stm32/stm32f4/soc.c
> +++ b/arch/arm/mach-stm32/stm32f4/soc.c
> @@ -21,13 +21,15 @@ int arch_cpu_init(void)
>   { 0x, REGION_0, XN_DIS, PRIV_RW_USR_RW,
>   STRONG_ORDER, REGION_4GB },
>   };
> + int i;
> +
>   configure_clocks();
>   /*
>* Configure the memory protection unit (MPU) to allow full access to
>* the whole 4GB address space.
>*/
>   disable_mpu();
> - for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
> + for (i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
>   mpu_config(_region_config[i]);
>   enable_mpu();
> 
> --
> 1.9.1

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Re: [U-Boot] STM32F746 Discovery - No serial output?

[Vikas MANOCHA]

Hi Francois,

> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Francois 
> Dugast
> Sent: Friday, July 21, 2017 1:41 PM
> To: u-boot@lists.denx.de
> Subject: [U-Boot] STM32F746 Discovery - No serial output?
> 
> Hi,
> 
> I am trying to run the master on a STM32F746 Discovery board [1] by using 
> stm32f746-disco_defconfig. It was built with gcc-arm-none-
> eabi-5_4-2016q3 [2] and flashed with OpenOCD [3]. A USB-serial adapter is 
> connected to USART6_RX and USART6_TX (pins D0 and D1 of
> the Arduino connector) and configured for 115200 8N1. No output coming out 
> through the serial interface. 

There is no need of USB-serial adaptor with this board.
USART1 can be used using stlink usb port which is being configured by u-boot 
master.

Here is the usart1 dts pin config (check out arch/arm/dts/stm32f746-disco.dts):

usart1_pins_a: usart1@0 {
pins1 {
   pinmux = ;
bias-disable;
drive-push-pull;
slew-rate = <2>;
};
pins2 {
pinmux = ;
bias-disable;
};
};


Cheers,
Vikas

>It is unlikely to be a
> hardware issue as output is coming out normally this way when using the 
> U-Boot repository from Emcraft.
> 
> I do not know what I am doing wrong, can you help me out?
> 
> Cheers,
> Francois
> 
> [1] http://www.st.com/en/evaluation-tools/32f746gdiscovery.html
> [2] https://launchpad.net/gcc-arm-embedded
> [3] http://openocd.org
> [4] https://github.com/EmcraftSystems/u-boot
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Re: [U-Boot] [PATCH 1/1] serial: stm32x7: Convert CONFIG_STM32X7_SERIAL to Kconfig

[Vikas Manocha]

LGTM,

On 07/26/2017 06:48 AM, patrice.chot...@st.com wrote:
> From: Patrice Chotard <patrice.chot...@st.com>
> 
> Add CONFIG_STM32X7_SERIAL as a Kconfig option.
> 
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>

Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> ---
>  configs/stm32f746-disco_defconfig | 1 +
>  drivers/serial/Kconfig| 7 +++
>  include/configs/stm32f746-disco.h | 1 -
>  scripts/config_whitelist.txt  | 1 -
>  4 files changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/configs/stm32f746-disco_defconfig 
> b/configs/stm32f746-disco_defconfig
> index f76d3c5..08c4a06 100644
> --- a/configs/stm32f746-disco_defconfig
> +++ b/configs/stm32f746-disco_defconfig
> @@ -42,6 +42,7 @@ CONFIG_PINCTRL=y
>  CONFIG_PINCTRL_STM32=y
>  CONFIG_RAM=y
>  CONFIG_STM32_SDRAM=y
> +CONFIG_STM32X7_SERIAL=y
>  CONFIG_DM_SPI=y
>  CONFIG_STM32_QSPI=y
>  CONFIG_OF_LIBFDT_OVERLAY=y
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index b7dd2ac..2a767f9 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -491,6 +491,13 @@ config STI_ASC_SERIAL
> on STiH410 SoC. This is a basic implementation,  it supports
> following baudrate 9600, 19200, 38400, 57600 and 115200.
>  
> +config STM32X7_SERIAL
> + bool "STMicroelectronics STM32 SoCs on-chip UART"
> + depends on DM_SERIAL && STM32F7
> + help
> +   If you have a machine based on a STM32 F7 you can enable its
> +   onboard serial ports, say Y to this option. If unsure, say N.
> +
>  config MPC8XX_CONS
>   bool "Console driver for MPC8XX"
>   depends on 8xx
> diff --git a/include/configs/stm32f746-disco.h 
> b/include/configs/stm32f746-disco.h
> index 4e0edcb..daf3235 100644
> --- a/include/configs/stm32f746-disco.h
> +++ b/include/configs/stm32f746-disco.h
> @@ -32,7 +32,6 @@
>  #define CONFIG_ENV_SIZE  (8 << 10)
>  
>  #define CONFIG_STM32_FLASH
> -#define CONFIG_STM32X7_SERIAL
>  
>  #define CONFIG_DW_GMAC_DEFAULT_DMA_PBL   (8)
>  #define CONFIG_DW_ALTDESCRIPTOR
> diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
> index 54eee53..c92ac7b 100644
> --- a/scripts/config_whitelist.txt
> +++ b/scripts/config_whitelist.txt
> @@ -2352,7 +2352,6 @@ CONFIG_STATIC_BOARD_REV
>  CONFIG_STATIC_RELA
>  CONFIG_STD_DEVICES_SETTINGS
>  CONFIG_STM32F4DISCOVERY
> -CONFIG_STM32X7_SERIAL
>  CONFIG_STM32_FLASH
>  CONFIG_STM32_GPIO
>  CONFIG_STM32_HSE_HZ
> 
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Re: [U-Boot] [PATCH] stm32: Correct positioning of declaration

[Vikas MANOCHA]

Thanks Simon,

> -Original Message-
> From: Simon Glass [mailto:s...@google.com] On Behalf Of Simon Glass
> Sent: Saturday, July 01, 2017 10:06 AM
> To: U-Boot Mailing List <u-boot@lists.denx.de>
> Cc: Simon Glass <s...@chromium.org>; Albert Aribaud 
> <albert.u.b...@aribaud.net>; Toshifumi NISHINAGA
> <tnishinaga@gmail.com>; Vikas MANOCHA <vikas.mano...@st.com>
> Subject: [PATCH] stm32: Correct positioning of declaration
> 
> The current code gives a warning:
> 
> arch/arm/mach-stm32/stm32f7/soc.c: In function 'arch_cpu_init':
> arch/arm/mach-stm32/stm32f7/soc.c:38:2: error: 'for' loop initial
> declarations are only allowed in C99 or C11 mode
>   for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
>   ^
> arch/arm/mach-stm32/stm32f7/soc.c:38:2: note: use option -std=c99,
> -std=gnu99, -std=c11 or -std=gnu11 to compile your code
> 
> Fix it by moving the declaration to the top of the function.

Reviewed-by : Vikas MANOCHA <vikas.mano...@st.com>

Cheers,
Vikas

> 
> Signed-off-by: Simon Glass <s...@chromium.org> Series-cc trini
> ---
> 
>  arch/arm/mach-stm32/stm32f7/soc.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-stm32/stm32f7/soc.c 
> b/arch/arm/mach-stm32/stm32f7/soc.c
> index 74a9350a31..a960cc1cbf 100644
> --- a/arch/arm/mach-stm32/stm32f7/soc.c
> +++ b/arch/arm/mach-stm32/stm32f7/soc.c
> @@ -17,6 +17,8 @@ u32 get_cpu_rev(void)
> 
>  int arch_cpu_init(void)
>  {
> + int i;
> +
>   struct mpu_region_config stm32_region_config[] = {
>   { 0x, REGION_0, XN_DIS, PRIV_RW_USR_RW,
>   O_I_WB_RD_WR_ALLOC, REGION_4GB },
> @@ -35,7 +37,7 @@ int arch_cpu_init(void)
>   };
> 
>   disable_mpu();
> - for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
> + for (i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
>   mpu_config(_region_config[i]);
>   enable_mpu();
> 
> --
> 2.13.2.725.g09c95d1e9-goog

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Re: [U-Boot] [U-Boot,v2,3/7] stm32: stm32f7: add spl build support

[Vikas MANOCHA]

Hi Tom,

> -Original Message-
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Saturday, June 10, 2017 6:46 AM
> To: Vikas MANOCHA <vikas.mano...@st.com>
> Cc: u-boot@lists.denx.de; Christophe KERELLO <christophe.kere...@st.com>; 
> Alexandre TORGUE <alexandre.tor...@st.com>;
> Christophe PRIOUZEAU <christophe.priouz...@st.com>
> Subject: Re: [U-Boot,v2,3/7] stm32: stm32f7: add spl build support
> 
> On Sun, May 28, 2017 at 12:55:10PM -0700, Vikas Manocha wrote:
> 
> > This commit supports booting from stm32 internal nor flash. spl U-Boot
> > initializes the sdram memory, copies next image (e.g. standard U-Boot)
> > to sdram & then jumps to entry point.
> >
> > Here are the flash memory addresses for U-Boot-spl & standard U-Boot:
> > - spl U-Boot: 0x0800_
> > - standard U-Boot   : 0x0800_8000
> >
> > To compile u-boot without spl: Remove SUPPORT_SPL configuration
> > (arch/arm/mach-stm32/Kconfig)
> >
> > Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
> 
> I had to rework the Kconfig locations here slightly (and in follow-up
> patches) to have the main select's be under STM32F7 in 
> arch/arm/mach-stm32/Kconfig as it's not right to introduce a second 'config
> SUPPORT_SPL\nselect ...' stanza inside of arch/arm/mach-stm32/stm32f7/Kconfig.

Thanks for the kconfig rework, appreciate it.

Cheers,
Vikas

> 
> Reviewed-by: Tom Rini <tr...@konsulko.com>
> 
> --
> Tom
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Re: [U-Boot] [PATCH 1/2] arm: Add Kconfig symbols used for Linux asm compatibility

[Vikas MANOCHA]

Hi Tom,

> -Original Message-
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Thursday, June 08, 2017 5:12 PM
> To: Vikas MANOCHA <vikas.mano...@st.com>
> Cc: Phil Edworthy <phil.edwor...@renesas.com>; Albert Aribaud 
> <albert.u.b...@aribaud.net>; Kamil Lulko
> <kamil.lu...@gmail.com>; u-boot@lists.denx.de
> Subject: Re: [PATCH 1/2] arm: Add Kconfig symbols used for Linux asm 
> compatibility
> 
> On Fri, Jun 09, 2017 at 12:07:40AM +, Vikas MANOCHA wrote:
> 
> > Hi Albert/Tom,
> >
> > > -Original Message-
> > > From: Phil Edworthy [mailto:phil.edwor...@renesas.com]
> > > Sent: Wednesday, May 31, 2017 11:33 PM
> > > To: Albert Aribaud <albert.u.b...@aribaud.net>
> > > Cc: Tom Rini <tr...@konsulko.com>; Vikas MANOCHA
> > > <vikas.mano...@st.com>; Kamil Lulko <kamil.lu...@gmail.com>; u-
> > > b...@lists.denx.de; Phil Edworthy <phil.edwor...@renesas.com>
> > > Subject: [PATCH 1/2] arm: Add Kconfig symbols used for Linux asm
> > > compatibility
> > >
> > > Rather than change asm files that come from Linux, add the symbols
> > > to Kconfig. Since one of the symbols is for thumb2 builds, make CPU_V7M 
> > > always select them.
> > >
> > > Signed-off-by: Phil Edworthy <phil.edwor...@renesas.com>
> > > ---
> > >  arch/arm/Kconfig  | 10 ++
> > >  arch/arm/lib/Makefile |  2 --
> > >  2 files changed, 10 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index
> > > 2a3a36e..2793651 100644
> > > --- a/arch/arm/Kconfigl
> > > +++ b/arch/arm/Kconfig
> > > @@ -19,6 +19,15 @@ config HAS_VBAR
> > >  config HAS_THUMB2
> > >   bool
> > >
> > > +# Used for compatibility with asm files copied from the kernel
> > > +config ARM_ASM_UNIFIED
> > > + bool
> > > + default y
> >
> > Is every arm arch (arm720, arm926 etc) assembly code written for unified ?
> > Otherwise we might have run-time side effects.
> 
> I could be missing something, but this is only used by  and 
> in turn only by arch/arm/lib/*.S, where we already had
> been defining this.

Yes, you are right. I was under the impression that asm/assembler.h is being 
used by all arm archs everywhere like startup code, cache mgt etc.

Cheers,
Vikas

> 
> --
> Tom
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Re: [U-Boot] [PATCH 1/2] arm: Add Kconfig symbols used for Linux asm compatibility

[Vikas MANOCHA]

Hi Albert/Tom,

> -Original Message-
> From: Phil Edworthy [mailto:phil.edwor...@renesas.com]
> Sent: Wednesday, May 31, 2017 11:33 PM
> To: Albert Aribaud <albert.u.b...@aribaud.net>
> Cc: Tom Rini <tr...@konsulko.com>; Vikas MANOCHA <vikas.mano...@st.com>; 
> Kamil Lulko <kamil.lu...@gmail.com>; u-
> b...@lists.denx.de; Phil Edworthy <phil.edwor...@renesas.com>
> Subject: [PATCH 1/2] arm: Add Kconfig symbols used for Linux asm compatibility
> 
> Rather than change asm files that come from Linux, add the symbols to 
> Kconfig. Since one of the symbols is for thumb2 builds, make
> CPU_V7M always select them.
> 
> Signed-off-by: Phil Edworthy <phil.edwor...@renesas.com>
> ---
>  arch/arm/Kconfig  | 10 ++
>  arch/arm/lib/Makefile |  2 --
>  2 files changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2a3a36e..2793651 100644
> --- a/arch/arm/Kconfigl
> +++ b/arch/arm/Kconfig
> @@ -19,6 +19,15 @@ config HAS_VBAR
>  config HAS_THUMB2
>   bool
> 
> +# Used for compatibility with asm files copied from the kernel config
> +ARM_ASM_UNIFIED
> + bool
> + default y

Is every arm arch (arm720, arm926 etc) assembly code written for unified ?
Otherwise we might have run-time side effects.

Cheers,
Vikas

> +
> +# Used for compatibility with asm files copied from the kernel config
> +THUMB2_KERNEL
> + bool
> +
>  # If set, the workarounds for these ARM errata are applied early during 
> U-Boot  # startup. Note that in general these options force
> the workarounds to be  # applied; no CPU-type/version detection exists, 
> unlike the similar options in @@ -128,6 +137,7 @@ config
> CPU_V7  config CPU_V7M
>   bool
>   select HAS_THUMB2
> + select THUMB2_KERNEL
>   select SYS_CACHE_SHIFT_5
> 
>  config CPU_PXA
> diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 
> f162c14..6e1c436 100644
> --- a/arch/arm/lib/Makefile
> +++ b/arch/arm/lib/Makefile
> @@ -72,8 +72,6 @@ ifneq (,$(findstring 
> -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS)))
>  extra-y  += eabi_compat.o
>  endif
> 
> -asflags-y += -DCONFIG_ARM_ASM_UNIFIED
> -
>  # some files can only build in ARM or THUMB2, not THUMB1
> 
>  ifdef CONFIG_$(SPL_)SYS_THUMB_BUILD
> --
> 2.7.4

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Re: [U-Boot] [PATCH v2 0/7] spl: add xip booting support

[Vikas MANOCHA]

Hi Tom, 

> -Original Message-
> From: Vikas MANOCHA
> Sent: Sunday, May 28, 2017 12:55 PM
> To: u-boot@lists.denx.de
> Cc: Vikas MANOCHA <vikas.mano...@st.com>; Patrick DELAUNAY 
> <patrick.delau...@st.com>; Patrice CHOTARD
> <patrice.chot...@st.com>; Christophe KERELLO <christophe.kere...@st.com>; 
> Christophe PRIOUZEAU
> <christophe.priouz...@st.com>; Alexandre TORGUE <alexandre.tor...@st.com>
> Subject: [PATCH v2 0/7] spl: add xip booting support
> 
> This patchset adds support for XIP (execute in place) of U-Boot or kernel 
> image and enables it for stm32f7.

Pls apply this series whenever you get a chance.
Cheers,
Vikas

> 
> Changed in v2:
> - added patch to move v7m thumb mode just before next image boot
> - removed extra blank line.
> 
> Vikas Manocha (7):
>   spl: armv7m: to keep ARM v7M in thumb mode before booting next image
>   stm32f7: remove duplicate configs
>   stm32: stm32f7: add spl build support
>   SPL: Add XIP booting support
>   serial: stm32f7: disable overrun
>   spl: stm32f7: add kernel boot support
>   spl: stm32f7: configure for xip booting
> 
>  arch/arm/include/asm/spl.h |  1 +
>  arch/arm/mach-stm32/Kconfig|  1 +
>  arch/arm/mach-stm32/stm32f7/Kconfig| 24 
>  board/st/stm32f746-disco/stm32f746-disco.c | 36 
> +-
>  common/spl/Kconfig |  9 
>  common/spl/Makefile|  1 +
>  common/spl/spl.c   |  6 ++---
>  common/spl/spl_xip.c   | 28 +++
>  configs/stm32f746-disco_defconfig  |  5 -
>  drivers/serial/serial_stm32x7.c|  3 +++
>  drivers/serial/serial_stm32x7.h|  2 ++
>  include/configs/stm32f746-disco.h  | 31 ++---
>  12 files changed, 135 insertions(+), 12 deletions(-)  create mode 100644 
> common/spl/spl_xip.c
> 
> --
> 1.9.1

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Re: [U-Boot] [PATCH v2] armv7m: Fix larger builds

[Vikas MANOCHA]

> On May 31, 2017, at 12:27 AM, Phil Edworthy <phil.edwor...@renesas.com> wrote:
> 
> The branch instruction only has an 11-bit relative target address, which
> is sometimes not enough.
> 
> Signed-off-by: Phil Edworthy <phil.edwor...@renesas.com>

Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

Cheers,
Vikas

> ---
> v2:
> - Use W(b) instead of ldr+mov. Using this macro requires
>   CONFIG_ARM_ASM_UNIFIED and CONFIG_THUMB2_KERNEL to be defined.
> ---
> arch/arm/cpu/armv7m/Makefile | 3 +++
> arch/arm/cpu/armv7m/start.S  | 4 +++-
> 2 files changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/cpu/armv7m/Makefile b/arch/arm/cpu/armv7m/Makefile
> index 257fc7f..df1fc95 100644
> --- a/arch/arm/cpu/armv7m/Makefile
> +++ b/arch/arm/cpu/armv7m/Makefile
> @@ -8,3 +8,6 @@
> extra-y := start.o
> obj-y += cpu.o cache.o mpu.o
> obj-$(CONFIG_SYS_ARCH_TIMER) += systick-timer.o
> +
> +asflags-y += -DCONFIG_ARM_ASM_UNIFIED
> +asflags-y += -DCONFIG_THUMB2_KERNEL
> diff --git a/arch/arm/cpu/armv7m/start.S b/arch/arm/cpu/armv7m/start.S
> index 49f2720..890c773 100644
> --- a/arch/arm/cpu/armv7m/start.S
> +++ b/arch/arm/cpu/armv7m/start.S
> @@ -5,10 +5,12 @@
>  * SPDX-License-Identifier:GPL-2.0+
>  */
> 
> +#include 
> +
> .globlreset
> .type reset, %function
> reset:
> -b_main
> +W(b)_main
> 
> .globlc_runtime_cpu_setup
> c_runtime_cpu_setup:
> -- 
> 2.7.4
> 
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[U-Boot] [PATCH v2 5/7] serial: stm32f7: disable overrun

[Vikas Manocha]

With overrun enabled, serial port console freezes & stops receiving data with
overun error if we keep sending data.

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---

Changed in v2: None

 drivers/serial/serial_stm32x7.c | 3 +++
 drivers/serial/serial_stm32x7.h | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/drivers/serial/serial_stm32x7.c b/drivers/serial/serial_stm32x7.c
index 1907cef..2b305cd 100644
--- a/drivers/serial/serial_stm32x7.c
+++ b/drivers/serial/serial_stm32x7.c
@@ -93,6 +93,9 @@ static int stm32_serial_probe(struct udevice *dev)
}
 #endif
 
+   /* Disable usart-> disable overrun-> enable usart */
+   clrbits_le32(>cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
+   setbits_le32(>cr3, USART_CR3_OVRDIS);
setbits_le32(>cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
 
return 0;
diff --git a/drivers/serial/serial_stm32x7.h b/drivers/serial/serial_stm32x7.h
index 6190d67..8c02548 100644
--- a/drivers/serial/serial_stm32x7.h
+++ b/drivers/serial/serial_stm32x7.h
@@ -27,6 +27,8 @@ struct stm32_usart {
 #define USART_CR1_TE   (1 << 3)
 #define USART_CR1_UE   (1 << 0)
 
+#define USART_CR3_OVRDIS   (1 << 12)
+
 #define USART_SR_FLAG_RXNE (1 << 5)
 #define USART_SR_FLAG_TXE  (1 << 7)
 
-- 
1.9.1

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[U-Boot] [PATCH v2 4/7] SPL: Add XIP booting support

[Vikas Manocha]

Enable support for XIP (execute in place) of U-Boot or kernel image. There is
no need to copy image from flash to ram if flash supports execute in place.

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---

Changed in v2:
- removed v7m thumb mode for entry point, added separate patch.
- removed extra blank line.

 arch/arm/include/asm/spl.h |  1 +
 common/spl/Kconfig |  9 +
 common/spl/Makefile|  1 +
 common/spl/spl_xip.c   | 28 
 4 files changed, 39 insertions(+)
 create mode 100644 common/spl/spl_xip.c

diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h
index a0bda28..0a3536b 100644
--- a/arch/arm/include/asm/spl.h
+++ b/arch/arm/include/asm/spl.h
@@ -29,6 +29,7 @@ enum {
BOOT_DEVICE_I2C,
BOOT_DEVICE_BOARD,
BOOT_DEVICE_DFU,
+   BOOT_DEVICE_XIP,
BOOT_DEVICE_NONE
 };
 #endif
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index f51ae2c..52a5271 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -459,6 +459,15 @@ config SPL_NOR_SUPPORT
  a memory-mapped device makes it very easy to access. Loading from
  NOR is typically achieved with just a memcpy().
 
+config SPL_XIP_SUPPORT
+   bool "Support XIP"
+   depends on SPL
+   help
+ Enable support for execute in place of U-Boot or kernel image. There
+ is no need to copy image from flash to ram if flash supports execute
+ in place. Its very useful in systems having enough flash but not
+ enough ram to load the image.
+
 config SPL_ONENAND_SUPPORT
bool "Support OneNAND flash"
depends on SPL
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 1933cbd..88deeaf 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -12,6 +12,7 @@ ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
 obj-$(CONFIG_SPL_LOAD_FIT) += spl_fit.o
 obj-$(CONFIG_SPL_NOR_SUPPORT) += spl_nor.o
+obj-$(CONFIG_SPL_XIP_SUPPORT) += spl_xip.o
 obj-$(CONFIG_SPL_YMODEM_SUPPORT) += spl_ymodem.o
 ifndef CONFIG_SPL_UBI
 obj-$(CONFIG_SPL_NAND_SUPPORT) += spl_nand.o
diff --git a/common/spl/spl_xip.c b/common/spl/spl_xip.c
new file mode 100644
index 000..18c7d11
--- /dev/null
+++ b/common/spl/spl_xip.c
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2017 Vikas Manocha <vikas.mano...@st.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+
+static int spl_xip(struct spl_image_info *spl_image,
+  struct spl_boot_device *bootdev)
+{
+#ifdef CONFIG_SPL_OS_BOOT
+   if (!spl_start_uboot()) {
+   spl_image->arg = (void *)CONFIG_SYS_FDT_BASE;
+   spl_image->name = "Linux";
+   spl_image->os = IH_OS_LINUX;
+   spl_image->load_addr = CONFIG_SYS_LOAD_ADDR;
+   spl_image->entry_point = CONFIG_SYS_LOAD_ADDR;
+   debug("spl: payload xipImage, load addr: 0x%lx\n",
+ spl_image->load_addr);
+   return 0;
+   }
+#endif
+   return(spl_parse_image_header(spl_image, (const struct image_header *)
+  CONFIG_SYS_UBOOT_BASE));
+}
+SPL_LOAD_IMAGE_METHOD("XIP", 0, BOOT_DEVICE_XIP, spl_xip);
-- 
1.9.1

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[U-Boot] [PATCH v2 7/7] spl: stm32f7: configure for xip booting

[Vikas Manocha]

With xip booting configuration, we don't need to copy the next image
(U-Boot or linux xipimage) from flash to sdram area.

Flash memory organization is like this:
spl-U-Boot: u-boot-spl.bin  : 0x0800_
U-Boot :u-boot-dtb.bin  : 0x0800_8000
linux : xipImage: 0x0800_8000

It is also possible to have U-Boot binary & linux binaries configured at
different addresses of flash memory like U-Boot at 0x0800_8000 & linux
xipImage at 0x0800_4000. But in any case, spl-U-Boot needs to be compiled for
U-Boot as next binary with SPL_OS_BOOT option disabled.
By default, spl is configured to boot linux xipImage.

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---

Changed in v2: None

 arch/arm/mach-stm32/stm32f7/Kconfig|  1 +
 board/st/stm32f746-disco/stm32f746-disco.c |  2 +-
 include/configs/stm32f746-disco.h  | 12 +---
 3 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-stm32/stm32f7/Kconfig 
b/arch/arm/mach-stm32/stm32f7/Kconfig
index 3f6455e..6acf9cf 100644
--- a/arch/arm/mach-stm32/stm32f7/Kconfig
+++ b/arch/arm/mach-stm32/stm32f7/Kconfig
@@ -22,6 +22,7 @@ config SUPPORT_SPL
select SPL_DM_SEQ_ALIAS
select SPL_OF_TRANSLATE
select SPL_OS_BOOT
+   select SPL_XIP_SUPPORT
 
 config SPL_PINCTRL_FULL
default n if TARGET_STM32F746_DISCO
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
b/board/st/stm32f746-disco/stm32f746-disco.c
index 335dcb9..11957e0 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -117,7 +117,7 @@ void spl_board_init(void)
 }
 u32 spl_boot_device(void)
 {
-   return BOOT_DEVICE_NOR;
+   return BOOT_DEVICE_XIP;
 }
 
 #endif
diff --git a/include/configs/stm32f746-disco.h 
b/include/configs/stm32f746-disco.h
index 9052025..4e0edcb 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -12,17 +12,18 @@
 #define CONFIG_SYS_INIT_SP_ADDR0x2005
 
 #ifdef CONFIG_SUPPORT_SPL
-#define CONFIG_SYS_TEXT_BASE   0xC000
+#define CONFIG_SYS_TEXT_BASE   0x08008000
+#define CONFIG_SYS_LOAD_ADDR   0x08008000
 #else
 #define CONFIG_SYS_TEXT_BASE   CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_LOAD_ADDR   0xC040
+#define CONFIG_LOADADDR0xC040
 #endif
 
 /*
  * Configuration of the external SDRAM memory
  */
 #define CONFIG_NR_DRAM_BANKS   1
-#define CONFIG_SYS_LOAD_ADDR   0xC040
-#define CONFIG_LOADADDR0xC040
 
 #define CONFIG_SYS_MAX_FLASH_SECT  8
 #define CONFIG_SYS_MAX_FLASH_BANKS 1
@@ -83,16 +84,13 @@
 #define CONFIG_SPL_TEXT_BASE   CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
 #define CONFIG_SYS_SPL_LEN 0x8000
-#define CONFIG_SYS_UBOOT_START 0XC3FD
+#define CONFIG_SYS_UBOOT_START 0x080083FD
 #define CONFIG_SYS_UBOOT_BASE  (CONFIG_SYS_FLASH_BASE + \
 CONFIG_SYS_SPL_LEN)
 
-#define CONFIG_SYS_OS_BASE 0x0804
 /* DT blob (fdt) address */
-#define CONFIG_SYS_SPL_ARGS_ADDR0xC100
 #define CONFIG_SYS_FDT_BASE(CONFIG_SYS_FLASH_BASE + \
0x1C)
-#define CONFIG_SYS_FDT_SIZE(20*1024)
 #endif
 /* For SPL ends */
 
-- 
1.9.1

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[U-Boot] [PATCH v2 6/7] spl: stm32f7: add kernel boot support

[Vikas Manocha]

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---

Changed in v2: None

 arch/arm/mach-stm32/stm32f7/Kconfig| 1 +
 board/st/stm32f746-disco/stm32f746-disco.c | 9 +
 include/configs/stm32f746-disco.h  | 7 +++
 3 files changed, 17 insertions(+)

diff --git a/arch/arm/mach-stm32/stm32f7/Kconfig 
b/arch/arm/mach-stm32/stm32f7/Kconfig
index c13fafa..3f6455e 100644
--- a/arch/arm/mach-stm32/stm32f7/Kconfig
+++ b/arch/arm/mach-stm32/stm32f7/Kconfig
@@ -21,6 +21,7 @@ config SUPPORT_SPL
select SPL_RAM
select SPL_DM_SEQ_ALIAS
select SPL_OF_TRANSLATE
+   select SPL_OS_BOOT
 
 config SPL_PINCTRL_FULL
default n if TARGET_STM32F746_DISCO
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
b/board/st/stm32f746-disco/stm32f746-disco.c
index 4f2b677..335dcb9 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -91,6 +91,15 @@ int board_early_init_f(void)
 #endif
 
 #ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_SPL_OS_BOOT
+int spl_start_uboot(void)
+{
+   debug("SPL: booting kernel\n");
+   /* break into full u-boot on 'c' */
+   return serial_tstc() && serial_getc() == 'c';
+}
+#endif
+
 int spl_dram_init(void)
 {
struct udevice *dev;
diff --git a/include/configs/stm32f746-disco.h 
b/include/configs/stm32f746-disco.h
index 055fdf8..9052025 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -86,6 +86,13 @@
 #define CONFIG_SYS_UBOOT_START 0XC3FD
 #define CONFIG_SYS_UBOOT_BASE  (CONFIG_SYS_FLASH_BASE + \
 CONFIG_SYS_SPL_LEN)
+
+#define CONFIG_SYS_OS_BASE 0x0804
+/* DT blob (fdt) address */
+#define CONFIG_SYS_SPL_ARGS_ADDR0xC100
+#define CONFIG_SYS_FDT_BASE(CONFIG_SYS_FLASH_BASE + \
+   0x1C)
+#define CONFIG_SYS_FDT_SIZE(20*1024)
 #endif
 /* For SPL ends */
 
-- 
1.9.1

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[U-Boot] [PATCH v2 3/7] stm32: stm32f7: add spl build support

[Vikas Manocha]

This commit supports booting from stm32 internal nor flash. spl U-Boot
initializes the sdram memory, copies next image (e.g. standard U-Boot)
to sdram & then jumps to entry point.

Here are the flash memory addresses for U-Boot-spl & standard U-Boot:
- spl U-Boot: 0x0800_
- standard U-Boot   : 0x0800_8000

To compile u-boot without spl: Remove SUPPORT_SPL configuration
(arch/arm/mach-stm32/Kconfig)

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---

Changed in v2: None

 arch/arm/mach-stm32/Kconfig|  1 +
 arch/arm/mach-stm32/stm32f7/Kconfig| 22 ++
 board/st/stm32f746-disco/stm32f746-disco.c | 27 ++-
 configs/stm32f746-disco_defconfig  |  1 -
 include/configs/stm32f746-disco.h  | 22 +-
 5 files changed, 70 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
index ec6b3ff..879383f 100644
--- a/arch/arm/mach-stm32/Kconfig
+++ b/arch/arm/mach-stm32/Kconfig
@@ -8,6 +8,7 @@ config STM32F1
 
 config STM32F7
bool "stm32f7 family"
+   select SUPPORT_SPL
 
 source "arch/arm/mach-stm32/stm32f4/Kconfig"
 source "arch/arm/mach-stm32/stm32f1/Kconfig"
diff --git a/arch/arm/mach-stm32/stm32f7/Kconfig 
b/arch/arm/mach-stm32/stm32f7/Kconfig
index 287e5ad..c13fafa 100644
--- a/arch/arm/mach-stm32/stm32f7/Kconfig
+++ b/arch/arm/mach-stm32/stm32f7/Kconfig
@@ -3,6 +3,28 @@ if STM32F7
 config TARGET_STM32F746_DISCO
bool "STM32F746 Discovery board"
 
+config SUPPORT_SPL
+   select SPL
+   select SPL_FRAMEWORK
+   select SPL_SERIAL_SUPPORT
+   select SPL_CLK
+   select SPL_OF_CONTROL
+   select SPL_OF_LIBFDT
+   select SPL_GPIO_SUPPORT
+   select SPL_LIBCOMMON_SUPPORT
+   select SPL_LIBGENERIC_SUPPORT
+   select SPL_DRIVERS_MISC_SUPPORT
+   select SPL_SYS_MALLOC_SIMPLE
+   select SPL_MTD_SUPPORT
+   select SPL_DM
+   select SPL_PINCTRL
+   select SPL_RAM
+   select SPL_DM_SEQ_ALIAS
+   select SPL_OF_TRANSLATE
+
+config SPL_PINCTRL_FULL
+   default n if TARGET_STM32F746_DISCO
+
 source "board/st/stm32f746-disco/Kconfig"
 
 endif
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
b/board/st/stm32f746-disco/stm32f746-disco.c
index dc3a9dc..4f2b677 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -36,16 +37,18 @@ int get_memory_base_size(fdt_addr_t *mr_base, fdt_addr_t 
*mr_size)
 }
 int dram_init(void)
 {
-   struct udevice *dev;
int rv;
fdt_addr_t mr_base, mr_size;
 
+#ifndef CONFIG_SUPPORT_SPL
+   struct udevice *dev;
rv = uclass_get_device(UCLASS_RAM, 0, );
if (rv) {
debug("DRAM init failed: %d\n", rv);
return rv;
}
 
+#endif
rv = get_memory_base_size(_base, _size);
if (rv)
return rv;
@@ -87,6 +90,28 @@ int board_early_init_f(void)
 }
 #endif
 
+#ifdef CONFIG_SPL_BUILD
+int spl_dram_init(void)
+{
+   struct udevice *dev;
+   int rv;
+   rv = uclass_get_device(UCLASS_RAM, 0, );
+   if (rv)
+   debug("DRAM init failed: %d\n", rv);
+   return rv;
+}
+void spl_board_init(void)
+{
+   spl_dram_init();
+   preloader_console_init();
+   arch_cpu_init(); /* to configure mpu for sdram rw permissions */
+}
+u32 spl_boot_device(void)
+{
+   return BOOT_DEVICE_NOR;
+}
+
+#endif
 u32 get_board_rev(void)
 {
return 0;
diff --git a/configs/stm32f746-disco_defconfig 
b/configs/stm32f746-disco_defconfig
index a334d50..766b111 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -39,7 +39,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_PINCTRL=y
 # CONFIG_PINCTRL_FULL is not set
 CONFIG_PINCTRL_STM32=y
-# CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/include/configs/stm32f746-disco.h 
b/include/configs/stm32f746-disco.h
index 1ee5815..055fdf8 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -10,7 +10,12 @@
 
 #define CONFIG_SYS_FLASH_BASE  0x0800
 #define CONFIG_SYS_INIT_SP_ADDR0x2005
-#define CONFIG_SYS_TEXT_BASE   0x0800
+
+#ifdef CONFIG_SUPPORT_SPL
+#define CONFIG_SYS_TEXT_BASE   0xC000
+#else
+#define CONFIG_SYS_TEXT_BASE   CONFIG_SYS_FLASH_BASE
+#endif
 
 /*
  * Configuration of the external SDRAM memory
@@ -69,4 +74,19 @@
 #define CONFIG_CMD_CACHE
 #define CONFIG_BOARD_LATE_INIT
 #define CONFIG_DISPLAY_BOARDINFO
+
+/* For SPL */
+#ifdef CONFIG_SUPPORT_SPL
+#define CONFIG_SPL_STACK   CONFIG_SYS_INIT_SP_ADDR
+#define CONFIG_SPL_FRAMEWORK
+#define

[U-Boot] [PATCH v2 1/7] spl: armv7m: to keep ARM v7M in thumb mode before booting next image

[Vikas Manocha]

On ARM v7M, the processor will return to ARM mode when executing blx
instruction with bit 0 of the address == 0. Always set it to 1 to stay in thumb
mode.

At present, it is applied only for raw U-Boot. This patch moves it to just
before booting next image. This way armv7m will be in thumb mode for any image
like raw or image with header like zImage or standard U-Boot.

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---

Changed in v2: Added this patch in v2

 common/spl/spl.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/common/spl/spl.c b/common/spl/spl.c
index df984b8..1bdae3e 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -121,9 +121,6 @@ void spl_set_header_raw_uboot(struct spl_image_info 
*spl_image)
 {
spl_image->size = CONFIG_SYS_MONITOR_LEN;
spl_image->entry_point = CONFIG_SYS_UBOOT_START;
-#ifdef CONFIG_CPU_V7M
-   spl_image->entry_point |= 0x1;
-#endif
spl_image->load_addr = CONFIG_SYS_TEXT_BASE;
spl_image->os = IH_OS_U_BOOT;
spl_image->name = "U-Boot";
@@ -396,6 +393,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
hang();
}
 
+#ifdef CONFIG_CPU_V7M
+   spl_image.entry_point |= 0x1;
+#endif
switch (spl_image.os) {
case IH_OS_U_BOOT:
debug("Jumping to U-Boot\n");
-- 
1.9.1

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[U-Boot] [PATCH v2 2/7] stm32f7: remove duplicate configs

[Vikas Manocha]

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---

Changed in v2: None

 configs/stm32f746-disco_defconfig | 4 
 1 file changed, 4 deletions(-)

diff --git a/configs/stm32f746-disco_defconfig 
b/configs/stm32f746-disco_defconfig
index 4322aad..a334d50 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -44,10 +44,6 @@ CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
-CONFIG_CLK=y
-CONFIG_PINCTRL=y
-# CONFIG_PINCTRL_FULL is not set
-CONFIG_PINCTRL_STM32=y
 CONFIG_RAM=y
 CONFIG_STM32_SDRAM=y
 CONFIG_DM_GPIO=y
-- 
1.9.1

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[U-Boot] [PATCH v2 0/7] spl: add xip booting support

[Vikas Manocha]

This patchset adds support for XIP (execute in place) of U-Boot or kernel image
and enables it for stm32f7. 

Changed in v2:
- added patch to move v7m thumb mode just before next image boot
- removed extra blank line.

Vikas Manocha (7):
  spl: armv7m: to keep ARM v7M in thumb mode before booting next image
  stm32f7: remove duplicate configs
  stm32: stm32f7: add spl build support
  SPL: Add XIP booting support
  serial: stm32f7: disable overrun
  spl: stm32f7: add kernel boot support
  spl: stm32f7: configure for xip booting

 arch/arm/include/asm/spl.h |  1 +
 arch/arm/mach-stm32/Kconfig|  1 +
 arch/arm/mach-stm32/stm32f7/Kconfig| 24 
 board/st/stm32f746-disco/stm32f746-disco.c | 36 +-
 common/spl/Kconfig |  9 
 common/spl/Makefile|  1 +
 common/spl/spl.c   |  6 ++---
 common/spl/spl_xip.c   | 28 +++
 configs/stm32f746-disco_defconfig  |  5 -
 drivers/serial/serial_stm32x7.c|  3 +++
 drivers/serial/serial_stm32x7.h|  2 ++
 include/configs/stm32f746-disco.h  | 31 ++---
 12 files changed, 135 insertions(+), 12 deletions(-)
 create mode 100644 common/spl/spl_xip.c

-- 
1.9.1

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Re: [U-Boot] [PATCH] armv7m: Fix larger builds

[Vikas MANOCHA]

Hi Phil,

> -Original Message-
> From: Phil Edworthy [mailto:phil.edwor...@renesas.com]
> Sent: Thursday, May 25, 2017 6:58 AM
> To: Vikas MANOCHA <vikas.mano...@st.com>; Albert Aribaud 
> <albert.u.b...@aribaud.net>
> Cc: Tom Rini <tr...@konsulko.com>; Kamil Lulko <kamil.lu...@gmail.com>; 
> u-boot@lists.denx.de
> Subject: RE: [PATCH] armv7m: Fix larger builds
> 
> Hi Vikas,
> 
> On 25 May 2017 10:16 Phil Edworthy wrote:
> > > On 24 May 2017 18:32 Vikas MANOCHA wrote:
> > > Hi Phil,
> > >
> > > > On Wednesday, May 24, 2017 7:34 AM Phil Edworthy wrote:
> > > > The branch instruction only has an 11-bit relative target address, 
> > > > which is
> > > sometimes not enough.
> > > >
> > > > Signed-off-by: Phil Edworthy <phil.edwor...@renesas.com>
> > > > ---
> > > >  arch/arm/cpu/armv7m/start.S | 3 ++-
> > > >  1 file changed, 2 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/arch/arm/cpu/armv7m/start.S
> > b/arch/arm/cpu/armv7m/start.S
> > > > index 49f2720..d79adb5 100644
> > > > --- a/arch/arm/cpu/armv7m/start.S
> > > > +++ b/arch/arm/cpu/armv7m/start.S
> > > > @@ -8,7 +8,8 @@
> > > >  .globl reset
> > > >  .type reset, %function
> > > >  reset:
> > > > -   b   _main
> > > > +   ldr r0, =_main
> > > > +   mov pc, r0
> > >
> > > How about using W(b) for wider range ?
> > Yes, that makes better sense!
> Hmm, if I use W(b) it complains with:
> arch/arm/cpu/armv7m/start.S:14:(.text+0x0): relocation truncated to fit: 
> R_ARM_THM_JUMP11 against symbol `_main' defined in
> .text section in arch/arm/lib/built-in.o

Seems like the generated branch instruction is still 16 bit, you can check the 
disassembly.  Which compiler & version you are using ? 
Are you getting the same issue with "b  _main" also. If no, compare the 
disassembly.

Cheers,
Vikas

> 
> Any ideas why?
> Phil
> 
> > Thanks
> > Phil
> >
> > > Cheers,
> > > Vikas
> > >
> > > >
> > > >  .globl c_runtime_cpu_setup
> > > >  c_runtime_cpu_setup:
> > > > --
> > > > 2.7.4

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Re: [U-Boot] [PATCH] armv7m: Fix larger builds

[Vikas MANOCHA]

Hi Phil,

> -Original Message-
> From: Phil Edworthy [mailto:phil.edwor...@renesas.com]
> Sent: Wednesday, May 24, 2017 7:34 AM
> To: Albert Aribaud <albert.u.b...@aribaud.net>
> Cc: Tom Rini <tr...@konsulko.com>; Vikas MANOCHA <vikas.mano...@st.com>; 
> Kamil Lulko <kamil.lu...@gmail.com>; u-
> b...@lists.denx.de; Phil Edworthy <phil.edwor...@renesas.com>
> Subject: [PATCH] armv7m: Fix larger builds
> 
> The branch instruction only has an 11-bit relative target address, which is 
> sometimes not enough.
> 
> Signed-off-by: Phil Edworthy <phil.edwor...@renesas.com>
> ---
>  arch/arm/cpu/armv7m/start.S | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/cpu/armv7m/start.S b/arch/arm/cpu/armv7m/start.S index 
> 49f2720..d79adb5 100644
> --- a/arch/arm/cpu/armv7m/start.S
> +++ b/arch/arm/cpu/armv7m/start.S
> @@ -8,7 +8,8 @@
>  .globl   reset
>  .type reset, %function
>  reset:
> - b   _main
> + ldr r0, =_main
> + mov pc, r0

How about using W(b) for wider range ?

Cheers,
Vikas

> 
>  .globl   c_runtime_cpu_setup
>  c_runtime_cpu_setup:
> --
> 2.7.4

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Re: [U-Boot] [PATCH 3/6] SPL: Add XIP booting support

[Vikas MANOCHA]

Hi Alex,

> -Original Message-
> From: Alexandru Gagniuc [mailto:ale...@adaptrum.com]
> Sent: Monday, May 22, 2017 10:37 AM
> To: Vikas MANOCHA <vikas.mano...@st.com>; u-boot@lists.denx.de
> Cc: Patrick DELAUNAY <patrick.delau...@st.com>; Patrice CHOTARD 
> <patrice.chot...@st.com>; Christophe KERELLO
> <christophe.kere...@st.com>; Christophe PRIOUZEAU 
> <christophe.priouz...@st.com>; Alexandre TORGUE
> <alexandre.tor...@st.com>; Albert Aribaud <albert.u.b...@aribaud.net>; Andrew 
> F. Davis <a...@ti.com>; Bin Meng
> <bmeng...@gmail.com>; B, Ravi <ravib...@ti.com>; Heiko Schocher 
> <h...@denx.de>; Ladislav Michl <la...@linux-mips.org>;
> Masahiro Yamada <yamada.masah...@socionext.com>; Michal Simek 
> <michal.si...@xilinx.com>; Simon Glass
> <s...@chromium.org>; Stefan Agner <stefan.ag...@toradex.com>
> Subject: Re: [PATCH 3/6] SPL: Add XIP booting support
> 
> 
> On 05/22/2017 09:55 AM, Vikas MANOCHA wrote:
> > Hi Alex,
> Hi
> 
> [snip]
> 
> >>
> >>> diff --git a/common/spl/spl_xip.c b/common/spl/spl_xip.c new file
> >>> mode 100644 index 000..50e2f34
> >>> --- /dev/null
> >>> +++ b/common/spl/spl_xip.c
> >>> @@ -0,0 +1,31 @@
> >>> +/*
> >>> + * Copyright (C) 2017 Vikas Manocha <vikas.mano...@st.com>
> >>> + *
> >>> + * SPDX-License-Identifier:  GPL-2.0+
> >>> + */
> >>> +
> >>> +#include 
> >>> +#include 
> >>> +
> >>> +static int spl_xip(struct spl_image_info *spl_image,
> >>> +struct spl_boot_device *bootdev) { #ifdef CONFIG_SPL_OS_BOOT
> >>> + if (!spl_start_uboot()) {
> >>> + spl_image->arg = (void *)CONFIG_SYS_FDT_BASE;
> >>> + spl_image->name = "Linux";
> >>> + spl_image->os = IH_OS_LINUX;
> >>> + spl_image->load_addr = CONFIG_SYS_LOAD_ADDR;
> >>> + spl_image->entry_point = CONFIG_SYS_LOAD_ADDR; #ifdef
> >>> +CONFIG_CPU_V7M
> >>
> >> This looks like it should be handled by spl_set_header_raw_uboot(). I
> >> don't see other SPL loaders do this.
> >
> > We might not want to boot kernel if header is not present in every 
> > situation. With spl_xip config option, we enable if we need it.
> 
> I'm talkVing about the '#ifdef CONFIG_CPU_7M' part. A lot of the spl loaders 
> are mostly boilerplate, but it should be consistent
> boilerplate.
> If there is a good reason to have a different boilerplate, then at the very 
> least a comment should explain "why" it is done different.

#ifdef CONFIG_CPU_V7M part is to keep v7m cpu in thumb mode as it does not 
support arm mode. The same is the reason for it to
be in spl_set_header_raw_uboot().

On a second thought, I think it will be good to move this part just before 
booting next image. In that case it would be required just once.
I will send a separate patch for it.

Cheers,
Vikas

> 
> Alex
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Re: [U-Boot] [PATCH 3/6] SPL: Add XIP booting support

[Vikas MANOCHA]

Hi Alex,

> -Original Message-
> From: Alexandru Gagniuc [mailto:ale...@adaptrum.com]
> Sent: Thursday, May 18, 2017 12:51 PM
> To: Vikas MANOCHA <vikas.mano...@st.com>; u-boot@lists.denx.de
> Cc: Patrick DELAUNAY <patrick.delau...@st.com>; Patrice CHOTARD 
> <patrice.chot...@st.com>; Christophe KERELLO
> <christophe.kere...@st.com>; Christophe PRIOUZEAU 
> <christophe.priouz...@st.com>; Alexandre TORGUE
> <alexandre.tor...@st.com>; Albert Aribaud <albert.u.b...@aribaud.net>; Andrew 
> F. Davis <a...@ti.com>; Bin Meng
> <bmeng...@gmail.com>; B, Ravi <ravib...@ti.com>; Heiko Schocher 
> <h...@denx.de>; Ladislav Michl <la...@linux-mips.org>;
> Masahiro Yamada <yamada.masah...@socionext.com>; Michal Simek 
> <michal.si...@xilinx.com>; Simon Glass
> <s...@chromium.org>; Stefan Agner <stefan.ag...@toradex.com>
> Subject: Re: [PATCH 3/6] SPL: Add XIP booting support
> 
> On 05/18/2017 11:49 AM, Vikas Manocha wrote:
> > Enable support for XIP (execute in place) of U-Boot or kernel image.
> > There is no need to copy image from flash to ram if flash supports execute 
> > in place.
> 
> Awesome. I've had to hack u-boot before to achieve exactly this. It's nice to 
> have a proper implementation.
> 
> 
> [snip]
> 
> > diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
> > b/board/st/stm32f746-disco/stm32f746-disco.c
> > index 4f2b677..e330b1f 100644
> > --- a/board/st/stm32f746-disco/stm32f746-disco.c
> > +++ b/board/st/stm32f746-disco/stm32f746-disco.c
> > @@ -91,6 +91,7 @@ int board_early_init_f(void)
> >  #endif
> >
> >  #ifdef CONFIG_SPL_BUILD
> > +
> Unrelated change.

Oops! I will remove this blank line & so the file from this patch in v2.

> 
> [snip]
> 
> > diff --git a/common/spl/spl_xip.c b/common/spl/spl_xip.c
> > new file mode 100644
> > index 000..50e2f34
> > --- /dev/null
> > +++ b/common/spl/spl_xip.c
> > @@ -0,0 +1,31 @@
> > +/*
> > + * Copyright (C) 2017 Vikas Manocha <vikas.mano...@st.com>
> > + *
> > + * SPDX-License-Identifier:GPL-2.0+
> > + */
> > +
> > +#include 
> > +#include 
> > +
> > +static int spl_xip(struct spl_image_info *spl_image,
> > +  struct spl_boot_device *bootdev)
> > +{
> > +#ifdef CONFIG_SPL_OS_BOOT
> > +   if (!spl_start_uboot()) {
> > +   spl_image->arg = (void *)CONFIG_SYS_FDT_BASE;
> > +   spl_image->name = "Linux";
> > +   spl_image->os = IH_OS_LINUX;
> > +   spl_image->load_addr = CONFIG_SYS_LOAD_ADDR;
> > +   spl_image->entry_point = CONFIG_SYS_LOAD_ADDR;
> > +#ifdef CONFIG_CPU_V7M
> 
> This looks like it should be handled by spl_set_header_raw_uboot(). I
> don't see other SPL loaders do this.

We might not want to boot kernel if header is not present in every situation. 
With spl_xip config option, we enable if we need it.

Cheers,
Vikas

> 
> > +   spl_image->entry_point |= 0x1;
> > +#endif
> > +   debug("spl: payload xipImage, load addr: 0x%lx\n",
> > + spl_image->load_addr);
> > +   return 0;
> > +   }
> > +#endif
> > +   return(spl_parse_image_header(spl_image, (const struct image_header *)
> > +  CONFIG_SYS_UBOOT_BASE));
> > +}
> > +SPL_LOAD_IMAGE_METHOD("XIP", 0, BOOT_DEVICE_XIP, spl_xip);
> >
> 
> Alex
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[U-Boot] [PATCH 4/6] serial: stm32f7: disable overrun

[Vikas Manocha]

With overrun enabled, serial port console freezes & stops receiving data with
overun error if we keep sending data.

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---
 drivers/serial/serial_stm32x7.c | 3 +++
 drivers/serial/serial_stm32x7.h | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/drivers/serial/serial_stm32x7.c b/drivers/serial/serial_stm32x7.c
index 1907cef..2b305cd 100644
--- a/drivers/serial/serial_stm32x7.c
+++ b/drivers/serial/serial_stm32x7.c
@@ -93,6 +93,9 @@ static int stm32_serial_probe(struct udevice *dev)
}
 #endif
 
+   /* Disable usart-> disable overrun-> enable usart */
+   clrbits_le32(>cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
+   setbits_le32(>cr3, USART_CR3_OVRDIS);
setbits_le32(>cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
 
return 0;
diff --git a/drivers/serial/serial_stm32x7.h b/drivers/serial/serial_stm32x7.h
index 6190d67..8c02548 100644
--- a/drivers/serial/serial_stm32x7.h
+++ b/drivers/serial/serial_stm32x7.h
@@ -27,6 +27,8 @@ struct stm32_usart {
 #define USART_CR1_TE   (1 << 3)
 #define USART_CR1_UE   (1 << 0)
 
+#define USART_CR3_OVRDIS   (1 << 12)
+
 #define USART_SR_FLAG_RXNE (1 << 5)
 #define USART_SR_FLAG_TXE  (1 << 7)
 
-- 
1.9.1

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[U-Boot] [PATCH 5/6] spl: stm32f7: add kernel boot support

[Vikas Manocha]

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---
 arch/arm/mach-stm32/stm32f7/Kconfig| 1 +
 board/st/stm32f746-disco/stm32f746-disco.c | 8 
 include/configs/stm32f746-disco.h  | 7 +++
 3 files changed, 16 insertions(+)

diff --git a/arch/arm/mach-stm32/stm32f7/Kconfig 
b/arch/arm/mach-stm32/stm32f7/Kconfig
index c13fafa..3f6455e 100644
--- a/arch/arm/mach-stm32/stm32f7/Kconfig
+++ b/arch/arm/mach-stm32/stm32f7/Kconfig
@@ -21,6 +21,7 @@ config SUPPORT_SPL
select SPL_RAM
select SPL_DM_SEQ_ALIAS
select SPL_OF_TRANSLATE
+   select SPL_OS_BOOT
 
 config SPL_PINCTRL_FULL
default n if TARGET_STM32F746_DISCO
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
b/board/st/stm32f746-disco/stm32f746-disco.c
index e330b1f..335dcb9 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -91,6 +91,14 @@ int board_early_init_f(void)
 #endif
 
 #ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_SPL_OS_BOOT
+int spl_start_uboot(void)
+{
+   debug("SPL: booting kernel\n");
+   /* break into full u-boot on 'c' */
+   return serial_tstc() && serial_getc() == 'c';
+}
+#endif
 
 int spl_dram_init(void)
 {
diff --git a/include/configs/stm32f746-disco.h 
b/include/configs/stm32f746-disco.h
index 055fdf8..9052025 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -86,6 +86,13 @@
 #define CONFIG_SYS_UBOOT_START 0XC3FD
 #define CONFIG_SYS_UBOOT_BASE  (CONFIG_SYS_FLASH_BASE + \
 CONFIG_SYS_SPL_LEN)
+
+#define CONFIG_SYS_OS_BASE 0x0804
+/* DT blob (fdt) address */
+#define CONFIG_SYS_SPL_ARGS_ADDR0xC100
+#define CONFIG_SYS_FDT_BASE(CONFIG_SYS_FLASH_BASE + \
+   0x1C)
+#define CONFIG_SYS_FDT_SIZE(20*1024)
 #endif
 /* For SPL ends */
 
-- 
1.9.1

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[U-Boot] [PATCH 3/6] SPL: Add XIP booting support

[Vikas Manocha]

Enable support for XIP (execute in place) of U-Boot or kernel image. There is
no need to copy image from flash to ram if flash supports execute in place.

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---
 arch/arm/include/asm/spl.h |  1 +
 board/st/stm32f746-disco/stm32f746-disco.c |  1 +
 common/spl/Kconfig |  9 +
 common/spl/Makefile|  1 +
 common/spl/spl_xip.c   | 31 ++
 5 files changed, 43 insertions(+)
 create mode 100644 common/spl/spl_xip.c

diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h
index a0bda28..0a3536b 100644
--- a/arch/arm/include/asm/spl.h
+++ b/arch/arm/include/asm/spl.h
@@ -29,6 +29,7 @@ enum {
BOOT_DEVICE_I2C,
BOOT_DEVICE_BOARD,
BOOT_DEVICE_DFU,
+   BOOT_DEVICE_XIP,
BOOT_DEVICE_NONE
 };
 #endif
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
b/board/st/stm32f746-disco/stm32f746-disco.c
index 4f2b677..e330b1f 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -91,6 +91,7 @@ int board_early_init_f(void)
 #endif
 
 #ifdef CONFIG_SPL_BUILD
+
 int spl_dram_init(void)
 {
struct udevice *dev;
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index f51ae2c..52a5271 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -459,6 +459,15 @@ config SPL_NOR_SUPPORT
  a memory-mapped device makes it very easy to access. Loading from
  NOR is typically achieved with just a memcpy().
 
+config SPL_XIP_SUPPORT
+   bool "Support XIP"
+   depends on SPL
+   help
+ Enable support for execute in place of U-Boot or kernel image. There
+ is no need to copy image from flash to ram if flash supports execute
+ in place. Its very useful in systems having enough flash but not
+ enough ram to load the image.
+
 config SPL_ONENAND_SUPPORT
bool "Support OneNAND flash"
depends on SPL
diff --git a/common/spl/Makefile b/common/spl/Makefile
index 1933cbd..88deeaf 100644
--- a/common/spl/Makefile
+++ b/common/spl/Makefile
@@ -12,6 +12,7 @@ ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
 obj-$(CONFIG_SPL_LOAD_FIT) += spl_fit.o
 obj-$(CONFIG_SPL_NOR_SUPPORT) += spl_nor.o
+obj-$(CONFIG_SPL_XIP_SUPPORT) += spl_xip.o
 obj-$(CONFIG_SPL_YMODEM_SUPPORT) += spl_ymodem.o
 ifndef CONFIG_SPL_UBI
 obj-$(CONFIG_SPL_NAND_SUPPORT) += spl_nand.o
diff --git a/common/spl/spl_xip.c b/common/spl/spl_xip.c
new file mode 100644
index 000..50e2f34
--- /dev/null
+++ b/common/spl/spl_xip.c
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2017 Vikas Manocha <vikas.mano...@st.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+
+static int spl_xip(struct spl_image_info *spl_image,
+  struct spl_boot_device *bootdev)
+{
+#ifdef CONFIG_SPL_OS_BOOT
+   if (!spl_start_uboot()) {
+   spl_image->arg = (void *)CONFIG_SYS_FDT_BASE;
+   spl_image->name = "Linux";
+   spl_image->os = IH_OS_LINUX;
+   spl_image->load_addr = CONFIG_SYS_LOAD_ADDR;
+   spl_image->entry_point = CONFIG_SYS_LOAD_ADDR;
+#ifdef CONFIG_CPU_V7M
+   spl_image->entry_point |= 0x1;
+#endif
+   debug("spl: payload xipImage, load addr: 0x%lx\n",
+ spl_image->load_addr);
+   return 0;
+   }
+#endif
+   return(spl_parse_image_header(spl_image, (const struct image_header *)
+  CONFIG_SYS_UBOOT_BASE));
+}
+SPL_LOAD_IMAGE_METHOD("XIP", 0, BOOT_DEVICE_XIP, spl_xip);
-- 
1.9.1

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[U-Boot] [PATCH 6/6] spl: stm32f7: configure for xip booting

[Vikas Manocha]

With xip booting configuration, we don't need to copy the next image
(U-Boot or linux xipimage) from flash to sdram area.

Flash memory organization is like this:
spl-U-Boot: u-boot-spl.bin  : 0x0800_
U-Boot :u-boot-dtb.bin  : 0x0800_8000
linux : xipImage: 0x0800_8000

It is also possible to have U-Boot binary & linux binaries configured at
different addresses of flash memory like U-Boot at 0x0800_8000 & linux
xipImage at 0x0800_4000. But in any case, spl-U-Boot needs to be compiled for
U-Boot as next binary with SPL_OS_BOOT option disabled.
By default, spl is configured to boot linux xipImage.

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---
 arch/arm/mach-stm32/stm32f7/Kconfig|  1 +
 board/st/stm32f746-disco/stm32f746-disco.c |  2 +-
 include/configs/stm32f746-disco.h  | 12 +---
 3 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-stm32/stm32f7/Kconfig 
b/arch/arm/mach-stm32/stm32f7/Kconfig
index 3f6455e..6acf9cf 100644
--- a/arch/arm/mach-stm32/stm32f7/Kconfig
+++ b/arch/arm/mach-stm32/stm32f7/Kconfig
@@ -22,6 +22,7 @@ config SUPPORT_SPL
select SPL_DM_SEQ_ALIAS
select SPL_OF_TRANSLATE
select SPL_OS_BOOT
+   select SPL_XIP_SUPPORT
 
 config SPL_PINCTRL_FULL
default n if TARGET_STM32F746_DISCO
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
b/board/st/stm32f746-disco/stm32f746-disco.c
index 335dcb9..11957e0 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -117,7 +117,7 @@ void spl_board_init(void)
 }
 u32 spl_boot_device(void)
 {
-   return BOOT_DEVICE_NOR;
+   return BOOT_DEVICE_XIP;
 }
 
 #endif
diff --git a/include/configs/stm32f746-disco.h 
b/include/configs/stm32f746-disco.h
index 9052025..4e0edcb 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -12,17 +12,18 @@
 #define CONFIG_SYS_INIT_SP_ADDR0x2005
 
 #ifdef CONFIG_SUPPORT_SPL
-#define CONFIG_SYS_TEXT_BASE   0xC000
+#define CONFIG_SYS_TEXT_BASE   0x08008000
+#define CONFIG_SYS_LOAD_ADDR   0x08008000
 #else
 #define CONFIG_SYS_TEXT_BASE   CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_LOAD_ADDR   0xC040
+#define CONFIG_LOADADDR0xC040
 #endif
 
 /*
  * Configuration of the external SDRAM memory
  */
 #define CONFIG_NR_DRAM_BANKS   1
-#define CONFIG_SYS_LOAD_ADDR   0xC040
-#define CONFIG_LOADADDR0xC040
 
 #define CONFIG_SYS_MAX_FLASH_SECT  8
 #define CONFIG_SYS_MAX_FLASH_BANKS 1
@@ -83,16 +84,13 @@
 #define CONFIG_SPL_TEXT_BASE   CONFIG_SYS_FLASH_BASE
 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
 #define CONFIG_SYS_SPL_LEN 0x8000
-#define CONFIG_SYS_UBOOT_START 0XC3FD
+#define CONFIG_SYS_UBOOT_START 0x080083FD
 #define CONFIG_SYS_UBOOT_BASE  (CONFIG_SYS_FLASH_BASE + \
 CONFIG_SYS_SPL_LEN)
 
-#define CONFIG_SYS_OS_BASE 0x0804
 /* DT blob (fdt) address */
-#define CONFIG_SYS_SPL_ARGS_ADDR0xC100
 #define CONFIG_SYS_FDT_BASE(CONFIG_SYS_FLASH_BASE + \
0x1C)
-#define CONFIG_SYS_FDT_SIZE(20*1024)
 #endif
 /* For SPL ends */
 
-- 
1.9.1

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[U-Boot] [PATCH 2/6] stm32: stm32f7: add spl build support

[Vikas Manocha]

This commit supports booting from stm32 internal nor flash. spl U-Boot
initializes the sdram memory, copies next image (e.g. standard U-Boot)
to sdram & then jumps to entry point.

Here are the flash memory addresses for U-Boot-spl & standard U-Boot:
- spl U-Boot: 0x0800_
- standard U-Boot   : 0x0800_8000

To compile u-boot without spl: Remove SUPPORT_SPL configuration
(arch/arm/mach-stm32/Kconfig)

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---
 arch/arm/mach-stm32/Kconfig|  1 +
 arch/arm/mach-stm32/stm32f7/Kconfig| 22 ++
 board/st/stm32f746-disco/stm32f746-disco.c | 27 ++-
 configs/stm32f746-disco_defconfig  |  1 -
 include/configs/stm32f746-disco.h  | 22 +-
 5 files changed, 70 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
index ec6b3ff..879383f 100644
--- a/arch/arm/mach-stm32/Kconfig
+++ b/arch/arm/mach-stm32/Kconfig
@@ -8,6 +8,7 @@ config STM32F1
 
 config STM32F7
bool "stm32f7 family"
+   select SUPPORT_SPL
 
 source "arch/arm/mach-stm32/stm32f4/Kconfig"
 source "arch/arm/mach-stm32/stm32f1/Kconfig"
diff --git a/arch/arm/mach-stm32/stm32f7/Kconfig 
b/arch/arm/mach-stm32/stm32f7/Kconfig
index 287e5ad..c13fafa 100644
--- a/arch/arm/mach-stm32/stm32f7/Kconfig
+++ b/arch/arm/mach-stm32/stm32f7/Kconfig
@@ -3,6 +3,28 @@ if STM32F7
 config TARGET_STM32F746_DISCO
bool "STM32F746 Discovery board"
 
+config SUPPORT_SPL
+   select SPL
+   select SPL_FRAMEWORK
+   select SPL_SERIAL_SUPPORT
+   select SPL_CLK
+   select SPL_OF_CONTROL
+   select SPL_OF_LIBFDT
+   select SPL_GPIO_SUPPORT
+   select SPL_LIBCOMMON_SUPPORT
+   select SPL_LIBGENERIC_SUPPORT
+   select SPL_DRIVERS_MISC_SUPPORT
+   select SPL_SYS_MALLOC_SIMPLE
+   select SPL_MTD_SUPPORT
+   select SPL_DM
+   select SPL_PINCTRL
+   select SPL_RAM
+   select SPL_DM_SEQ_ALIAS
+   select SPL_OF_TRANSLATE
+
+config SPL_PINCTRL_FULL
+   default n if TARGET_STM32F746_DISCO
+
 source "board/st/stm32f746-disco/Kconfig"
 
 endif
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
b/board/st/stm32f746-disco/stm32f746-disco.c
index dc3a9dc..4f2b677 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -36,16 +37,18 @@ int get_memory_base_size(fdt_addr_t *mr_base, fdt_addr_t 
*mr_size)
 }
 int dram_init(void)
 {
-   struct udevice *dev;
int rv;
fdt_addr_t mr_base, mr_size;
 
+#ifndef CONFIG_SUPPORT_SPL
+   struct udevice *dev;
rv = uclass_get_device(UCLASS_RAM, 0, );
if (rv) {
debug("DRAM init failed: %d\n", rv);
return rv;
}
 
+#endif
rv = get_memory_base_size(_base, _size);
if (rv)
return rv;
@@ -87,6 +90,28 @@ int board_early_init_f(void)
 }
 #endif
 
+#ifdef CONFIG_SPL_BUILD
+int spl_dram_init(void)
+{
+   struct udevice *dev;
+   int rv;
+   rv = uclass_get_device(UCLASS_RAM, 0, );
+   if (rv)
+   debug("DRAM init failed: %d\n", rv);
+   return rv;
+}
+void spl_board_init(void)
+{
+   spl_dram_init();
+   preloader_console_init();
+   arch_cpu_init(); /* to configure mpu for sdram rw permissions */
+}
+u32 spl_boot_device(void)
+{
+   return BOOT_DEVICE_NOR;
+}
+
+#endif
 u32 get_board_rev(void)
 {
return 0;
diff --git a/configs/stm32f746-disco_defconfig 
b/configs/stm32f746-disco_defconfig
index a334d50..766b111 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -39,7 +39,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_PINCTRL=y
 # CONFIG_PINCTRL_FULL is not set
 CONFIG_PINCTRL_STM32=y
-# CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/include/configs/stm32f746-disco.h 
b/include/configs/stm32f746-disco.h
index 1ee5815..055fdf8 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -10,7 +10,12 @@
 
 #define CONFIG_SYS_FLASH_BASE  0x0800
 #define CONFIG_SYS_INIT_SP_ADDR0x2005
-#define CONFIG_SYS_TEXT_BASE   0x0800
+
+#ifdef CONFIG_SUPPORT_SPL
+#define CONFIG_SYS_TEXT_BASE   0xC000
+#else
+#define CONFIG_SYS_TEXT_BASE   CONFIG_SYS_FLASH_BASE
+#endif
 
 /*
  * Configuration of the external SDRAM memory
@@ -69,4 +74,19 @@
 #define CONFIG_CMD_CACHE
 #define CONFIG_BOARD_LATE_INIT
 #define CONFIG_DISPLAY_BOARDINFO
+
+/* For SPL */
+#ifdef CONFIG_SUPPORT_SPL
+#define CONFIG_SPL_STACK   CONFIG_SYS_INIT_SP_ADDR
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_S

[U-Boot] [PATCH 1/6] stm32f7: remove duplicate configs

[Vikas Manocha]

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---
 configs/stm32f746-disco_defconfig | 4 
 1 file changed, 4 deletions(-)

diff --git a/configs/stm32f746-disco_defconfig 
b/configs/stm32f746-disco_defconfig
index 4322aad..a334d50 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -44,10 +44,6 @@ CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
-CONFIG_CLK=y
-CONFIG_PINCTRL=y
-# CONFIG_PINCTRL_FULL is not set
-CONFIG_PINCTRL_STM32=y
 CONFIG_RAM=y
 CONFIG_STM32_SDRAM=y
 CONFIG_DM_GPIO=y
-- 
1.9.1

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[U-Boot] [PATCH 0/6] spl: add xip booting support

[Vikas Manocha]

This patchset adds support for XIP (execute in place) of U-Boot or kernel image
and enables it for stm32f7. 

Vikas Manocha (6):
  stm32f7: remove duplicate configs
  stm32: stm32f7: add spl build support
  SPL: Add XIP booting support
  serial: stm32f7: disable overrun
  spl: stm32f7: add kernel boot support
  spl: stm32f7: configure for xip booting

 arch/arm/include/asm/spl.h |  1 +
 arch/arm/mach-stm32/Kconfig|  1 +
 arch/arm/mach-stm32/stm32f7/Kconfig| 24 
 board/st/stm32f746-disco/stm32f746-disco.c | 36 +-
 common/spl/Kconfig |  9 
 common/spl/Makefile|  1 +
 common/spl/spl_xip.c   | 31 +
 configs/stm32f746-disco_defconfig  |  5 -
 drivers/serial/serial_stm32x7.c|  3 +++
 drivers/serial/serial_stm32x7.h|  2 ++
 include/configs/stm32f746-disco.h  | 31 ++---
 11 files changed, 135 insertions(+), 9 deletions(-)
 create mode 100644 common/spl/spl_xip.c

-- 
1.9.1

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Re: [U-Boot] [U-Boot, 1/2] armv7m: cache: add flush & invalidate all dcache

[Vikas MANOCHA]

Hi,

> -Original Message-
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Friday, May 12, 2017 10:18 AM
> To: Vikas MANOCHA <vikas.mano...@st.com>
> Cc: u-boot@lists.denx.de
> Subject: Re: [U-Boot,1/2] armv7m: cache: add flush & invalidate all dcache
> 
> On Wed, May 03, 2017 at 03:48:25PM -0700, Vikas Manocha wrote:
> 
> > Add functionality to flush & invalidate all the dcache using the
> > prototype declared in common header file.
> >
> > Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
> 
> After adding dummy functions for the cache not enabled side (to match other 
> CPU families, ie armv7, and not break stm32f429-
> discovery builds), applied to u-boot/master, thanks!

Thanks Tom.

Cheers,
Vikas

> 
> --
> Tom
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[U-Boot] [PATCH 2/4] armv7m: add MPU configuration support

[Vikas Manocha]

Cortex-M archs support option memory protection unit (MPU). MPU is used
to set the memory types, attributes, access permissions for different regions,
cache policies of the device.

e.g. using MPU it is possible to configure memory region as device memory
or strongly ordered, memory attributes like execute never, cache policies
like write-back or write-through.

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---
 arch/arm/cpu/armv7m/Makefile  |  2 +-
 arch/arm/cpu/armv7m/mpu.c | 82 +++
 arch/arm/include/asm/armv7m.h | 20 --
 arch/arm/include/asm/armv7m_mpu.h | 67 
 4 files changed, 150 insertions(+), 21 deletions(-)
 create mode 100644 arch/arm/cpu/armv7m/mpu.c
 create mode 100644 arch/arm/include/asm/armv7m_mpu.h

diff --git a/arch/arm/cpu/armv7m/Makefile b/arch/arm/cpu/armv7m/Makefile
index 93c9085..257fc7f 100644
--- a/arch/arm/cpu/armv7m/Makefile
+++ b/arch/arm/cpu/armv7m/Makefile
@@ -6,5 +6,5 @@
 #
 
 extra-y := start.o
-obj-y += cpu.o cache.o
+obj-y += cpu.o cache.o mpu.o
 obj-$(CONFIG_SYS_ARCH_TIMER) += systick-timer.o
diff --git a/arch/arm/cpu/armv7m/mpu.c b/arch/arm/cpu/armv7m/mpu.c
new file mode 100644
index 000..31a243b
--- /dev/null
+++ b/arch/arm/cpu/armv7m/mpu.c
@@ -0,0 +1,82 @@
+/*
+ * (C) Copyright 2017
+ * Vikas Manocha, ST Micoelectronics, vikas.mano...@st.com.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#define V7M_MPU_CTRL_ENABLE(1 << 0)
+#define V7M_MPU_CTRL_DISABLE   (0 << 0)
+#define V7M_MPU_CTRL_HFNMIENA  (1 << 1)
+#define VALID_REGION   (1 << 4)
+
+#define ENABLE_REGION  (1 << 0)
+
+#define AP_SHIFT   24
+#define XN_SHIFT   28
+#define TEX_SHIFT  19
+#define S_SHIFT18
+#define C_SHIFT17
+#define B_SHIFT16
+#define REGION_SIZE_SHIFT  1
+
+#define CACHEABLE  (1 << C_SHIFT)
+#define BUFFERABLE (1 << B_SHIFT)
+#define SHAREABLE  (1 << S_SHIFT)
+
+void disable_mpu(void)
+{
+   writel(0, _MPU->ctrl);
+}
+
+void enable_mpu(void)
+{
+   writel(V7M_MPU_CTRL_ENABLE | V7M_MPU_CTRL_HFNMIENA, _MPU->ctrl);
+
+   /* Make sure new mpu config is effective for next memory access */
+   dsb();
+   isb();  /* Make sure instruction stream sees it */
+}
+
+void mpu_config(struct mpu_region_config *reg_config)
+{
+   uint32_t attr;
+
+   switch (reg_config->mr_attr) {
+   case STRONG_ORDER:
+   attr = SHAREABLE;
+   break;
+   case SHARED_WRITE_BUFFERED:
+   attr = BUFFERABLE;
+   break;
+   case O_I_WT_NO_WR_ALLOC:
+   attr = CACHEABLE;
+   break;
+   case O_I_WB_NO_WR_ALLOC:
+   attr = CACHEABLE | BUFFERABLE;
+   break;
+   case O_I_NON_CACHEABLE:
+   attr = 1 << TEX_SHIFT;
+   break;
+   case O_I_WB_RD_WR_ALLOC:
+   attr = (1 << TEX_SHIFT) | CACHEABLE | BUFFERABLE;
+   break;
+   case DEVICE_NON_SHARED:
+   attr = (2 << TEX_SHIFT) | BUFFERABLE;
+   default:
+   attr = 0; /* strongly ordered */
+   break;
+   };
+
+   writel(reg_config->start_addr | VALID_REGION | reg_config->region_no,
+  _MPU->rbar);
+
+   writel(reg_config->xn << XN_SHIFT | reg_config->ap << AP_SHIFT | attr
+   | reg_config->reg_size << REGION_SIZE_SHIFT | ENABLE_REGION
+  , _MPU->rasr);
+}
diff --git a/arch/arm/include/asm/armv7m.h b/arch/arm/include/asm/armv7m.h
index 9a6224f..af8a97e 100644
--- a/arch/arm/include/asm/armv7m.h
+++ b/arch/arm/include/asm/armv7m.h
@@ -70,25 +70,5 @@ struct v7m_mpu {
 };
 #define V7M_MPU((struct v7m_mpu *)V7M_MPU_BASE)
 
-#define V7M_MPU_CTRL_ENABLE(1 << 0)
-#define V7M_MPU_CTRL_HFNMIENA  (1 << 1)
-
-#define V7M_MPU_CTRL_ENABLE(1 << 0)
-#define V7M_MPU_CTRL_DISABLE   (0 << 0)
-#define V7M_MPU_CTRL_HFNMIENA  (1 << 1)
-
-#define V7M_MPU_RASR_EN(1 << 0)
-#define V7M_MPU_RASR_SIZE_BITS 1
-#define V7M_MPU_RASR_SIZE_4GB  (31 << V7M_MPU_RASR_SIZE_BITS)
-#define V7M_MPU_RASR_SIZE_8MB  (22 << V7M_MPU_RASR_SIZE_BITS)
-
-#define V7M_MPU_RASR_TEX_SHIFT 19
-#define V7M_MPU_RASR_S_SHIFT   18
-#define V7M_MPU_RASR_C_SHIFT   17
-#define V7M_MPU_RASR_B_SHIFT   16
-#define V7M_MPU_RASR_AP_RW_RW  (3 << 24)
-#define V7M_MPU_RASR_XN_ENABLE (0 << 28)
-#define V7M_MPU_

[U-Boot] [PATCH 4/4] stm32f7: configure mpu valid for f7 family

[Vikas Manocha]

This configuration should be valid for all F7 family devices in general.
Here is the regions info:

- Region0 : 4GB   : cacheable & executable.
- Region1 : 512MB : text area   : strogly ordered & executable.
- Region2 : 512MB : peripherals : device memory & non-executable.
- Region3 : 512MB : peripherals : device memory & non-executable.
- Region4 : 512MB : cortexM area: strongly ordered & non-executable.

Higher region number overrides the lower region configuration.

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---
 arch/arm/mach-stm32/stm32f7/soc.c | 15 ---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-stm32/stm32f7/soc.c 
b/arch/arm/mach-stm32/stm32f7/soc.c
index 3586133..74a9350 100644
--- a/arch/arm/mach-stm32/stm32f7/soc.c
+++ b/arch/arm/mach-stm32/stm32f7/soc.c
@@ -19,10 +19,19 @@ int arch_cpu_init(void)
 {
struct mpu_region_config stm32_region_config[] = {
{ 0x, REGION_0, XN_DIS, PRIV_RW_USR_RW,
-   STRONG_ORDER, REGION_4GB },
+   O_I_WB_RD_WR_ALLOC, REGION_4GB },
 
-   { 0xC000, REGION_1, XN_DIS, PRIV_RW_USR_RW,
-   O_I_WB_RD_WR_ALLOC, REGION_8MB },
+   { 0x, REGION_1, XN_DIS, PRIV_RW_USR_RW,
+   STRONG_ORDER, REGION_512MB },
+
+   { 0x4000, REGION_2, XN_EN, PRIV_RW_USR_RW,
+   DEVICE_NON_SHARED, REGION_512MB },
+
+   { 0xA000, REGION_3, XN_EN, PRIV_RW_USR_RW,
+   DEVICE_NON_SHARED, REGION_512MB },
+
+   { 0xE000, REGION_4, XN_EN, PRIV_RW_USR_RW,
+   STRONG_ORDER, REGION_512MB },
};
 
disable_mpu();
-- 
1.9.1

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[U-Boot] [PATCH 3/4] stm32: use armv7m MPU configuration support

[Vikas Manocha]

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---
 arch/arm/mach-stm32/stm32f4/soc.c | 16 +-
 arch/arm/mach-stm32/stm32f7/soc.c | 64 ---
 2 files changed, 22 insertions(+), 58 deletions(-)

diff --git a/arch/arm/mach-stm32/stm32f4/soc.c 
b/arch/arm/mach-stm32/stm32f4/soc.c
index b5d06db..3f45a25 100644
--- a/arch/arm/mach-stm32/stm32f4/soc.c
+++ b/arch/arm/mach-stm32/stm32f4/soc.c
@@ -7,7 +7,7 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 u32 get_cpu_rev(void)
@@ -17,17 +17,19 @@ u32 get_cpu_rev(void)
 
 int arch_cpu_init(void)
 {
+   struct mpu_region_config stm32_region_config[] = {
+   { 0x, REGION_0, XN_DIS, PRIV_RW_USR_RW,
+   STRONG_ORDER, REGION_4GB },
+   };
configure_clocks();
-
/*
 * Configure the memory protection unit (MPU) to allow full access to
 * the whole 4GB address space.
 */
-   writel(0, _MPU->rnr);
-   writel(0, _MPU->rbar);
-   writel((V7M_MPU_RASR_AP_RW_RW | V7M_MPU_RASR_SIZE_4GB
-   | V7M_MPU_RASR_EN), _MPU->rasr);
-   writel(V7M_MPU_CTRL_ENABLE | V7M_MPU_CTRL_HFNMIENA, _MPU->ctrl);
+   disable_mpu();
+   for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
+   mpu_config(_region_config[i]);
+   enable_mpu();
 
return 0;
 }
diff --git a/arch/arm/mach-stm32/stm32f7/soc.c 
b/arch/arm/mach-stm32/stm32f7/soc.c
index 6f9704a..3586133 100644
--- a/arch/arm/mach-stm32/stm32f7/soc.c
+++ b/arch/arm/mach-stm32/stm32f7/soc.c
@@ -7,7 +7,7 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 u32 get_cpu_rev(void)
@@ -17,56 +17,18 @@ u32 get_cpu_rev(void)
 
 int arch_cpu_init(void)
 {
-   /*
-   * Configure the memory protection unit (MPU)
-   * 0x - 0x: Strong-order, Shareable
-   * 0xC000 - 0xC080: Normal, Outer and inner Non-cacheable
-*/
-
-/* Disable MPU */
-writel(0, _MPU->ctrl);
-
-writel(
-0x /* address */
-| 1 << 4   /* VALID */
-| 0 << 0   /* REGION */
-, _MPU->rbar
-);
-
-/* Strong-order, Shareable */
-/* TEX=000, S=1, C=0, B=0*/
-writel(
-(V7M_MPU_RASR_XN_ENABLE
-| V7M_MPU_RASR_AP_RW_RW
-| 0x01 << V7M_MPU_RASR_S_SHIFT
-| 0x00 << V7M_MPU_RASR_TEX_SHIFT
-| V7M_MPU_RASR_SIZE_4GB
-| V7M_MPU_RASR_EN)
-, _MPU->rasr
-);
-
-writel(
-0xC000 /* address */
-| 1 << 4   /* VALID */
-| 1 << 0   /* REGION */
-, _MPU->rbar
-);
-
-/* Normal, Outer and inner Non-cacheable */
-/* TEX=001, S=0, C=0, B=0*/
-writel(
-(V7M_MPU_RASR_XN_ENABLE
-| V7M_MPU_RASR_AP_RW_RW
-| 0x01 << V7M_MPU_RASR_TEX_SHIFT
-| 0x01 << V7M_MPU_RASR_B_SHIFT
-| 0x01 << V7M_MPU_RASR_C_SHIFT
-| V7M_MPU_RASR_SIZE_8MB
-| V7M_MPU_RASR_EN)
-, _MPU->rasr
-);
-
-/* Enable MPU */
-writel(V7M_MPU_CTRL_ENABLE | V7M_MPU_CTRL_HFNMIENA, _MPU->ctrl);
+   struct mpu_region_config stm32_region_config[] = {
+   { 0x, REGION_0, XN_DIS, PRIV_RW_USR_RW,
+   STRONG_ORDER, REGION_4GB },
+
+   { 0xC000, REGION_1, XN_DIS, PRIV_RW_USR_RW,
+   O_I_WB_RD_WR_ALLOC, REGION_8MB },
+   };
+
+   disable_mpu();
+   for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
+   mpu_config(_region_config[i]);
+   enable_mpu();
 
return 0;
 }
-- 
1.9.1

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[U-Boot] [PATCH 1/4] armv7m: correct mpu region size define for 8MB size

[Vikas Manocha]

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---
 arch/arm/include/asm/armv7m.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/armv7m.h b/arch/arm/include/asm/armv7m.h
index ebf0f17..9a6224f 100644
--- a/arch/arm/include/asm/armv7m.h
+++ b/arch/arm/include/asm/armv7m.h
@@ -80,7 +80,8 @@ struct v7m_mpu {
 #define V7M_MPU_RASR_EN(1 << 0)
 #define V7M_MPU_RASR_SIZE_BITS 1
 #define V7M_MPU_RASR_SIZE_4GB  (31 << V7M_MPU_RASR_SIZE_BITS)
-#define V7M_MPU_RASR_SIZE_8MB  (24 << V7M_MPU_RASR_SIZE_BITS)
+#define V7M_MPU_RASR_SIZE_8MB  (22 << V7M_MPU_RASR_SIZE_BITS)
+
 #define V7M_MPU_RASR_TEX_SHIFT 19
 #define V7M_MPU_RASR_S_SHIFT   18
 #define V7M_MPU_RASR_C_SHIFT   17
-- 
1.9.1

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[U-Boot] [PATCH 0/4] armv7m: add memory protection unit support

[Vikas Manocha]

This patchset adds memory protection unit support(MPU) support & configures it
for stm32f4 & stm32f7.

Vikas Manocha (4):
  armv7m: correct mpu region size define for 8MB size
  armv7m: add MPU configuration support
  stm32: use armv7m MPU configuration support
  stm32f7: configure mpu valid for f7 family

 arch/arm/cpu/armv7m/Makefile  |  2 +-
 arch/arm/cpu/armv7m/mpu.c | 82 +++
 arch/arm/include/asm/armv7m.h | 19 -
 arch/arm/include/asm/armv7m_mpu.h | 67 
 arch/arm/mach-stm32/stm32f4/soc.c | 16 
 arch/arm/mach-stm32/stm32f7/soc.c | 63 --
 6 files changed, 176 insertions(+), 73 deletions(-)
 create mode 100644 arch/arm/cpu/armv7m/mpu.c
 create mode 100644 arch/arm/include/asm/armv7m_mpu.h

-- 
1.9.1

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[U-Boot] [PATCH 0/2] armv7m: cache: cleanup before linux booting

[Vikas Manocha]

This patchset:
- add all data cache flushing & invalidation functions as
declared in the common header file.
- adds cleanup before linux booting.

Vikas Manocha (2):
  armv7m: cache: add flush & invalidate all dcache
  arvm7m: add cleanup before linux booting

 arch/arm/cpu/armv7m/cache.c | 15 +++
 arch/arm/cpu/armv7m/cpu.c   | 19 +++
 2 files changed, 34 insertions(+)

-- 
1.9.1

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[U-Boot] [PATCH 2/2] arvm7m: add cleanup before linux booting

[Vikas Manocha]

Data cache memory needs to be disabled before handing over control to
linux kernel. This patch populates the cleanup_before_linux stub.

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---
 arch/arm/cpu/armv7m/cpu.c | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm/cpu/armv7m/cpu.c b/arch/arm/cpu/armv7m/cpu.c
index 58cde93..a424bab 100644
--- a/arch/arm/cpu/armv7m/cpu.c
+++ b/arch/arm/cpu/armv7m/cpu.c
@@ -18,6 +18,25 @@
  */
 int cleanup_before_linux(void)
 {
+   /*
+* this function is called just before we call linux
+* it prepares the processor for linux
+*
+* disable interrupt and turn off caches etc ...
+*/
+   disable_interrupts();
+   /*
+* turn off D-cache
+* dcache_disable() in turn flushes the d-cache
+* MPU is still enabled & can't be disabled as the u-boot
+* code might be running in sdram which by default is not
+* executable area.
+*/
+   dcache_disable();
+   /* invalidate to make sure no cache line gets dirty between
+* dcache flushing and disabling dcache */
+   invalidate_dcache_all();
+
return 0;
 }
 
-- 
1.9.1

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[U-Boot] [PATCH 1/2] armv7m: cache: add flush & invalidate all dcache

[Vikas Manocha]

Add functionality to flush & invalidate all the dcache using the
prototype declared in common header file.

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---
 arch/arm/cpu/armv7m/cache.c | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/cpu/armv7m/cache.c b/arch/arm/cpu/armv7m/cache.c
index 162cfe3..84f658d 100644
--- a/arch/arm/cpu/armv7m/cache.c
+++ b/arch/arm/cpu/armv7m/cache.c
@@ -253,6 +253,21 @@ void flush_dcache_range(unsigned long start, unsigned long 
stop)
return;
}
 }
+void flush_dcache_all(void)
+{
+   if (action_dcache_all(FLUSH_SET_WAY)) {
+   printf("ERR: D-cache not flushed\n");
+   return;
+   }
+}
+
+void invalidate_dcache_all(void)
+{
+   if (action_dcache_all(INVALIDATE_SET_WAY)) {
+   printf("ERR: D-cache not invalidated\n");
+   return;
+   }
+}
 #else
 void dcache_enable(void)
 {
-- 
1.9.1

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Re: [U-Boot] [PATCH] spl: make image arg or fdt blob address reconfigurable

[Vikas MANOCHA]

Hi Tom,

> -Original Message-
> From: Vikas MANOCHA
> Sent: Wednesday, April 12, 2017 12:47 PM
> To: 'Tom Rini' <tr...@konsulko.com>
> Cc: u-boot@lists.denx.de; Marek Vasut <ma...@denx.de>; Stefan Agner 
> <stefan.ag...@toradex.com>; Jeremy Hunt
> <jeremy.h...@deshawresearch.com>
> Subject: RE: [U-Boot] [PATCH] spl: make image arg or fdt blob address 
> reconfigurable
> 
> Hi Tom,
> 
> > -Original Message-
> > From: Tom Rini [mailto:tr...@konsulko.com]
> > Sent: Wednesday, April 12, 2017 6:33 AM
> > To: Vikas MANOCHA <vikas.mano...@st.com>
> > Cc: u-boot@lists.denx.de; Marek Vasut <ma...@denx.de>; Stefan Agner
> > <stefan.ag...@toradex.com>; Jeremy Hunt
> > <jeremy.h...@deshawresearch.com>
> > Subject: Re: [U-Boot] [PATCH] spl: make image arg or fdt blob address
> > reconfigurable
> >
> > On Tue, Apr 11, 2017 at 11:44:00PM +, Vikas MANOCHA wrote:
> > > Hi Tom,
> > >
> > > > -Original Message-
> > > > From: Tom Rini [mailto:tr...@konsulko.com]
> > > > Sent: Monday, April 10, 2017 5:29 AM
> > > > To: Vikas MANOCHA <vikas.mano...@st.com>
> > > > Cc: u-boot@lists.denx.de; Marek Vasut <ma...@denx.de>; Stefan
> > > > Agner <stefan.ag...@toradex.com>; Jeremy Hunt
> > > > <jeremy.h...@deshawresearch.com>
> > > > Subject: Re: [U-Boot] [PATCH] spl: make image arg or fdt blob
> > > > address reconfigurable
> > > >
> > > > On Fri, Apr 07, 2017 at 03:38:13PM -0700, Vikas Manocha wrote:
> > > >
> > > > > At present fdt blob or argument address being passed to kernel
> > > > > is fixed at compile time using macro CONFIG_SYS_SPL_ARGS_ADDR.
> > > > > FDT blob from different media like nand, nor flash are copied to
> > > > > the address pointed by the macro.
> > > > > The problem is, it makes args/fdt blob compulsory to copy which
> > > > > is not required in cases like for NOR Flash. This patch removes this 
> > > > > limitation.
> > > > >
> > > > > Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
> > > > > ---
> > > > >  arch/arm/lib/spl.c| 7 +++
> > > > >  arch/microblaze/cpu/spl.c | 6 +++---
> > > > >  arch/powerpc/lib/spl.c| 8 
> > > > >  common/spl/spl.c  | 6 --
> > > > >  common/spl/spl_nor.c  | 8 +---
> > > > >  include/spl.h | 5 ++---
> > > >
> > > > I assume you've tested the spl_nor case afterwards, yes?  Did this
> > > > result in some measurable boot time decrease?  Thanks!
> > >
> > > Yes, I tested it's working on board. Not sure how to measure the impact 
> > > on boot time.
> >
> > There's always good old grabserial. But if you didn't measure bootspeed, 
> > did this decrease the code size?  Or fix some other issue?
> 
> Thanks Tom for the suggestion.
> 
> The benefit of this patch is : It removes copying FDT blob from NOR flash to 
> ram in case of booting from nor flash,  text size reduction
> is only 4 Bytes, no change in data/bss size. It might reduce the boot time 
> but boot time impact would depend on the FDT blob
> copying time & ram vs flash read speed.
> 
> Also it provides a way to change fdt blob address at run-time which might be 
> useful e.g. choosing between two FDT blobs or
> manipulating FDT address.

Please let me know if more info is required in order to pick this patch.

Cheers,
Vikas

> 
> Cheers,
> Vikas
> 
> > Thanks!
> >
> > --
> > Tom
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Re: [U-Boot] [PATCH v4 00/18] stm32f7: add sdram & gpio drivers

[Vikas MANOCHA]

Hi Tom,

> -Original Message-
> From: Vikas MANOCHA
> Sent: Monday, April 10, 2017 3:03 PM
> To: u-boot@lists.denx.de
> Cc: Vikas MANOCHA <vikas.mano...@st.com>
> Subject: [PATCH v4 00/18] stm32f7: add sdram & gpio drivers
> 
> This patchset :
>   - adds stm32 sdram driver based on DM
>   - adds stm32 gpio driver based on DM
>   - uses clock & pin control drivers to replace board specific
> configurations from code
>   - corrects sdram parameters as per correct sdram part
>   - adds support for stm32f769 board
> 

Please apply this patchset whenever you get time.

Cheers,
Vikas

> Changed in v4:
> - rebased to master.
> 
> Changed in v3:
> - made stm32_gpio_config() static.
> - moved common.h inclusion before clk.h
> 
> Changed in v2:
> - included files in correct order.
> - moved the pinctrl specific routine from gpio driver to pinctrl
> - used dev_get_addr() instead of fdtdec_get_addr_size_auto_parent() in
>   gpio driver.
> - pointed gpio name to bank name in device tree blob rather than copy.
> 
> Vikas Manocha (18):
>   stm32f7: use clock driver to enable qspi controller clock
>   stm32f7: sdram: move sdram driver code to ram drivers area
>   stm32f7: dm: add driver model support for sdram
>   ARM: DT: stm32f7: add sdram pin contol node
>   stm32f7: use driver model for sdram initialization
>   stm32f7: use clock driver to enable sdram controller clock
>   stm32f7: sdram: use sdram device tree node to configure sdram
> controller
>   dm: gpio: Add driver for stm32f7 gpio controller
>   ARM: DT: stm32f7: add gpio device tree nodes
>   stm32f7: use stm32f7 gpio driver supporting driver model
>   stm32f746: to switch on user LED1 & read user button
>   stm32f7: stm32f746-disco: read memory info from device tree
>   stm32f7: enable board info read from device tree
>   stm32f7: sdram: correct sdram configuration as per micron sdram
>   stm32f7: increase the max no of pin configuration to 70
>   stm32f7: move board specific pin muxing to dts
>   stm32f7: add support for stm32f769 disco board
>   stm32f7: remove not needed configuration from board config
> 
>  arch/arm/dts/Makefile |   3 +-
>  arch/arm/dts/stm32f746-disco.dts  | 132 
>  arch/arm/dts/stm32f746.dtsi   | 151 ++---
>  arch/arm/dts/stm32f769-disco.dts  | 255 ++
>  arch/arm/include/asm/arch-stm32f7/gpio.h  |  21 +-
>  board/st/stm32f746-disco/stm32f746-disco.c| 299 
> ++
>  configs/stm32f746-disco_defconfig |   6 +
>  doc/device-tree-bindings/ram/st,stm32-fmc.txt |  51 +
>  drivers/clk/clk_stm32f7.c |  39 
>  drivers/gpio/Kconfig  |   9 +
>  drivers/gpio/Makefile |   1 +
>  drivers/gpio/stm32f7_gpio.c   | 135 
>  drivers/pinctrl/pinctrl_stm32.c   |  50 -
>  drivers/ram/Kconfig   |   8 +
>  drivers/ram/Makefile  |   1 +
>  drivers/ram/stm32_sdram.c | 179 +++
>  drivers/spi/stm32_qspi.c  |  16 +-
>  include/configs/stm32f746-disco.h |  11 +-
>  include/dt-bindings/memory/stm32-sdram.h  |  37 
>  19 files changed, 1076 insertions(+), 328 deletions(-)  create mode 100644 
> arch/arm/dts/stm32f769-disco.dts  create mode 100644
> doc/device-tree-bindings/ram/st,stm32-fmc.txt
>  create mode 100644 drivers/gpio/stm32f7_gpio.c  create mode 100644 
> drivers/ram/stm32_sdram.c  create mode 100644 include/dt-
> bindings/memory/stm32-sdram.h
> 
> --
> 1.9.1

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[U-Boot] [PATCH v2] ARM: DT: STM32F746: add u-boot, dm-pre-reloc property to sub nodes

[Vikas Manocha]

This patch is required for correct SPL device tree creation by fdtgrep
as fdtgrep looks for u-boot,dm-pre-reloc property of the node to include
it in the spl device tree.

Not adding it in these subnodes ignores the pin muxing of peripherals
which is almost always in the subnodes.

Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---
 arch/arm/dts/stm32f7-u-boot.dtsi | 24 
 1 file changed, 24 insertions(+)
 create mode 100644 arch/arm/dts/stm32f7-u-boot.dtsi

diff --git a/arch/arm/dts/stm32f7-u-boot.dtsi b/arch/arm/dts/stm32f7-u-boot.dtsi
new file mode 100644
index 000..5f77f57
--- /dev/null
+++ b/arch/arm/dts/stm32f7-u-boot.dtsi
@@ -0,0 +1,24 @@
+ {
+   usart1_pins_a: usart1@0 {
+   u-boot,dm-pre-reloc;
+   pins1 {
+   u-boot,dm-pre-reloc;
+   };
+   pins2 {
+   u-boot,dm-pre-reloc;
+   };
+   };
+   fmc_pins: fmc@0 {
+   u-boot,dm-pre-reloc;
+   pins
+   {
+u-boot,dm-pre-reloc;
+   };
+   };
+};
+
+ {
+   bank1: bank@0 {
+u-boot,dm-pre-reloc;
+   };
+};
-- 
1.9.1

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Re: [U-Boot] ARM: DT: STM32F746: add u-boot, dm-pre-reloc property to sub nodes

[Vikas MANOCHA]

Hi Tom,

> -Original Message-
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Wednesday, April 12, 2017 10:27 AM
> To: Vikas MANOCHA <vikas.mano...@st.com>
> Cc: u-boot@lists.denx.de; Ian Campbell <i...@hellion.org.uk>; Hans de Goede 
> <hdego...@redhat.com>
> Subject: Re: [U-Boot] ARM: DT: STM32F746: add u-boot, dm-pre-reloc property 
> to sub nodes
> 
> On Tue, Apr 04, 2017 at 04:59:06PM -0700, Vikas Manocha wrote:
> 
> > This patch is required for correct SPL device tree creation by fdtgrep
> > as fdtgrep looks for u-boot,dm-pre-reloc property of the node to
> > include it in the spl device tree.
> >
> > Not adding it in these subnodes ignores the pin muxing of peripherals
> > which is almost always in the subnodes.
> >
> > Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
> > ---
> >  arch/arm/dts/stm32f746-disco.dts | 8 +++-
> 
> This should be done in arch/arm/dts/stm32f746-u-boot.dtsi or similar, see 
> scripts/Makefile.lib for the logic on how we pick these files
> up, thanks!

Really cool! Thanks for this information. I will create stm32f7-u-boot.dtsi to 
add this info & send v2.

Cheers,
Vikas

> 
> --
> Tom
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Re: [U-Boot] [PATCH] spl: make image arg or fdt blob address reconfigurable

[Vikas MANOCHA]

Hi Tom,

> -Original Message-
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Wednesday, April 12, 2017 6:33 AM
> To: Vikas MANOCHA <vikas.mano...@st.com>
> Cc: u-boot@lists.denx.de; Marek Vasut <ma...@denx.de>; Stefan Agner 
> <stefan.ag...@toradex.com>; Jeremy Hunt
> <jeremy.h...@deshawresearch.com>
> Subject: Re: [U-Boot] [PATCH] spl: make image arg or fdt blob address 
> reconfigurable
> 
> On Tue, Apr 11, 2017 at 11:44:00PM +, Vikas MANOCHA wrote:
> > Hi Tom,
> >
> > > -Original Message-
> > > From: Tom Rini [mailto:tr...@konsulko.com]
> > > Sent: Monday, April 10, 2017 5:29 AM
> > > To: Vikas MANOCHA <vikas.mano...@st.com>
> > > Cc: u-boot@lists.denx.de; Marek Vasut <ma...@denx.de>; Stefan Agner
> > > <stefan.ag...@toradex.com>; Jeremy Hunt
> > > <jeremy.h...@deshawresearch.com>
> > > Subject: Re: [U-Boot] [PATCH] spl: make image arg or fdt blob
> > > address reconfigurable
> > >
> > > On Fri, Apr 07, 2017 at 03:38:13PM -0700, Vikas Manocha wrote:
> > >
> > > > At present fdt blob or argument address being passed to kernel is
> > > > fixed at compile time using macro CONFIG_SYS_SPL_ARGS_ADDR. FDT
> > > > blob from different media like nand, nor flash are copied to the
> > > > address pointed by the macro.
> > > > The problem is, it makes args/fdt blob compulsory to copy which is
> > > > not required in cases like for NOR Flash. This patch removes this 
> > > > limitation.
> > > >
> > > > Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
> > > > ---
> > > >  arch/arm/lib/spl.c| 7 +++
> > > >  arch/microblaze/cpu/spl.c | 6 +++---
> > > >  arch/powerpc/lib/spl.c| 8 
> > > >  common/spl/spl.c  | 6 --
> > > >  common/spl/spl_nor.c  | 8 +---
> > > >  include/spl.h | 5 ++---
> > >
> > > I assume you've tested the spl_nor case afterwards, yes?  Did this
> > > result in some measurable boot time decrease?  Thanks!
> >
> > Yes, I tested it's working on board. Not sure how to measure the impact on 
> > boot time.
> 
> There's always good old grabserial. But if you didn't measure bootspeed, did 
> this decrease the code size?  Or fix some other issue?

Thanks Tom for the suggestion.

The benefit of this patch is : It removes copying FDT blob from NOR flash to 
ram in case of booting from nor flash,  text size reduction
is only 4 Bytes, no change in data/bss size. It might reduce the boot time but 
boot time impact would depend on the FDT blob copying
time & ram vs flash read speed.

Also it provides a way to change fdt blob address at run-time which might be 
useful e.g. choosing between two FDT blobs or manipulating FDT address.

Cheers,
Vikas 

> Thanks!
> 
> --
> Tom
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Re: [U-Boot] [PATCH] spl: make image arg or fdt blob address reconfigurable

[Vikas MANOCHA]

Hi Tom,

> -Original Message-
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Monday, April 10, 2017 5:29 AM
> To: Vikas MANOCHA <vikas.mano...@st.com>
> Cc: u-boot@lists.denx.de; Marek Vasut <ma...@denx.de>; Stefan Agner 
> <stefan.ag...@toradex.com>; Jeremy Hunt
> <jeremy.h...@deshawresearch.com>
> Subject: Re: [U-Boot] [PATCH] spl: make image arg or fdt blob address 
> reconfigurable
> 
> On Fri, Apr 07, 2017 at 03:38:13PM -0700, Vikas Manocha wrote:
> 
> > At present fdt blob or argument address being passed to kernel is
> > fixed at compile time using macro CONFIG_SYS_SPL_ARGS_ADDR. FDT blob
> > from different media like nand, nor flash are copied to the address
> > pointed by the macro.
> > The problem is, it makes args/fdt blob compulsory to copy which is not
> > required in cases like for NOR Flash. This patch removes this limitation.
> >
> > Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
> > ---
> >  arch/arm/lib/spl.c| 7 +++
> >  arch/microblaze/cpu/spl.c | 6 +++---
> >  arch/powerpc/lib/spl.c| 8 
> >  common/spl/spl.c  | 6 --
> >  common/spl/spl_nor.c  | 8 +---
> >  include/spl.h | 5 ++---
> 
> I assume you've tested the spl_nor case afterwards, yes?  Did this result in 
> some measurable boot time decrease?  Thanks!

Yes, I tested it's working on board. Not sure how to measure the impact on boot 
time.

Cheers,
Vikas

> 
> --
> Tom
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