Re: [U-Boot] [PATCH] mtd: nand: mxs: fix cache alignment for cache lines >32

On 08/03/2016 08:09 PM, Tom Rini wrote: On Wed, Aug 03, 2016 at 02:39:47PM -0300, Fabio Estevam wrote: On Wed, Aug 3, 2016 at 1:13 PM, Stefan Agner wrote: As you noted, this particular case is due to cache flush of the page table and should be fixed with: arm: cache: always

Re: [U-Boot] [PATCH] mtd: nand: mxs: fix cache alignment for cache lines >32

On 2016-08-03 12:08, Simon Glass wrote: > Hi Fabio, > > On 3 August 2016 at 12:44, Fabio Estevam wrote: >> Hi Simon, >> >> On Wed, Aug 3, 2016 at 3:35 PM, Simon Glass wrote: >> >>> Actually I think these are bugs and should be fixed. In this case, >>> from

Re: [U-Boot] [PATCH] mtd: nand: mxs: fix cache alignment for cache lines >32

On 2016-08-03 11:44, Fabio Estevam wrote: > Hi Simon, > > On Wed, Aug 3, 2016 at 3:35 PM, Simon Glass wrote: > >> Actually I think these are bugs and should be fixed. In this case, I am completely with you Simon! check_cache_range return 0, which actually leads to the cache

Re: [U-Boot] [PATCH] mtd: nand: mxs: fix cache alignment for cache lines >32

Hi Fabio, On 3 August 2016 at 12:44, Fabio Estevam wrote: > Hi Simon, > > On Wed, Aug 3, 2016 at 3:35 PM, Simon Glass wrote: > >> Actually I think these are bugs and should be fixed. In this case, >> from what I can tell netboot_common() should cache-align

Re: [U-Boot] [PATCH] mtd: nand: mxs: fix cache alignment for cache lines >32

Hi Simon, On Wed, Aug 3, 2016 at 3:35 PM, Simon Glass wrote: > Actually I think these are bugs and should be fixed. In this case, > from what I can tell netboot_common() should cache-align the size in > the call to: > > /* flush cache */ > flush_cache(load_addr, size); Do

Re: [U-Boot] [PATCH] mtd: nand: mxs: fix cache alignment for cache lines >32

Hi, On 3 August 2016 at 12:29, Fabio Estevam wrote: > Hi Tom, > > On Wed, Aug 3, 2016 at 3:09 PM, Tom Rini wrote: > >> I feel like we must have done something wrong of late, can you bisect >> when these came in? Thanks! > > This cache warnings start to

Re: [U-Boot] [PATCH] mtd: nand: mxs: fix cache alignment for cache lines >32

Hi Tom, On Wed, Aug 3, 2016 at 3:09 PM, Tom Rini wrote: > I feel like we must have done something wrong of late, can you bisect > when these came in? Thanks! This cache warnings start to appear since commit: commit bcc53bf095893fbdae531a9a7b5d4ef4a125a7fc Author: Simon

Re: [U-Boot] [PATCH] mtd: nand: mxs: fix cache alignment for cache lines >32

On Wed, Aug 03, 2016 at 02:39:47PM -0300, Fabio Estevam wrote: > On Wed, Aug 3, 2016 at 1:13 PM, Stefan Agner wrote: > > > As you noted, this particular case is due to cache flush of the page > > table and should be fixed with: > > arm: cache: always flush cache line size for

Re: [U-Boot] [PATCH] mtd: nand: mxs: fix cache alignment for cache lines >32

On Wed, Aug 3, 2016 at 1:13 PM, Stefan Agner wrote: > As you noted, this particular case is due to cache flush of the page > table and should be fixed with: > arm: cache: always flush cache line size for page table Yes, just noticed that on a imx7d-sdb I still get these cache

Re: [U-Boot] [PATCH] mtd: nand: mxs: fix cache alignment for cache lines >32

On 2016-08-03 06:51, Fabio Estevam wrote: > On Tue, Aug 2, 2016 at 3:55 AM, Stefan Agner wrote: >> From: Stefan Agner >> >> Currently the command buffer gets allocated with a size of 32 bytes. >> This causes warning messages on systems with cache lines

Re: [U-Boot] [PATCH] mtd: nand: mxs: fix cache alignment for cache lines >32

On Tue, Aug 2, 2016 at 3:55 AM, Stefan Agner wrote: > From: Stefan Agner > > Currently the command buffer gets allocated with a size of 32 bytes. > This causes warning messages on systems with cache lines bigger than > 32 bytes: > CACHE: Misaligned

Re: [U-Boot] [PATCH] mtd: nand: mxs: fix cache alignment for cache lines >32

On 02/08/2016 08:55, Stefan Agner wrote: > From: Stefan Agner > > Currently the command buffer gets allocated with a size of 32 bytes. > This causes warning messages on systems with cache lines bigger than > 32 bytes: > CACHE: Misaligned operation at range [9df17a00,

Re: [U-Boot] [PATCH] mtd: nand: mxs: fix cache alignment for cache lines >32

Hi Stefan, On 02/08/2016 08:55, Stefan Agner wrote: > From: Stefan Agner > > Currently the command buffer gets allocated with a size of 32 bytes. > This causes warning messages on systems with cache lines bigger than > 32 bytes: > CACHE: Misaligned operation at range

[U-Boot] [PATCH] mtd: nand: mxs: fix cache alignment for cache lines >32

From: Stefan Agner Currently the command buffer gets allocated with a size of 32 bytes. This causes warning messages on systems with cache lines bigger than 32 bytes: CACHE: Misaligned operation at range [9df17a00, 9df17a20] Define command buffer to be at least 32