Hi Simon,
On Wed, Apr 18, 2018 at 5:45 PM, Simon Glass wrote:
> Hi Mario,
>
> On 18 April 2018 at 02:35, Mario Six wrote:
>> Hi Simon,
>>
>> On Thu, Apr 12, 2018 at 6:37 PM, Simon Glass wrote:
>>> Hi Mario,
>>>
>>> On 11 April 2018 at
On Thu, Apr 19, 2018 at 12:17 PM, Scott Wood wrote:
> On Mon, 2018-04-16 at 08:40 +0530, Calvin Johnson wrote:
>> On Fri, Apr 13, 2018 at 12:18 AM, Jagdish Gediya
>> wrote:
>> > Add command "boot_bank X" to switch the boot bank to either
>> > 1 or 2.
>>
From: Siva Durga Prasad Paladugu
This patch upadted sdhci_send_command to handle execute tuning
command.
Signed-off-by: Siva Durga Prasad Paladugu
---
drivers/mmc/sdhci.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git
From: Siva Durga Prasad Paladugu
This patch adds support to disable clock if clk_disable
was set and then enable or set clock if the clock was changed
or clock was disabled when clock needs to be enabled.
Signed-off-by: Siva Durga Prasad Paladugu
---
From: Siva Durga Prasad Paladugu
This patch adds support to invoke any platform specific tuning
and delay routines if available.
Signed-off-by: Siva Durga Prasad Paladugu
---
drivers/mmc/sdhci.c | 24
1 file changed, 24
This patch adds support of SD3.0 for ZynqMP.
Signed-off-by: Siva Durga Prasad Paladugu
---
Changes for v3:
- Used macro for loop counter
- Made printf to debug
- Fixed if condition to reduce a line as
per comment
---
board/xilinx/zynqmp/Makefile | 2 +
On Tue, Apr 17, 2018 at 03:42:34PM +0200, Lothar Felten wrote:
> Add a device tree node for the Allwinner R40/V40 CPU.
> The syscon node is required by the gmac driver.
>
> Signed-off-by: Lothar Felten
> ---
> arch/arm/dts/sun8i-r40.dtsi | 28
This patch series is meant to add SD3.0 support for ZynqMP
platform.
The first five patches in the series mostly setting up
things in sdhci layer to support SD3.0 , the sixth patch
is to add SD3.0 support for ZynqMP platform and the last
patch is to enable this support for ZynqMP zcu102 rev1.0
From: Siva Durga Prasad Paladugu
This patch adds new hooks for any platform specific tuning and
tap delays programing. These are needed for supporting
SD3.0.
Signed-off-by: Siva Durga Prasad Paladugu
---
include/sdhci.h | 2 ++
1 file changed, 2
On 04/19/2018 05:13 AM, Ley Foon Tan wrote:
> On Thu, Apr 19, 2018 at 10:47 AM, Marek Vasut wrote:
>> On 04/19/2018 11:50 AM, Ley Foon Tan wrote:
>>> Move eth reset to common misc driver so can used by other device families.
>>>
>>> Signed-off-by: Chin Liang See
On 04/19/2018 07:15 AM, See, Chin Liang wrote:
> On Thu, 2018-04-19 at 04:47 +0200, Marek Vasut wrote:
>> On 04/19/2018 11:50 AM, Ley Foon Tan wrote:
>>>
>>> Add CONFIG_SYS_L2_PL310 conditional build.
>> Why ?
>>
>
> In ARM64, L2 cache controller is accessed through processor registers.
> Hence
From: Siva Durga Prasad Paladugu
This patch reads the capabilities register1 and update the host
caps accordingly for mmc layer usage. This patch mainly reads
for UHS capabilities inorder to support SD3.0.
Signed-off-by: Siva Durga Prasad Paladugu
---
This patch enables UHS support for ZynqMP zcu102 rev 1.0
board.
Signed-off-by: Siva Durga Prasad Paladugu
---
configs/xilinx_zynqmp_zcu102_rev1_0_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
Use ROCKCHIP_BOOT_MODE_REG instead of grf structure so that
we can re-use the source code later.
Signed-off-by: Kever Yang
---
arch/arm/mach-rockchip/Kconfig| 1 +
arch/arm/mach-rockchip/rk3128-board.c | 5 +
2 files changed, 2 insertions(+), 4
On Mon, 2018-04-16 at 08:40 +0530, Calvin Johnson wrote:
> On Fri, Apr 13, 2018 at 12:18 AM, Jagdish Gediya
> wrote:
> > Add command "boot_bank X" to switch the boot bank to either
> > 1 or 2.
>
> Are these functions required as this can be handled by new env vars to
>
On Tue, Apr 17, 2018 at 03:42:32PM +0200, Lothar Felten wrote:
> Add reset control for the gigabit interface of the Allwinner R40/V40 CPU
>
> Signed-off-by: Lothar Felten
Acked-by: Maxime Ripard
Maxime
--
Maxime Ripard, Bootlin (formerly
Use ROCKCHIP_BOOT_MODE_REG instead of grf structure so that
we can re-use the source code later.
Signed-off-by: Kever Yang
---
arch/arm/mach-rockchip/rk322x-board.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git
On Tue, Apr 17, 2018 at 03:42:35PM +0200, Lothar Felten wrote:
> Enable the gigabit ethernet for the Bananapi M2 Ultra board.
> Tested on BananaPi M2 Berry (R40), custom board (V40).
>
> Signed-off-by: Lothar Felten
> ---
> arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts |
On 04/19/2018 07:26 AM, See, Chin Liang wrote:
> On Thu, 2018-04-19 at 04:59 +0200, Marek Vasut wrote:
>> On 04/19/2018 11:50 AM, Ley Foon Tan wrote:
>>>
>>> Add timer support for Stratix SoC
>> Is this really custom timer or is that some armv8 thing you're adding
>> here ? Don't we already have a
Debug message was showing timeout value which was passed to start
function but there is a checking if this value can be setup.
The patch is moving this debug printf function below checking.
Signed-off-by: Michal Simek
---
drivers/watchdog/cdns_wdt.c | 4 ++--
1 file
In past this code was commented and was used for debug purpose.
But there is no reason not to enabled it based on macros.
Signed-off-by: Michal Simek
---
arch/arm/mach-zynq/spl.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git
From: Ezequiel Garcia
CONFIG_NAND_ZYNQ selects CONFIG_SYS_NAND_SELF_INIT, so the
driver doesn't have to play any ifdef game.
Also, we can mark zynq_nand_init() as static and get rid
of the mach-specific nand.h header.
This is really a revert of:
"mtd: zynq: nand:
Stefano,
On Wed, Apr 11, 2018 at 6:02 PM, Jagan Teki wrote:
> All CONFIG changes from arch/arm/mach-imx fromprevious version [1]
> since most of them won't agree with new naming convention that sync
> with Linux.
>
> This series add rest of changes like u-boot dtsi
On Wed, Apr 4, 2018 at 3:20 PM, Sean Nyekjaer wrote:
> Add entry for Spansion s25fl208k part.
>
> Signed-off-by: Sean Nyekjaer
> ---
Applied to u-boot-spi/master
___
U-Boot mailing list
From: Siva Durga Prasad Paladugu
This patch adds support for 16-bit buswidth by determining
the bus width based on mio configuration.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
There are some comments on the same line as the code they document. Put
comments above the code lines they document, so the line length is not
unnecessarily increased.
Signed-off-by: Mario Six
---
Changes v1 -> v2:
None
---
drivers/spi/mpc8xxx_spi.c | 22
This is v2 of a patch series that adds support for DM to the MPC8XXX SPI
driver, cleans up the driver code, fixes a few minor problems.
Some TODOs are left over for later, such as proper SPI speed setting,
and support for SPI mode setting. These would be enhancements to the
original
Hello,
Is it possible to send a message on different uart ports , while
leaving the console in the same port ?
Which command in common can be used for that ?
Thank you,
ranran
___
U-Boot mailing list
U-Boot@lists.denx.de
Enable watchdog in full U-Boot.
Similar changes were done by:
"arm: zynq: Wire watchdog internals"
(sha1: e6cc3b25d721c3001019f8b44bfaae2a57255162)
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp.c | 42
1 file changed,
In case of error in soc_clk_dump function are returned different values
then CMD return values (-1, 0, 1).
For example:
ZynqMP> clk dump
exit not allowed from main input shel
The patch is checking all negative return values and return
CMD_RET_FAILURE which is proper reaction for these cases.
> On 19.04.2018, at 10:33, Marek Vasut wrote:
>
> On 04/19/2018 10:02 AM, klaus.go...@theobroma-systems.com wrote:
>>
>>> On 18.04.2018, at 22:02, Marek Vasut wrote:
>>>
>>> On 04/18/2018 06:25 PM, Klaus Goger wrote:
When building the mxs platform in thumb
Attempting to build SPL without CONFIG_SPL_SERIAL_SUPPORT defined fails
in assorted ways. This series fixes up those failures.
Green Travis build:
https://travis-ci.org/akiernan/u-boot/builds/368288275
Changes in v2:
- Rebase against master
- Update Travis build URL
- Introduce default y
Stefano,
On Wed, Apr 11, 2018 at 6:06 PM, Jagan Teki wrote:
> This series add support for BTicino i.MX6DL Mamoj board.
>
> Changes for v2:
> - Update Kconfig changes for CONFIG_FSL_ESDHC
> - Add HAB support
>
> Jagan Teki (7):
> i.MX6: board: Add BTicino i.MX6DL
Accesses to the register map are currently done by directly reading and
writing the structure.
Switch to the appropriate IO accessors instead.
Signed-off-by: Mario Six
---
Changes v1 -> v2:
None
---
drivers/spi/mpc8xxx_spi.c | 38 +++---
1
Introduce the to_prescale_mod and set_char_len inline functions to make
the code more readable.
Note that the added "if (bitlen > 16)" check does not change the
semantics of the current code, and hence only preserves the current
error (this will be fixed in a later patch in the series).
Replace pre-processor defines with proper enums, and use the BIT macro
where applicable.
Signed-off-by: Mario Six
---
Changes v1 -> v2:
None
---
drivers/spi/mpc8xxx_spi.c | 26 +++---
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git
Low level configuration didn't reset FPD Watchdog that's why accessing
it caused u-boot hang.
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Support DM in the MPC8xxx SPI driver, and remove the legacy SPI
interface.
Signed-off-by: Mario Six
---
drivers/spi/mpc8xxx_spi.c | 144 ++
1 file changed, 107 insertions(+), 37 deletions(-)
---
Changes v1 -> v2:
* Removed legacy
From: Siva Durga Prasad Paladugu
Send address cycles as per value read from onfi parameter
page for Read and write commands instead of using a
hard coded value. This may vary for different parts and
hence use it from onfi parameter page value.
Signed-off-by: Siva
Fix all "superfluous space after case" style errors.
Signed-off-by: Mario Six
---
Changes v1 -> v2:
None
---
drivers/spi/mpc8xxx_spi.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index
We do nothing in the loop if the "not empty" event was not detected. To
simplify the logic, check if this is the case, and skip the execution of
the loop early to reduce the nesting level and flag checking.
Signed-off-by: Mario Six
---
Changes v1 -> v2:
None
---
Minize the time the adapter is disabled (via SPI_MODE_EN
clearing/setting) to just the character length setting, and only set up
the temporary data writing variable right before we need it, so there is
a more clear distinction between setting up the SPI adapter, and setting
up the data to be
Decreasing the bit length and increasing the write data pointer should
be done when there are more than 32 bit of data, not 16 bit.
This did not produce incorrect behavior, because the only time where the
two checks produce different outcomes is the case of 16 < bitlen < 32,
and in this case the
Get rid of the is_read variable, and just keep the state of the "not
empty" and "not full" events in two boolean variables within the loop
body.
Signed-off-by: Mario Six
---
Changes v1 -> v2:
None
---
drivers/spi/mpc8xxx_spi.c | 12 +++-
1 file changed, 7
This commit moves the FPGA descriptor definition
to mach-zynq, where it makes more sense.
Based on patches from Ariel D'Alessandro
and Ezequiel Garcia
Signed-off-by: Michal Simek
---
arch/arm/Kconfig
On Thu, Mar 22, 2018 at 8:13 PM, Angelo Dureghello wrote:
> This patch adds DM support to cf_spi.c.
> To be able to build spi driver with DM support, a new config
> option has been introdiced (DM_NO_DT) since m68k architecture
> does not support fdt.
This can be different case,
Hi Jagan,
On Thu, Apr 19, 2018 at 1:32 PM, Jagan Teki wrote:
> On Tue, Apr 10, 2018 at 4:31 PM, Mario Six wrote:
>> Support DM for the MPC8XXX SPI driver.
>>
>> Signed-off-by: Mario Six
>> ---
>> drivers/spi/mpc8xxx_spi.c | 135
The transmission loop starts with setting some variables, which are only
used inside the loop. Reduce the scope to the loop to make the
declaration and initialization of these variables coincide.
In the case of char_size this also always initializes the variable
immediately with the final value
Now that showing silicon version is part of the CPU
info display, let's remove checkboard().
Note that the generic show_board_info() will still
show the DT 'model' property. For instance:
U-Boot 2018.05-rc2-00025-g611b3ee0159b (Apr 19 2018 - 11:23:12 +0200)
CPU: Zynq 7z045
Silicon: v1.0
There are three variables that have camel-case names, which is not the
preferred naming style.
Give those variables more compliant names instead.
Signed-off-by: Mario Six
---
Changes v1 -> v2:
None
---
drivers/spi/mpc8xxx_spi.c | 22 +++---
1 file changed,
Replace the function name with a "%s" format string and the __func__
variable in debug statements (as proposed by checkpatch).
Signed-off-by: Mario Six
---
Changes v1 -> v2:
None
---
drivers/spi/mpc8xxx_spi.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
The variable "char_size" holds the number of bits to be transferred in
the current loop iteration. A better name would be "xfer_bitlen", which
we rename this variable to.
Signed-off-by: Mario Six
---
Changes v1 -> v2:
None
---
drivers/spi/mpc8xxx_spi.c | 8
1 file
The comment before the transmission loop in conjunction with the
definition of SPI_TIMEOUT as 1000 implies that the loop is supposed to
have a timeout value of 1000 ms. But since there is no mdelay(1) or
similar in the loop body, the loop just runs 1000 times, without regard
for the time elapsed.
> On 18.04.2018, at 22:02, Marek Vasut wrote:
>
> On 04/18/2018 06:25 PM, Klaus Goger wrote:
>> When building the mxs platform in thumb mode gcc generates code using
>> the intra procedure call scratch register (ip/r12) for the calling the
>> lowlevel_init function. This modifies
On Tue, Apr 17, 2018 at 03:42:31PM +0200, Lothar Felten wrote:
> Add clock control entries for the gigabit interface of the Allwinner
> R40/V40 CPU
>
> Signed-off-by: Lothar Felten
Acked-by: Maxime Ripard
Maxime
--
Maxime Ripard, Bootlin
On Tue, Apr 17, 2018 at 03:42:33PM +0200, Lothar Felten wrote:
> Add gpio mux settings for the Allwinner R40/V40 CPU.
> The gigabit ethernet interface can only be routed to a fixed set of pins.
>
> Signed-off-by: Lothar Felten
Acked-by: Maxime Ripard
On 04/19/2018 07:51 AM, See, Chin Liang wrote:
> On Tue, 2018-04-17 at 11:28 +0200, Marek Vasut wrote:
>> On 04/17/2018 11:11 AM, See, Chin Liang wrote:
>>>
>>> On Tue, 2018-04-17 at 11:01 +0200, Marek Vasut wrote:
On 04/17/2018 10:52 AM, See, Chin Liang wrote:
>
>
> On Tue,
On 04/19/2018 10:02 AM, klaus.go...@theobroma-systems.com wrote:
>
>> On 18.04.2018, at 22:02, Marek Vasut wrote:
>>
>> On 04/18/2018 06:25 PM, Klaus Goger wrote:
>>> When building the mxs platform in thumb mode gcc generates code using
>>> the intra procedure call scratch
Instead of having a table right before the code implementing the length
setting for documentation, have inline comments for the if branches
actually implementing the length setting described table's entries
(which is readable thanks to the set_char_len function).
Signed-off-by: Mario Six
There is no need to call ioremap. Also reg pointer is completely unused
in the driver.
Signed-off-by: Michal Simek
---
drivers/watchdog/cdns_wdt.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/watchdog/cdns_wdt.c b/drivers/watchdog/cdns_wdt.c
index
Add PCIe driver for Intel FPGA PCIe IP. This driver operates the PCIe IP in
rootport mode only, the EP mode is not supported. The driver is tested
with the Intel e1000e NIC driver.
Signed-off-by: Ley Foon Tan
---
drivers/pci/Kconfig | 7 +
Thanks Scott for reviewing this patch
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Scott
> Wood
> Sent: Friday, April 20, 2018 6:40 AM
> To: Calvin Johnson
> Cc: U-Boot Mailing List
> Subject: Re:
Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file for all rockchip SoCs later.
Signed-off-by: Kever Yang
---
Move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file later for all rockchip SoCs.
Signed-off-by: Kever Yang
---
arch/arm/mach-rockchip/rk3368-board-spl.c | 5 -
Enable debug uart for kylin board in defconfig.
Signed-off-by: Kever Yang
---
configs/kylin-rk3036_defconfig | 4
1 file changed, 4 insertions(+)
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index c7bd73f..6ff187e 100644
---
Prefer to use structure to access register if we could.
Signed-off-by: Kever Yang
---
arch/arm/mach-rockchip/rk3399/rk3399.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c
Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file.
Signed-off-by: Kever Yang
---
Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file for all rockchip SoCs later.
Signed-off-by: Kever Yang
---
Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file.
Signed-off-by: Kever Yang
---
Move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file later for all rockchip SoCs.
Signed-off-by: Kever Yang
---
arch/arm/mach-rockchip/rk322x-board-spl.c | 43 ++---
On Thu, Apr 19, 2018 at 8:39 PM, Tom Rini wrote:
> On Thu, Apr 19, 2018 at 04:52:30AM +, Alex Kiernan wrote:
>>
>> On the face of it, this is a straightforward moveconfig, but because
>> of how CONFIG_FIT_SIGNATURE, CONFIG_IMAGE_FORMAT_LEGACY and
>>
ALl rockchip soc use DEBUG UART, and need init the uart iomux
in board_debug_uart_init().
Move the board_debug_uart_init() into soc file so that we can
make all soc config in soc file and share a common board file
later for all rockchip SoCs.
Kever Yang (10):
rockchip: enable
All Rockchip SoCs use DEBUG_UART_BOARD_INIT to init per board
UART IOMUX, enable it by default.
Signed-off-by: Kever Yang
---
arch/arm/Kconfig | 2 ++
arch/arm/mach-rockchip/Kconfig | 3 ---
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git
Prefer to use structure to access register if we can.
Signed-off-by: Kever Yang
---
arch/arm/mach-rockchip/rk3288/rk3288.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c
While switching to readl_poll_timeout macros from custom code
the waiting condition was accidently inverted, so it was pure
luck that this code works at least in some conditions.
Fix that by inverting exit condition for readl_poll_timeout.
Fixes: c6b4f031d9 ("DW SPI: fix tx data loss on FIFO
This patch adds an empty stub for board_quiesce_devices() which allows boards
to quiesce their devices before we boot into an OS in a platform agnostic way.
Signed-off-by: Alexander Graf
---
arch/riscv/include/asm/u-boot-riscv.h | 1 +
arch/riscv/lib/bootm.c| 4
To support efi_loader we need to have platform support for setjmp/longjmp.
Add it here.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Allow 32bit target
- Also save/restore ra, sp
---
arch/riscv/include/asm/setjmp.h | 26
arch/riscv/lib/Makefile |
Distro boot allows for a common boot path on systems that allow distributions
to easily boot from a default configuration.
This patch enables distro boot for the nx25-ae250. Hopefully this can serve
as a good example for new boards, so they enable it as well.
Signed-off-by: Alexander Graf
We were using our EFI_CACHELINE_SIZE define only in the runtime service
code, but left the image loader to use plain CONFIG_SYS_CACHELINE_SIZE.
This patch moves EFI_CACHELINE_SIZE into efi_loader.h and converts
the image loader to use it.
Signed-off-by: Alexander Graf
---
While we don't have VCI or UEFI naming conventions for RISC-V file paths yet,
we need to search for something. So let's make up a few defines that at least
allow us to get started until the specs officially include RISC-V.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Use
On Wed, Apr 18, 2018 at 10:37:43PM +0200, Hauke Mehrtens wrote:
> Libressl implements the OpenSSL 1.1 API partially and improved the
> support with version 2.7. For some code we have to take use the OpenSSL
> 1.0 API and for some parts the OpenSSL 1.1 API can be used.
> This was compile tested
Hi Michal,
On 19 April 2018 at 08:10, Michal Simek wrote:
> From: Ezequiel Garcia
>
> This driver is currently broken, refusing to initialize properly.
>
> The reason is that get_nand_dev_by_index() was being called before
>
The hello world binary and a few selftests require to build EFI target
binaries, not just the EFI host environment.
This patch adds all required files to generate an EFI binary for
RISC-V.
Signed-off-by: Alexander Graf
---
new in v2
---
arch/riscv/config.mk | 5
We now have RISC-V support in U-Boot - which is great!
However, not that we're finally making progress to converge on
efi_loader and distro boot for booting on ARM platforms, we
really want to make sure there is no technical reason not to
do the same on RISC-V as well.
So this patch set
The linker can remove sections that are never addressed, so it makes a lot
of sense to declare every function as an individual section.
This reduces the output U-Boot code size by ~30kb for me.
Signed-off-by: Alexander Graf
---
arch/riscv/config.mk | 2 +-
1 file changed, 1
We have almost all pieces needed to support RISC-V UEFI binaries in place
already. The only missing piece are ELF relocations for runtime code and
data.
This patch adds respective support in the linker script and the runtime
relocation code. It also allows users to enable the EFI_LOADER
From: Ezequiel Garcia
This driver is currently broken, refusing to initialize properly.
The reason is that get_nand_dev_by_index() was being called before
nand_register(), thus returning a pointer into uninitialized memory.
In other words, the struct mtd_info used
On Tue, Apr 10, 2018 at 5:10 PM, Eugeniy Paltsev
wrote:
> Add support for the SST sst26wf016, sst26wf032 and sst26wf064 flash IC:
>
> sst26wf*** flash series block protection implementation differs from other
> SST series, so we add implementation for sst26wf***
On Tue, Apr 10, 2018 at 4:31 PM, Mario Six wrote:
> Support DM for the MPC8XXX SPI driver.
>
> Signed-off-by: Mario Six
> ---
> drivers/spi/mpc8xxx_spi.c | 135
> +-
> 1 file changed, 133 insertions(+), 2
On Thu, Apr 19, 2018 at 1:48 PM, Jagan Teki wrote:
> On Thu, Apr 19, 2018 at 5:15 PM, Mario Six wrote:
>> Hi Jagan,
>>
>> On Thu, Apr 19, 2018 at 1:32 PM, Jagan Teki wrote:
>>> On Tue, Apr 10, 2018 at 4:31 PM, Mario Six
On Thu, Apr 19, 2018 at 5:15 PM, Mario Six wrote:
> Hi Jagan,
>
> On Thu, Apr 19, 2018 at 1:32 PM, Jagan Teki wrote:
>> On Tue, Apr 10, 2018 at 4:31 PM, Mario Six wrote:
>>> Support DM for the MPC8XXX SPI driver.
>>>
>>>
The function signatures in the driver are quite long as is. Use short
type names (uint etc.) to make them more readable.
Signed-off-by: Mario Six
---
drivers/spi/mpc8xxx_spi.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
---
Changes v1 -> v2:
None
---
Instead of having a nested if block, just have two branches within the
overarching if block to eliminate one nesting level.
Signed-off-by: Mario Six
---
Changes v1 -> v2:
None
---
drivers/spi/mpc8xxx_spi.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
Am 02.04.2018 um 08:15 schrieb Siva Durga Prasad Paladugu:
This patch adds support to decrypt an encrypted bitstream
or image. This zynq aes command can either load decrypted
image back to DDR or it can load an encrypted bitsream to
PL directly by decrypting it. The image has to be encrypted
On 04/19/2018 05:49 PM, Alexander Graf wrote:
While we don't have VCI or UEFI naming conventions for RISC-V file paths yet,
we need to search for something. So let's make up a few defines that at least
allow us to get started until the specs officially include RISC-V.
Signed-off-by: Alexander
On 04/19/2018 07:19 PM, Heinrich Schuchardt wrote:
On 04/19/2018 05:49 PM, Alexander Graf wrote:
While we don't have VCI or UEFI naming conventions for RISC-V file
paths yet,
we need to search for something. So let's make up a few defines that
at least
allow us to get started until the
Hi Alex,
I used work available in
https://android.googlesource.com/platform/external/u-boot/+/android-o-mr1-iot-preview-7.
I selected the n-iot-preview-4 because it is U-Boot version 2017.01 which is
compatible with TI U-Boot work.
One quick feedback about the boot_android :
> The new
On 04/18/2018 03:11 PM, Michal Simek wrote:
Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot.
This patch is adding minimal support to get U-Boot boot.
DDR needs to be partitioned. Console is done via Cadence uart driver and
the first Cadence Triple Timer Counter is used for time.
On 04/19/2018 07:19 PM, Heinrich Schuchardt wrote:
On 04/19/2018 05:49 PM, Alexander Graf wrote:
While we don't have VCI or UEFI naming conventions for RISC-V file
paths yet,
we need to search for something. So let's make up a few defines that
at least
allow us to get started until the
CONFIG_CMD_LOG without CONFIG_LOG leads to a build error:
‘gd_t {aka volatile struct global_data}’ has no member named
‘default_log_level’
So CMD_LOG should select LOG.
Signed-off-by: Heinrich Schuchardt
---
cmd/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
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