This is 3rd version of patchset to convert reset, system and clock manager
drivers to use #define instead of struct.
Only patch 1 had minor fix for missing '0' in clkmgr DT node, other pataches
are
unchanged.
Tested on Cyclone 5, Arria 10 and Stratix 10 devices.
Changes in v3:
- Patch 1:
Convert reset manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.
Signed-off-by: Ley Foon Tan
---
v3:
- Remove "No functional change" in commit description.
v2:
- Get base address from DT
- Revert to use writel(), readl(), setbits_le32() and clrbits_le32().
- Add prefix to
Add u-boot,dm-pre-reloc for sysmgr and clkmgr nodes to use it in SPL.
In preparation to get base address from DT.
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v3:
- Fix missing '0' in clkmgr@ffd1 node.
---
arch/arm/dts/socfpga-common-u-boot.dtsi | 8
On 10.10.19 07:52, Vignesh Raghavendra wrote:
AM654/J721e has HyperBus Memory Controller that supports HyperFlash and
HyperRAM devices. It provides a memory mapped interface to interact with
these devices. Add a driver to support the same.
Driver calibrates the controller, setups up for MMIO
Convert system manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.
Signed-off-by: Ley Foon Tan
---
v3:
- Remove "No functional change" in commit description.
v2:
- Revert to use writel(), readl() and etc.
- Get base address from DT.
- Add prefix to defines.
---
Convert clock manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.
Signed-off-by: Ley Foon Tan
---
v3:
- Remove "No functional change" in commit description.
v2:
- Revert to use writel(), readl() and etc.
- Get base address from DT.
- Add prefix to defines.
---
Hi Simon,
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> This should take account of the end of the new cache record since a record
> cannot extend beyond the end of the flash region. This problem was not
> seen before due to the alignment of the relatively small amount of MRC
> data.
>
On 10.10.19 07:52, Vignesh Raghavendra wrote:
Make use of CONFIG_SYS_MONITOR_BASE only when available to avoid build
error when CONFIG_SYS_MONITOR_BASE is not defined.
Signed-off-by: Vignesh Raghavendra
---
v2:
Make macro check consistent as pointed out by Stefan
Reviewed-by: Stefan Roese
On Fri, Oct 4, 2019 at 7:04 PM Marek Vasut wrote:
>
> On 10/4/19 10:59 AM, Ley Foon Tan wrote:
> > On Thu, Oct 3, 2019 at 9:00 PM Marek Vasut wrote:
> >>
> >> Migrate CONFIG_DESIGNWARE_WATCHDOG to Kconfig and update the headers
> >> accordingly, no functional change. The S10 enables the WDT only
On 10/10/19 2:50 AM, AKASHI Takahiro wrote:
On Wed, Oct 09, 2019 at 07:41:40PM +0200, Heinrich Schuchardt wrote:
On 10/9/19 9:19 AM, AKASHI Takahiro wrote:
There is no practical reason to set a maxmum length of text either for
file path or whole device path in device path-to-text conversion.
On Thu, Oct 10, 2019 at 3:14 PM Simon Goldschmidt
wrote:
>
> On Thu, Oct 10, 2019 at 8:20 AM Ley Foon Tan wrote:
> >
> > Convert reset manager for Gen5, Arria 10 and Stratix 10 from struct
> > to defines.
>
> A commit message should describe what the commit does. By leaving out the fact
> that
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> Set up MTRRs for the FST SDRAM regions to improve performance.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/lib/fsp/fsp_dram.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/x86/lib/fsp/fsp_dram.c
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> Many of the Kconfig options do not apply to FSP2. Update them to use the
> FSP_VERSION1 condition instead.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/Kconfig | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
On Thu, 10 Oct 2019 10:43:46 +0200
Simon Goldschmidt simon.k.r.goldschm...@gmail.com wrote:
...
> > Why is this required? In the past we have rejected all new code adding
> > defines instead of structs for register accesses. Have we changed our mind
> > now?
>
> Who is we?
U-Boot
Fix error debug messages to be more accurate and aligned with debug message
style in the whole file.
And do not initialize ret variable because it is initialized later on and
it is just additional step.
Fixes: 1327d1678bd2 ("firmware: zynqmp: Add zynqmp-power support")
Reported-by: Luca Ceresoli
Hi,
On 10/10/19 11:33, Michal Simek wrote:
> Fix error debug messages to be more accurate and aligned with debug message
> style in the whole file.
> And do not initialize ret variable because it is initialized later on and
> it is just additional step.
>
> Fixes: 1327d1678bd2 ("firmware:
Hi Simon,
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> Change the algorithm to first find the flash device then read the
> properties using the livetree API. With this change the device is not
> probed so this needs to be done in mrccache_save().
>
> Signed-off-by: Simon Glass
> ---
Add u-boot,dm-pre-reloc for sysmgr and clkmgr nodes to use it in SPL.
In preparation to get base address from DT.
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v3:
- Fix missing '0' in clkmgr@ffd1 node.
---
arch/arm/dts/socfpga-common-u-boot.dtsi | 8
This is 4th version of patchset to convert reset, system and clock manager
drivers to use #define instead of struct. This patchset get managers' base
address from DT node instead of using #define.
Patch 1 unchanged, patch 2,3,4 update commit message.
Tested on Cyclone 5, Arria 10 and Stratix 10
On 10/10/19 7:15 AM, Simon Goldschmidt wrote:
[...]
>>> Have you dropped this? It's assigned to me in patchwork (I'm going
>>> through the list of old items assigned to me...).
>>
>> I don't know, sorry. Apparently there isn't enough information to decide
>> whether this patch is correct or not.
On 10/10/19 8:28 AM, Ley Foon Tan wrote:
> On Fri, Oct 4, 2019 at 7:04 PM Marek Vasut wrote:
>>
>> On 10/4/19 10:59 AM, Ley Foon Tan wrote:
>>> On Thu, Oct 3, 2019 at 9:00 PM Marek Vasut wrote:
Migrate CONFIG_DESIGNWARE_WATCHDOG to Kconfig and update the headers
accordingly, no
Hi Simon,
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> These drivers are not needed on all platforms. While they are small, it
> is useful in TPL to drop then. Add Kconfig control to allow this.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/pch/Kconfig | 18 ++
>
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> At present the interrupt table is included in all phases of U-Boot. Allow
> it to be omitted, e.g. in TPL, to reduce size.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/Makefile | 2 +-
> 1 file changed, 1 insertion(+), 1
Hi Patrick,
> Copy the partition support from NAND backend to SF,
> support part and partubi option.
> In case of ubi partition, erase the rest of the
> partition as it is mandatory for UBI.
>
> for example:
>
> U-Boot> env set dfu_alt_info "spl part 0 1;\
> u-boot part 0 2;u-boot-env part 0
On Thu, Oct 10, 2019 at 8:20 AM Ley Foon Tan wrote:
>
> Convert reset manager for Gen5, Arria 10 and Stratix 10 from struct
> to defines.
A commit message should describe what the commit does. By leaving out the fact
that you're now loading the base address from DTS, you're not describing all
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> This function needs to be different for FSP2, so move the existing
> function into the fsp1 directory. Since it is only called from one file,
> drop it from the header file.
>
> Signed-off-by: Simon Glass
> ---
>
>
Hi Simon,
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> Add support for a second cache type, for apollolake.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/include/asm/mrccache.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/x86/include/asm/mrccache.h
On Thu, Oct 10, 2019 at 10:09 AM Anatolij Gustschin wrote:
>
> On Thu, 10 Oct 2019 09:16:14 +0200
> Simon Goldschmidt simon.k.r.goldschm...@gmail.com wrote:
>
> > On Thu, Oct 10, 2019 at 8:20 AM Ley Foon Tan wrote:
> > >
> > > Convert system manager for Gen5, Arria 10 and Stratix 10 from struct
On Thu, Oct 10, 2019 at 11:29 AM Anatolij Gustschin wrote:
>
> On Thu, 10 Oct 2019 10:43:46 +0200
> Simon Goldschmidt simon.k.r.goldschm...@gmail.com wrote:
> ...
> > > Why is this required? In the past we have rejected all new code adding
> > > defines instead of structs for register accesses.
Hi Simon,
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> Newer Intel SoCs have different ways of setting up cache-as-ram (CAR).
> Add support for these along with suitable configuration options.
>
I wonder why do we need do this in U-Boot. Isn't FSP-T doing the CAR for us?
>
On 09. 10. 19 19:28, Simon Goldschmidt wrote:
> Am 09.10.2019 um 18:26 schrieb Tom Rini:
>> On Tue, Oct 08, 2019 at 10:48:39AM +0200, Michal Simek wrote:
>>> Hi Tom,
>>>
>>> On 19. 09. 19 15:28, Michal Simek wrote:
On 13. 09. 19 17:09, Tom Rini wrote:
> On Wed, Sep 11, 2019 at 03:39:53PM
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> At present we reuse the mrc_output char * to also point to the cache
> record after it has been set up. This is confusing and doesn't save much
> data space.
>
> Add a new mrc_cache member instead.
>
> Signed-off-by: Simon Glass
> ---
>
>
On Thu, Oct 10, 2019 at 8:20 AM Ley Foon Tan wrote:
>
> Convert system manager for Gen5, Arria 10 and Stratix 10 from struct
> to defines.
Same as 2/4: please add a description about the "read address from dts" thing.
Regards,
Simon
>
> Signed-off-by: Ley Foon Tan
>
> ---
> v3:
> - Remove "No
Convert clock manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.
Change to get clock manager base address from DT node instead of using
#define.
Signed-off-by: Ley Foon Tan
---
v4:
- Update commit message about get base address from DT node.
v3:
- Remove "No functional change"
Hi Simon,
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> With apollolake we need to support a normal cache, which almost never
> changes and a much smaller 'variable' cache which changes every time.
>
> Update the code to add a cache type, use an array for the caches and use a
> for
Hi Simon,
On Wed, Sep 25, 2019 at 11:02 PM Simon Glass wrote:
>
> The current 'fsp' command only works with FSP1. Update it to avoid trying
> to build it with FSP2.
>
> Signed-off-by: Simon Glass
> ---
>
> cmd/x86/Makefile | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
On 10/10/19 12:00 PM, Anatolij Gustschin wrote:
> On Thu, 10 Oct 2019 11:39:13 +0200
> Marek Vasut wrote:
> ...
>>> The preferred way for I/O access is documented in [1], see "Use structures
>>> for I/O access" section.
>>
>> This seems to not scale and I keep running into the problem where a
On Thu, Oct 10, 2019 at 12:46 PM Michal Simek wrote:
>
> On 09. 10. 19 19:28, Simon Goldschmidt wrote:
> > Am 09.10.2019 um 18:26 schrieb Tom Rini:
> >> On Tue, Oct 08, 2019 at 10:48:39AM +0200, Michal Simek wrote:
> >>> Hi Tom,
> >>>
> >>> On 19. 09. 19 15:28, Michal Simek wrote:
> On 13.
On Thu, Oct 10, 2019 at 8:20 AM Ley Foon Tan wrote:
>
> Convert clock manager for Gen5, Arria 10 and Stratix 10 from struct
> to defines.
Same as 2/4: please add a description about the "read address from dts" thing.
Regards,
Simon
>
> Signed-off-by: Ley Foon Tan
>
> ---
> v3:
> - Remove "No
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> At present with fsp a single DRAM bank is added which extends to the
> whole size of memory. However there is typically only 2GB of memory
> available below the 4GB boundary, and this is what is used by U-Boot while
> running in 32-bit mode.
ls1028a has 4 personalities: ls1028a, ls1027a, ls1017a and ls1018a.
Both ls1027a and ls1017a personalities are lower functionality version
which doesn't support the multimedia subsystems, like LCD, GPU.
To disable multimedia feature on non-multimedia version, set the status
property to disabled
On Thu, 10 Oct 2019 11:39:13 +0200
Marek Vasut ma...@denx.de wrote:
...
> > The preferred way for I/O access is documented in [1], see "Use structures
> > for I/O access" section.
>
> This seems to not scale and I keep running into the problem where a few
> registers changed between various
Convert system manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.
Change to get system manager base address from DT node instead of
using #define.
Signed-off-by: Ley Foon Tan
---
v4:
- Update commit message about get base address from DT node.
v3:
- Remove "No functional
Convert reset manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.
Change to get reset manager base address from DT node instead of using
#define.
Signed-off-by: Ley Foon Tan
---
v4:
- Update commit message about get base address from DT node.
v3:
- Remove "No functional change"
On Thu, 10 Oct 2019 09:16:14 +0200
Simon Goldschmidt simon.k.r.goldschm...@gmail.com wrote:
> On Thu, Oct 10, 2019 at 8:20 AM Ley Foon Tan wrote:
> >
> > Convert system manager for Gen5, Arria 10 and Stratix 10 from struct
> > to defines.
>
> Same as 2/4: please add a description about the
Function should report error when called in EL3 context. Also report it as
error instead 0 (success).
Reported-by: Luca Ceresoli
Signed-off-by: Michal Simek
---
Based on https://lists.denx.de/pipermail/u-boot/2019-October/385462.html
series.
---
drivers/firmware/firmware-zynqmp.c | 6 --
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> This option pulls in libfdt and therefore precludes getting the full
> code-size savings of op-platdata. Drop it since it will be enabled anyway
> if needed.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/Kconfig | 1 -
> 1 file changed, 1
Hi,
On 10/10/19 11:13, Michal Simek wrote:
> Function should report error when called in EL3 context. Also report it as
> error instead 0 (success).
>
> Reported-by: Luca Ceresoli
> Signed-off-by: Michal Simek
> ---
>
> Based on https://lists.denx.de/pipermail/u-boot/2019-October/385462.html
Hi Simon,
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> Many Intel SoCs require a FIT in order to boot properly. Add an option to
> include this and enable it by default.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/Kconfig | 9 +
> arch/x86/dts/u-boot.dtsi | 6
On 10/10/19 11:29 AM, Anatolij Gustschin wrote:
> On Thu, 10 Oct 2019 10:43:46 +0200
> Simon Goldschmidt simon.k.r.goldschm...@gmail.com wrote:
> ...
>>> Why is this required? In the past we have rejected all new code adding
>>> defines instead of structs for register accesses. Have we changed our
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> This function is a bit confusing at present due to the error handling.
> Update it to remove the goto, returning errors as they happen.
>
> While we are here, use hex for the data size since this is the norm in
> U-Boot.
>
> Signed-off-by:
Hi Simon,
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> Define this symbol so that we can use binman symbols correctly.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/u-boot-spl.lds | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git
> Subject: [PATCH 2/3] ARM: imx6q_logic: Enable Pin muxing in SPL
>
> With the 256KB of OCRAM available to SPL now, there should be enough room
> to enable the pinmuxing in SPL from the device tree.
>
> This patch enables SPL_PINCTRL et al and adds the serial and usdhc pin mux
> references to
On 10. 10. 19 10:22, Luca Ceresoli wrote:
> Hi Michal,
>
> On 04/10/19 16:27, Michal Simek wrote:
>> versal_pm_request() and invoke_smc() are almost the same. Only one
>> difference is that versal_pm_request is adding PM_SIP_SVC offset to api_id.
>> The patch is moving platform implementation to
On 09. 10. 19 17:03, Luca Ceresoli wrote:
> Hi,
>
> On 02/10/19 15:39, Michal Simek wrote:
>> From: Ibai Erkiaga
>>
>> zynqmp-power driver for ZynqMP to handle the communication with the PMU
>> firmware. Firmware driver just probes subnodes and power driver handles
>> communication with PMU
Hi Simon,
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> At present we don't support loading microcode with FSP2. The correct way
> to do this is by adding it to the FIT. For now, disable including
> microcode in the image.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/Kconfig
On Wed, Oct 09, 2019 at 02:30:44PM +0900, AKASHI Takahiro wrote:
> This function, and hence rsa_verify(), will perform RSA verification
> with two essential parameters for a RSA public key in contract of
> rsa_verify_with_keynode(), which requires additional three parameters
> stored in FIT image.
On Wed, Sep 25, 2019 at 11:02 PM Simon Glass wrote:
>
> At present this produces a 16-byte file. It is intended to start 16 bytes
> before the end of ROM and pads with zeroes to readh the end.
>
> But binman sometimes wants to add an image-header at the very end of ROM.
> Furthermore binman
Hi Michal,
On 04/10/19 16:27, Michal Simek wrote:
> versal_pm_request() and invoke_smc() are almost the same. Only one
> difference is that versal_pm_request is adding PM_SIP_SVC offset to api_id.
> The patch is moving platform implementation to firmware driver code for
> synchronization.
>
>
On Thu, Oct 10, 2019 at 2:15 AM Kever Yang wrote:
>
> Hi Peter,
>
> On 2019/10/9 下午8:01, Peter Robinson wrote:
> > On Wed, Oct 9, 2019 at 11:08 AM Kever Yang
> > wrote:
> >> We use to reserve IRAM to avoid the SPL text overlap with ATF M0 code,
> >> and when we introduce the TPL, the SPL space
On 09. 10. 19 17:02, Luca Ceresoli wrote:
> Hi Ibai, Michal,
>
> I had half-written a review of this patch and patch 4. Unfortunately I
> didn't finish them before they got applied. I'll send them now anyway,
> they are mostly nitpicking but you might consider them for a future
> improvement.
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> We don't generally have enough space to run this, so don't build it into
> TPL. This helps reduce the size of TPL.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/lib/Makefile | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Bin
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> Since x86 users binman now, we don't need this compile-time define.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/config.mk | 1 -
> 1 file changed, 1 deletion(-)
>
Reviewed-by: Bin Meng
On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
>
> This is not used anywhere now, so drop it.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/Kconfig | 5 -
> arch/x86/cpu/config.mk | 1 -
> 2 files changed, 6 deletions(-)
>
Reviewed-by: Bin Meng
Hi Patrick,
> Add documentation for dfu stack and "dfu" command.
>
Reviewed-by: Lukasz Majewski
> Signed-off-by: Patrick Delaunay
> ---
>
> Changes in v2:
> - Add dfu documentation
>
> doc/README.dfu | 144
> + 1 file changed, 144
>
Hi Simon,
On Wed, Sep 25, 2019 at 11:02 PM Simon Glass wrote:
>
> Include the IFWI section and the FSP-M binary. The FSP-T binary is not
> currently used, as CAR is set up manually.
>
> Also drop the FSP binary as this relates only to FSP1.
>
> Signed-off-by: Simon Glass
> ---
>
>
Hi Marek
On Thu, Oct 10, 2019 at 2:47 PM Marek Vasut wrote:
>
> On 10/10/19 1:25 PM, Igor Opaniuk wrote:
> [...]
> >* from which it derives offsets in the PHY and ANATOP register sets.
> >*
> >* Here we attempt to calculate these indexes from DT information as
> > -
Signed-off-by: Lukasz Majewski
---
Changes in v3: None
include/configs/kp_imx6q_tpc.h | 21 +
1 file changed, 21 insertions(+)
diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h
index 2435ebbc7f..fae45cbf3e 100644
---
From: Igor Opaniuk
This fixes the issues with calculation of controller indexes in
ehci_usb_bind() for iMX7, as USB controllers on iMX7 SoCs aren't
placed next to each other, and their addresses incremented by 0x1000.
Example of USB nodes for iMX7S/D:
usbotg1: usb@30b1 {
compatible =
This adds platform code and the device tree for the Phytium FT2004 SoC.
The initial support comprises the UART and the GMAC.
Signed-off-by: Steven Hao
---
MAINTAINERS | 6 +++
arch/arm/Kconfig | 8
arch/arm/dts/Makefile| 2 +
On 10/9/19 10:07 PM, Michal Simek wrote:
From: Zumeng Chen
This patch is to build the coresight topology structure of zynq-7000
series according to the docs of coresight and userguide of zynq-7000.
Signed-off-by: Zumeng Chen
Signed-off-by: Quanyang Wang
Signed-off-by: Michal Simek
---
Extend test suite to cover also automatic octal/hex converstions which
haven't been implemented in past.
Signed-off-by: Michal Simek
---
Depends on https://lists.denx.de/pipermail/u-boot/2019-September/383309.html
There are of course other tests which we can run but not sure if make sense
to
On Thu, Oct 10, 2019 at 3:43 PM Marek Vasut wrote:
>
> On 10/10/19 2:29 PM, Igor Opaniuk wrote:
> > Hi Marek
>
> Hi Igor,
>
> > On Thu, Oct 10, 2019 at 2:47 PM Marek Vasut wrote:
> >>
> >> On 10/10/19 1:25 PM, Igor Opaniuk wrote:
> >> [...]
> >>>* from which it derives offsets in the PHY
On 10/10/19 2:55 PM, Igor Opaniuk wrote:
> On Thu, Oct 10, 2019 at 3:43 PM Marek Vasut wrote:
>>
>> On 10/10/19 2:29 PM, Igor Opaniuk wrote:
>>> Hi Marek
>>
>> Hi Igor,
>>
>>> On Thu, Oct 10, 2019 at 2:47 PM Marek Vasut wrote:
On 10/10/19 1:25 PM, Igor Opaniuk wrote:
[...]
>
This patch series converts imx6q based tpc70 board to use driver model and
device tree description in SPL and U-Boot proper.
All the non-DM parts of the code has been removed.
This patch series also uses the Common Clock Framework [CCF] as a base for
clock management on imx6q board.
Those
This commit defines the TPC70 imx6q board with device tree description.
Signed-off-by: Lukasz Majewski
---
Changes in v3:
- Squash
'imx: tpc70: dts: Add TPC70 board (imx6q based) device tree description'
with
'imx: tpc70: DTS: Explicitly add imx6q-kp.dtb to Makefile for DTB compilation'
The TPC70 can boot from SD card (debug/development) and eMMC (production).
The board_boot_order() function provides a run time check for the device
from which one wants to boot (it is selected by GPIO pins setup).
Moreover, a fallback to SD card is provided if the detection is not
possible or
On 10/10/19 2:29 PM, Igor Opaniuk wrote:
> Hi Marek
Hi Igor,
> On Thu, Oct 10, 2019 at 2:47 PM Marek Vasut wrote:
>>
>> On 10/10/19 1:25 PM, Igor Opaniuk wrote:
>> [...]
>>>* from which it derives offsets in the PHY and ANATOP register sets.
>>>*
>>>* Here we attempt to
On 10/10/19 1:25 PM, Igor Opaniuk wrote:
[...]
>* from which it derives offsets in the PHY and ANATOP register sets.
>*
>* Here we attempt to calculate these indexes from DT information as
> - * well as we can. The USB controllers on all existing iMX6/iMX7 SoCs
> -
This commit adds new file - imx6q-kp-u-boot.dtsi with a set of u-boot
specific properties for imx6q KP device.
Signed-off-by: Lukasz Majewski
---
Changes in v3: None
arch/arm/dts/imx6q-kp-u-boot.dtsi | 59 +++
1 file changed, 59 insertions(+)
create mode 100644
This patch converts the TPC70 to use driver model and device tree
description in both SPL and u-boot proper.
Notable changes (DM/DTS conversion):
- PINCTRL{_IMX6}
- DM_I2C
- enable 'regulator' and 'pmic' commands
- DM_MMC and BLK (USDHC)
- DM_ETH
- DM WDT (including SYSRESET)
Signed-off-by:
This patch updates envs responsible for using USB pendrive as a
SWUpdate based tool for recovery and update.
Signed-off-by: Lukasz Majewski
---
Changes in v3: None
include/configs/kp_imx6q_tpc.h | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git
Add i.MX8QM qmx8 congatec board support
Boot log as below:
U-Boot 2019.10-2-gfe063598db (Oct 10 2019 - 10:29:07 +0200)
CPU: NXP i.MX8QM RevB A53 at 1200 MHz
Model: congatec QMX8
Board: conga-QMX8
Build: SCFW 65afe5f6
Boot: SD2
DRAM: 6 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Hello list,
this patch adds support for the congatec QMX8 Qseven board.
Best regards,
Oliver
Oliver Graute (1):
imx: support for conga-QMX8 board
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx8qm-cgtqmx8.dts | 427 +
arch/arm/mach-imx/Makefile
From: Igor Opaniuk
This fixes the issues with calculation of controller indexes in
ehci_usb_bind() for iMX7, as USB controllers on iMX7 SoCs aren't
placed next to each other, and their addresses incremented by 0x1.
Example of USB nodes for iMX7S/D:
usbotg1: usb@30b1 {
compatible =
The TPC70 can boot from eMMC's boot0. This patch allows it to update
this HW partition's SPL.
Signed-off-by: Lukasz Majewski
---
Changes in v3: None
include/configs/kp_imx6q_tpc.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/configs/kp_imx6q_tpc.h
This is a cosmetic change, just to use proper define instead
of magic numbers.
Signed-off-by: Lukasz Majewski
---
Changes in v3: None
board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
This change sets the default state of LEDs on TPC70.
Signed-off-by: Lukasz Majewski
---
Changes in v3: None
board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 4
1 file changed, 4 insertions(+)
diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c
index
From: Igor Opaniuk
This fixes the issues with calculation of controller indexes in
ehci_usb_bind() for iMX7, as USB controllers on iMX7 SoCs aren't
placed next to each other, and their addresses incremented by 0x1.
Example of USB nodes for iMX7S/D:
usbotg1: usb@30b1 {
compatible =
On Thu, 3 Oct 2019 at 21:41, AKASHI Takahiro wrote:
>
> Without this patch, compiling may potentially fail.
>
> Signed-off-by: AKASHI Takahiro
> ---
> arch/sandbox/include/asm/u-boot-sandbox.h | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Simon Glass
Hi Bin,
On Thu, 10 Oct 2019 at 01:09, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
> >
> > Define this symbol so that we can use binman symbols correctly.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/x86/cpu/u-boot-spl.lds | 5 -
> > 1
On Sun, 6 Oct 2019 at 15:38, Heinrich Schuchardt wrote:
>
> With the __packed attribute sandbox_defconfig cannot be compiled with GCC
> 9.2.1:
>
> fs/cbfs/cbfs.c: In function ‘file_cbfs_fill_cache’:
> fs/cbfs/cbfs.c:164:16: error: taking address of packed member of
> ‘struct cbfs_cachenode’ may
Hi Bin,
On Wed, 9 Oct 2019 at 23:09, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
> >
> > At present the records are 4KB in size. This is unnecessarily large when
> > the SPI-flash erase size is 256 bytes. Reduce it so it will be more
>
> But this will
Hi Simon,
Am Donnerstag, 10. Oktober 2019, 19:06:12 CEST schrieb Simon Glass:
> On Tue, 1 Oct 2019 at 14:23, Heiko Stuebner wrote:
> > A trusted execution environment should also get loaded as loadable from
> > a fit image, so add the possibility to present a tee.elf to make_fit_atf.py
> > that
Hi,
On Sun, 6 Oct 2019 at 15:06, Tom Rini wrote:
>
> On Sun, Oct 06, 2019 at 10:50:45PM +0200, Heinrich Schuchardt wrote:
>
> > 'make tests' requires cbfstool. But this file is not built by U-Boot.
If so this is a bug. The tests are supposed to detect that cbfstool is
missing and skip the
Hi Bin,
On Sat, 5 Oct 2019 at 08:36, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > Most of the timer-calibration methods are not needed on recent Intel CPUs
> > and just increase code size. Add an option to use the known-good way to
> > get the
On 10/10/19 5:44 AM, Michal Simek wrote:
Extend test suite to cover also automatic octal/hex converstions which
haven't been implemented in past.
Acked-by: Stephen Warren
___
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U-Boot@lists.denx.de
On Wed, 2 Oct 2019 at 19:07, Bin Meng wrote:
>
> The doc currently uses sandbox_defconfig as examples of enabling
> debug/verbose output of binman. However during a sandbox build it
> does not call binman at all. Change it to qemu-x86_defconfig.
>
> Signed-off-by: Bin Meng
> ---
>
>
Hi Bin,
On Mon, 7 Oct 2019 at 08:31, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Oct 2, 2019 at 8:34 PM Bin Meng wrote:
> >
> > Hi Simon,
> >
> > On Wed, Oct 2, 2019 at 10:15 AM Simon Glass wrote:
> > >
> > > Hi Bin,
> > >
> > > On Wed, 25 Sep 2019 at 08:58, Simon Glass wrote:
> > > >
> > > >
Hi Heiko,
On Tue, 1 Oct 2019 at 14:23, Heiko Stuebner wrote:
>
> A trusted execution environment should also get loaded as loadable from
> a fit image, so add the possibility to present a tee.elf to make_fit_atf.py
> that then gets included as additional loadable into the generated its.
>
> For
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