Re: [USRP-users] Error building OOT RFNOC Module with dependencies

2017-09-27 Thread Tom Bereknyei via USRP-users
John, will this be open source? We are also looking at modifying the SIGGEN to add functionality. From the name it seems you are transmitting on two channels. We would need more, but the concept seems similar. On Wed, Sep 27, 2017 at 18:10 John Medrano via USRP-users < usrp-users@lists.ettus.com>

[USRP-users] Error building OOT RFNOC Module with dependencies

2017-09-27 Thread John Medrano via USRP-users
Hello, We have modified sig_gen module to create an OOT module and we are attempting to build image. But we receive an error while trying to build the test bench. sig_gen relies on modules cadd, cordic_rotater, and axi_clip_complex. As seen below, it is unable to find these modules while

[USRP-users] the rfnoc fifos

2017-09-27 Thread Jason Matusiak via USRP-users
OK, dumb question, but I just can't come up with a good answer.  I understand that the RFNoC FIFOs are a must if you only have one NoC block that you want to use and are using the GNURadio host [1].  So why do pretty much most of the examples ALWAYS have at least one, and why would I want to

[USRP-users] Reset EEPROM IP Addressess x310

2017-09-27 Thread Brian J Brenner via USRP-users
Hello, I'm new to using the x310 and I was trying to set up the XG image so that I could communicate over ip addresses 192.168.30.2 and 192.168.40.2. I didn't realize the EEPROM already had these set by default so I ran the command: ./usrp_burn_mb_eeprom

[USRP-users] USRP E310 - reading data overflows.

2017-09-27 Thread Varesio Andrea via USRP-users
Hello Problem statement. I am using a USRP E310 device and I am developing an application performing acquisition and writing data to a high speed external USB pen drive. The problem is inability to sustain rx data stream (overflow occurs). The question is whether it is available a API enabling

Re: [USRP-users] Fosphor issue

2017-09-27 Thread Alex Young via USRP-users
On Tue, Sep 26, 2017 at 3:32 PM, Nate Temple wrote: > Hi Alex, > > You'll need to run uhd_images_downloader on the E3xx, and note the URL for > the FPGA .zip file it is attempting to fetch within the output. Download > that zip file on a computer that is connected to the

Re: [USRP-users] Building USRP Image with Vivado GUI

2017-09-27 Thread EJ Kreinar via USRP-users
Hi Luis, In my experience this is a very common FPGA error! It gets me very often. It's not specific to the GUI workflow... You must make sure the following factors agree in the rfnoc_ce_auto_inst.v: 1. The number of CEs localparam (NUM_CE) must equal to the actual number of CEs instantiated.

[USRP-users] Building USRP Image with Vivado GUI

2017-09-27 Thread Torres Figueroa, Luis Angel via USRP-users
Hi folks, I want to modify and build FPGA images using the Vivado GUI, however I’m still having problems with this. Here the procedure I have followed. I have first set up the environment using the command “make X310_RFNOC_HG GUI=1” and then run the synthesis/implementation; this worked fine