Re: [USRP-users] Issues/suggestions for latest rfnocmodtool

2017-07-13 Thread Nicolas Cuervo via USRP-users
Hi Michael, if you are certain that having the templates for QA in either python or cpp (any specific language you are using from these two for the unit tests?) is useful for you (and potentially for other users), then I will push them back. >From this discussion, I will also set a more

Re: [USRP-users] Issues/suggestions for latest rfnocmodtool

2017-07-13 Thread Nicolas Cuervo via USRP-users
Hello Michael, It seems that 'import sys' is missing from the top of > gr-ettus/python/utils/rfnocmodtool > Yeah, this was known actually, and the fix is there. It just needs to be pushed public. We are sorry you had to face this. > After changing that, I ran into this problem: > >

Re: [USRP-users] Determining if an X300 is connected via 10 GigE or 1 GigE

2017-08-07 Thread Nicolas Cuervo via USRP-users
Hi Nathan, we believe you are right. Nice catch! The line you suggested as culprit is already corrected and merged and will be pushed public in the near future. Thanks! -N On Mon, Aug 7, 2017 at 5:07 PM, Perelman, Nathan < nperel...@lgsinnovations.com> wrote: > Using the HG image I am seeing

Re: [USRP-users] Determining if an X300 is connected via 10 GigE or 1 GigE

2017-08-07 Thread Nicolas Cuervo via USRP-users
Hello Nathan, I think you are referring only to the values that are set in the creation of the "max_link_branch" of the property tree. In one version of the code (the one you highlighted at [1]) has only the branch called "link_max_rate" and this one is created and set to either the PCIE max rate

Re: [USRP-users] Fw: a few questions on rfnoc

2017-08-07 Thread Nicolas Cuervo via USRP-users
Hello Dario, We are creating a RFNoC block that inputs a continuous flow of data and > needs to output an irregular burst of variable length. > > I tried to research a bit but didn’t found a final answer on the following > questions: > >1. Packets to and from RFNoC blocks need to have a

Re: [USRP-users] [RFNoC] How to add chipscope to RFNoC project?

2017-10-04 Thread Nicolas Cuervo via USRP-users
Felipe, Hmmm, do you mind being more specific regarding the part where the synth fails? Copy/pasting the output you are getting would also be optimal. Trying my luck here: when the Vivado GUI pops up and you are able to save the project, be sure that you do NOT check the box that says "Import

Re: [USRP-users] Error in RFNoC grc with OOT module

2017-10-04 Thread Nicolas Cuervo via USRP-users
Hello Jose, this might be an indentation problem at the XML that is located at your_oot/grc/your_block.xml. Do you mind sharing with us that file? Also, I remember seeing this error in earlier versions of the tool, so it would be interesting to know if it still happens, and under what

Re: [USRP-users] [RFNoC] How to add chipscope to RFNoC project?

2017-10-05 Thread Nicolas Cuervo via USRP-users
Hello Felipe, Please keep the conversation on the mailing list, as other users could find the discussion helpful for their applications as well. We are aware of these critical warnings. Although not desired, they should not affect your application. -N On Thu, Oct 5, 2017 at 10:52 AM, Felipe

Re: [USRP-users] Error creating RFNoC FPGA image with OOT module

2017-10-03 Thread Nicolas Cuervo via USRP-users
Hello Jose, please try running the following: $ ./uhd_image_builder.py twochannelsiggen duc fft *-I /home/joseavila/Documents/gnuradio_source/rfnoc-siggen2ch/* -d x310 -t X310_RFNOC_HG -m 6 --fill-with-fifos which means pointing to the top OOT directory instead to directly the fpga-srcs

Re: [USRP-users] using pybombs to install different revs of uhd

2017-10-15 Thread Nicolas Cuervo via USRP-users
Hello Osvaldo, I normally do what you describe and I follow this procedure (If someone knows a better way *please* share!): 1. I set up my prefix with a name that describes the content, such as $ pybombs prefix init ~/foo -a devel 2. I only fetch the repository, without installing at first

Re: [USRP-users] additional Verilog file in OOT RFNoC block

2017-10-11 Thread Nicolas Cuervo via USRP-users
Hello Dixon, Daniel's suggestion works, but that would mean adding a hard-coded path into the fpga build system. It does the trick, but it is not recommended. The OOT module has its own Makefile.srcs that intends to contain all the HDL code that is required for the module. The procedure is the

Re: [USRP-users] RFNOC complex_multiplier not found

2017-10-11 Thread Nicolas Cuervo via USRP-users
Hello Kau-Uwe, You have to point your Makefile where the IP is located so that it can build it for simulation. You can base this on the Makefile for the FIR filter, for example [1], where the IP specific settings are introduced. In your specific use case, it should be something like:

Re: [USRP-users] Error building OOT RFNOC Module with dependencies

2017-09-28 Thread Nicolas Cuervo via USRP-users
Hello John, did you base the Makefile in your OOT siggen on the Makefile of the noc_block_siggen as well? Regards, - Nicolas On Thu, Sep 28, 2017 at 12:32 AM, Tom Bereknyei via USRP-users < usrp-users@lists.ettus.com> wrote: > John, will this be open source? We are also looking at modifying

Re: [USRP-users] Warning: Expected FPGA compatibility number 32, but got 20

2017-08-24 Thread Nicolas Cuervo via USRP-users
Hello Nauman, You will always download the suitable FPGA for every UHD version by using the "uhd_images_downloader.py" shipped within the repository. If you are getting this error from GNURadio even after using the images downloader, then it means that GNURadio might be compiled against a

Re: [USRP-users] continues streaming with rx_multi_samps

2017-08-21 Thread Nicolas Cuervo via USRP-users
Hello Snehasish, you can modify the example to get as many samples as you want, even if what you want is previously undefined. You might want to change the while loop condition in order to meet this [1] and add a stop signal (such as ctrl+c) with std::signal(SIGINT), which is used in other

Re: [USRP-users] problem installing uhd-fpga related to pyqt5

2017-08-28 Thread Nicolas Cuervo via USRP-users
Hi Dixon, it might be worth trying installing pyqt5 from source, as it seems not to be packaged for Ubuntu 14.04 -N On Mon, Aug 28, 2017 at 7:08 PM, Dixon, James L via USRP-users < usrp-users@lists.ettus.com> wrote: > Hi, > > I am installing gnuradio/rfnoc on a Ubuntu 14.04 machine using

Re: [USRP-users] UHD USRP device address specification

2017-10-05 Thread Nicolas Cuervo via USRP-users
Duixian, you can identify each device by its serial number, or by giving it a custom name as stated in the manual [1] Regards, - Nicolas [1] https://files.ettus.com/manual/page_identification.html#id_naming_set On Thu, Oct 5, 2017 at 8:59 PM, Duixian Liu via USRP-users <

Re: [USRP-users] Pybombs installation fails

2017-11-03 Thread Nicolas Cuervo via USRP-users
Hello Jade, Pyqt5 seems not to be packaged for ubuntu 14.04 for python2 so, in that case, you'd be better off compiling pyqt5 by source -N On Fri, Nov 3, 2017 at 4:29 PM, Jade Anderson via USRP-users < usrp-users@lists.ettus.com> wrote: > I tried following these directions several times. > >

Re: [USRP-users] Building FPGA image containing OOT blocks using Vivado

2017-10-21 Thread Nicolas Cuervo via USRP-users
Hello Luis Angel, However, when trying to create the same image from Vivado modifying the > rfnoc_ce_auto_inst_x300.v file by including my own block and adding the > dependent Verilog files to the design, even though I can run the > synthesis/implementation and generate a bit file, after loading

Re: [USRP-users] help with uhd_image_builder_gui.py

2017-10-30 Thread Nicolas Cuervo via USRP-users
Hello Snehasish, could you please elaborate what is the problem precisely? We know of a small issue regarding the -I argument but that has been already fixed. Could you please pull the latest changes from the rfnoc-devel branch at the FPGA repository and try again? Let us know if you are still

Re: [USRP-users] Fw: help with uhd_image_builder_gui.py

2017-10-31 Thread Nicolas Cuervo via USRP-users
Those issues have been fixed lately, so please pull the latest changes at fpga:rfnoc-devel and try again. Additionally, please point the image builder to the top OOT directory as follows: $./uhd_image_builder.py chanmux -I ~/OMessenger/Receivedfiles/ rfnoc-pfb-channelizer-master/ -d x310 -t

Re: [USRP-users] add new IP from vivado to usrp x310

2018-05-15 Thread Nicolas Cuervo via USRP-users
Hello Allouche, the "make.py" script was renamed to be the uhd_image_builder.py [1], which I assume is the one you are referring to when you mention the "uhd_usrp_builder.py". The fact that your IP is not being correctly picked up might be related to your makefiles, which you'd have to review

Re: [USRP-users] UHD installation

2018-05-07 Thread Nicolas Cuervo via USRP-users
All that you are seeing is part of the normal behavior. The warnings are fairly descriptive on telling you what is happening. As you did, you set the Udev rules as depicted in our manual [1]. Later, you see the thread priority and you are encouraged to go to the manual again, where you will find

Re: [USRP-users] rfnocmodtool template problem

2018-05-08 Thread Nicolas Cuervo via USRP-users
Hello Peter, thank you for noticing this. We will take care of this shortly. - Nicolas On Tue, May 8, 2018 at 10:57 AM, Peter Horvath via USRP-users < usrp-users@lists.ettus.com> wrote: > Hello, > > the clocking scheme has been recently changed, as of >

Re: [USRP-users] Adding IP to RFNoC-OOT

2018-05-20 Thread Nicolas Cuervo via USRP-users
Hello Matthias, thanks for the feedback. We are planning to add such file structure near in the future. Please have a look at this example [1] which you can adapt to your OOT module in order to add the IP. Keep in mind that rfnocmodtool as of now generates both the Makefile.srcs and the

Re: [USRP-users] Build E310_sg3.bit problem

2018-05-20 Thread Nicolas Cuervo via USRP-users
Hello Artyom, Unfortunately, this is something we are aware of and has to do with the high utilization that the DDCs and DUC blocks are taking. We are actively working on reducing the FPGA utilization of these blocks in order to make this build possible. Regards, - Nicolas On Sun, May 20, 2018

Re: [USRP-users] create vhdl code with rfnocmodtool and add exisiting vhdl code to new block

2018-05-29 Thread Nicolas Cuervo via USRP-users
Dear Ishai, I use the rfnocmodtool to work on the X310 USRP and I have 2 questions: > > 1. When I create a new block, can I define the code to be vhdl file > instead of Verilog file? > At this moment the tool does not have this option, but I see how this might result useful. I will upstream

Re: [USRP-users] Revert rfnoc-devel to older commit / update rfnoc-devel to rfnoc-maint HEAD

2018-04-29 Thread Nicolas Cuervo via USRP-users
Hello Andrew, I did a fresh install of the latest rfnoc-devel (using pybombs prefix init > ~/rfnoc -R rfnoc -a rfnoc) and RFNoC blocks do not work (such as FIR and Rx > Radio, possibly related to USRP-users mailer subject: Core dump with > UHD_3.11, X310, and LFTX). So I am trying to checkout and

Re: [USRP-users] Reading data from RF Channels and Spectrum Sensing module

2018-01-10 Thread Nicolas Cuervo via USRP-users
Dear Felipe, Are the MIMO PHY and the sensing module required to run simultaneously? If yes, then you could split the streams after receiving (if using RFNoC, you can use the RFNoC: Split Stream block) to divide the streams and process one of them while sending the other to the host. If

Re: [USRP-users] Running RFNoC examples on E310

2018-01-10 Thread Nicolas Cuervo via USRP-users
Hi Paul, Unfortunately, we are aware of this bug and we are following it in our internal bug tracker. I will come back to you as soon as we have a fix/workaround for it. We are sorry for the inconveniences here. Sincerely, -Nicolas On Tue, Jan 9, 2018 at 2:46 PM, Paul Sorensen via USRP-users <

Re: [USRP-users] uhd rfnoc-devel branch

2018-02-26 Thread Nicolas Cuervo via USRP-users
Hi Dmitry, RFNoC is supported fully only on top of the rfnoc-devel branch, so that is the branch you'd want to use for any custom development. We will merge fixes from master into rfnoc-devel really soon, but if you are having issues that are already solved in maint of master, I believe

Re: [USRP-users] Modifying the fpga code in B210

2017-12-22 Thread Nicolas Cuervo via USRP-users
Dear Mehtap, The FPGA part of this process is completely independent of GNURadio. In order to modify the FPGA code, you need a full ISE license from Xilinx. Depending on how many features you plan to introduce in the FPGA, you have to take into account the utilization that it would require (for

Re: [USRP-users] X3x0 Signal Delay Repeater @ 100 MSPS

2017-12-22 Thread Nicolas Cuervo via USRP-users
Hi Dave, there is a delay fifo module that you could pack in a custom FPGA image, but I think that you want to avoid re-synth. However, this rate might be too high to go around an FPGA modification. If you can

Re: [USRP-users] DDC Software (Linux/Ettus X300/GNU Radio: UHD)

2018-01-22 Thread Nicolas Cuervo via USRP-users
Dear Taylor, Please try to update your FPGA images by running the uhd_image_downloader to get the latest image that corresponds to the code base that you are running. Let us know if still face this issue after loading the latest version of the images. If you are using the X3X0 device, the

Re: [USRP-users] RFNoC polyphase filterbank

2018-02-27 Thread Nicolas Cuervo via USRP-users
Hello Kei, your email served as a reminder for the pending merge that contains a documentation update as well as some fixes on the channelizer, so I recommend you pull the latest changes before continuing using it. If that doesn't solve the issues that you are seeing, could you please elaborate

Re: [USRP-users] make noc_block_gain_tb error

2018-03-31 Thread Nicolas Cuervo via USRP-users
Hello Chen, what is the output of this command?: $ ls -l /bin/sh The commands "echo $0" and "ls -l /bin/sh" are not fundamentally interchangeable. "echo $0" will return the process $0, which, when run in a shell, will tell you the name of the shell. However, if you run this command inside a

Re: [USRP-users] e310 rfnoc error

2018-03-31 Thread Nicolas Cuervo via USRP-users
Hello Carry, a fix for this issue is still in the pipeline. As per your question on how to go to an older version, please try setting up your device by performing a cross-compilation by source, as explained in

Re: [USRP-users] customize processing of U and L messages

2018-04-03 Thread Nicolas Cuervo via USRP-users
Hello Cedric, This information is listed in the manual for error/problem troubleshooting) [1] The "D" is a dropped packet on reception, and shows up as an indication of a sequence error caused by an overflow on networked devices. [2] The "S" is a sequence error on transmission. The possible