On 03/09/2018 01:22 PM, Nick Foster wrote:
One thing that struck me: I don't think you should have to disable the
streamer to switch between cal and radio channels. Just for
experiment's sake, try leaving both channels active in the streamer.
You can pull samples from both channels in your
Hi Nick,
I can try this, but the reason I disable one or the other streamer is so that I
can sample at the full 50MHz. Running both streamers cuts the sample rate in
half and I am only using the cal channel to measure/correct the random LO phase
offset.
In this switching mode, the data always
One thing that struck me: I don't think you should have to disable the
streamer to switch between cal and radio channels. Just for experiment's
sake, try leaving both channels active in the streamer. You can pull
samples from both channels in your recv() command, and just use the channel
you're
Hey Nick,
No prob blew at all. The flag “no_reload_fpga” seems to work for that. The
bigger problem is that each time the fpga image is loaded on the e3xx, the
relative path delays between the RXA and RXB channels changes randomly as seen
by the sample group jumps in the image I originally
Sam,
Sorry I haven't gotten back -- it sounds like you're doing everything
right. The usual quick fixes probably don't apply here. I haven't had time
to look more in depth into it, or to try to replicate it on my own hardware.
Marcus is right -- the E3xx uses an idle image in order to reduce
On 03/09/2018 12:11 AM, Samuel Prager via USRP-users wrote:
Still looking for more info on this problem.
I have the exact same RfNoC block/software program running on an X300
and see no such jumps or otherwise unexpected behavior.
I have attempted to isolate this issue on the E312 by
t; clock cycle.
>
> Thanks,
>
> Sam
>
> From: Nick Foster [mailto:bistrom...@gmail.com]
> Sent: Tuesday, March 06, 2018 11:57 AM
> To: Prager, Samuel M (334E) <samuel.m.pra...@jpl.nasa.gov>
> Cc: usrp-users@lists.ettus.com
> Subject: Re: [USRP-users] E312 Loo
ilto:bistrom...@gmail.com]
Sent: Tuesday, March 06, 2018 11:57 AM
To: Prager, Samuel M (334E) <samuel.m.pra...@jpl.nasa.gov>
Cc: usrp-users@lists.ettus.com
Subject: Re: [USRP-users] E312 Loopback Path Delay Changes when FPGA image is
reloaded
Could you post your flowgraph or UHD program, or the
Could you post your flowgraph or UHD program, or the relevant excerpts? Are
the two RX channels being loaded simultaneously? Are you using timed
commands to start the RX and TX streams?
Nick
On Tue, Mar 6, 2018 at 11:52 AM Prager, Samuel M (334E) via USRP-users <
usrp-users@lists.ettus.com>
