Hi, I updated the link and network layer code this weekend. Regarding all the timing options I decided not to document them, this should be acceptable, since the defaults are god for most cases (99%). You will probably have to do some white-space cleanup (not much), but otherwise the code should be OK for release.
I also committed the dumps created with the sockit_owm Verilog master (FPGA + RTL + some C software). The file was used to test the overdrive mode code. GitHub, onewire branch (created from latest origin head): https://github.com/jeras/sigrok-dump In this version there are mostly documentation updates, but also announcements have been changed to shout less (using lower case letters). There was a bug fix for overdrive mode, and CRC checking was added to the network layer. I did not do any changes to the transport layer code. I added some code for the power signal, but it seems not to work properly, if the signal is not used (I do not have any waveforms with a separate power signal yet). I would like the value not to change from a default. So right now power signal changes are just propagated through the link and network layer to the transport layer, which should interpret them. Regards, Iztok Jeras On Fri, Aug 3, 2012 at 12:01 AM, Iztok Jeras <[email protected]> wrote: > Hi, > > The recoded link layer PD is now working. But I still have to clean up > the list of options (I added all protocol timing, although only some > are used). Overdrive support is now tested and works. There is no need > to merge the code now, unless you would like to make a release soon, > than I would say the code is unfinished but usable. > > Two annotation modes are now available, one with only the same data as > provided to the next protocol, one with extra timing information. The > decoder now checks if the master timing is according to the standard > and issues warnings if not. > > I attempted to remove the optional power signal, since the link layer > can not use it. Now I send power changes to the next decoder. It seems > the decoder does not work properly if only one signal is decoded, > incoming data samples were corrupted. > > I have questions regarding how is the GUI supposed to show decoder > annotations: > Should the annotations be short, not to waste space when waveforms are > zoomed out? > The annotation content is given to the put function as a list, what > would happen if multiple elements are present in the list? > > I would also like to know, if there are any plans for the next > features, before I start bothering you with all my ideas (I am really > excited about being part of this project): > - continuous sampling mode > - decoders written in C/C++ (speed would be needed for continuous mode) > - attaching multiple decoders to a single continuous stream (separate > decoders for UART Rx/Tx, ...) > > Regards, > Iztok Jeras ------------------------------------------------------------------------------ Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ _______________________________________________ sigrok-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/sigrok-devel
