Hi, The 1-Wire protocol decoder should be almost ready now, this week I will add some more dumps and test the decoder with them. The code is ready for a first review, next issues remain: 1. Annotations: Currently there are 3 annotation options, for three protocol layers (link, network, transport), but this separation does not work well with sigrok, since the display of annotations should overlap. I will probably update this after running through some more example dumps. 2. Overdrive support: Overdrive support was not tested yet, although all the needed code should be present. 3. Transport layer: The transport layer is very device specific although there are some common aspects. For now I decided not to decode this protocol layer and to only display transported data bytes. I think this is good enough for the first release. 4. White space: I have my own preferences regarding white space, I prefer long lines with vertically aligned keywords. Could you please apply the preferred formatting to the source while merging it?
sigrok GIT is here (master branch): https://github.com/jeras/sigrok sigrok-dump GIT is here (master branch): https://github.com/jeras/sigrok-dump The Verilog dump generators, and Tektronix text dumps with the converter were deleted from GIT, but remain in the history. Regards, Iztok Jeras On Sun, Jun 24, 2012 at 2:19 PM, Iztok Jeras <[email protected]> wrote: > Hi, > > I found the issue with missing annotations in my decoder. I should be > able to remove the debug code now. > > Regards, > Iztok Jeras > > On Sat, Jun 23, 2012 at 1:37 PM, Iztok Jeras <[email protected]> wrote: >> Hi, >> >> I now have a few 1-Wire dumps ready, but the whole protocol (lower >> layers) is not yet covered, overdrive mode is missing. It will be hard >> to cover all the higher level protocol elements, I should be able to >> add some more dumps, once I understand the higher protocol layers >> better. I should be able to add more dumps in the next month, but if >> for some reason I postpone it too far, please just pick them from: >> https://github.com/jeras/sigrok-dump/tree/master/onewire/owfs >> >> I should finally have 3 days of time for implementing the decoder. >> There is is something that is not clear to me, how should I write the >> command line to get the output from a decoder to the console or into a >> file. Currently I use the highest verbosity. >> >> Also it would help if README in the dump directories would also >> explain (example command line) hot to use the decoder (if available) >> on each dump. >> >> Regards, >> Iztok Jeras >> >> On Wed, May 23, 2012 at 1:50 AM, Bert Vermeulen <[email protected]> wrote: >>> On 05/22/2012 11:09 PM, Iztok Jeras wrote: >>> >>>> $ sigrok-cli -i onewire.bin -I binary -p 1=OWR -o onewire.sr >>>> The problem with the output file is that it is missing a sample rate. >>>> How could I specify it? >>>> https://github.com/jeras/sigrok-dump/tree/master/onewire/verilog >>> >>> As Uwe said, the binary input module needs to get some options for that, so >>> imports can be a bit more flexible. As a temporary workaround, just edit the >>> "metadata" file inside the .sr file (it's actually just a zip file). It's >>> text, take a look at what's in some of the .sr files to see how you can >>> specify samplerate. >>> >>> It all works fine without a specified samplerate as well, of course. >>> >>>> >>>> Protocol decoder: >>>> >>>> I started writing the protocol decoder. >>>> https://github.com/jeras/sigrok/tree/master/libsigrokdecode/decoders/onewire >>>> But I have issues debugging it. Currently I run configure, "make" and >>>> "sudo make install". I was able to run the decoder, but the given >>>> error did not help much. How do you debug this decoders (while >>>> developing them)? I would like to see the Python error trace, if >>>> possible, and avoid installing. >>> >>> Note you can set the environment variable SIGROKDECODE_DIR to e.g. your >>> development directory -- it will take precedence over any other module path. >>> That way you can avoid doing "make install" all the time. >>> >>> Currently we're not doing a full traceback when an exception is raised in a >>> python PD. The file/linenumber that it does show is *cough* not necessarily >>> right, either. Definitely something that needs fixing :-) >>> >>> There is no debug path for PDs back into libsigrokdecode and from there to >>> the frontend. I'm not so sure that it's worth doing... I just use print() >>> and watch stdout. >>> >>> >>> -- >>> Bert Vermeulen [email protected] email/xmpp >>> >>> ------------------------------------------------------------------------------ >>> Live Security Virtual Conference >>> Exclusive live event will cover all the ways today's security and >>> threat landscape has changed and how IT managers can respond. Discussions >>> will include endpoint security, mobile security and the latest in malware >>> threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ >>> _______________________________________________ >>> sigrok-devel mailing list >>> [email protected] >>> https://lists.sourceforge.net/lists/listinfo/sigrok-devel ------------------------------------------------------------------------------ Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ _______________________________________________ sigrok-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/sigrok-devel
