On 04/23/2013 03:21 PM, Iztok Jeras wrote: > Hi, > > I am offering my help for writing RTL, bench code in Verilog. I have > experience writing code which is portable across various vendors > (Altera, Xilinx, Lattice should also work). I should be able to read > the Wiki on the weekend. As far as I was looking into various FPGA > based logic analyzers, the main issue is not the FPGA code but the > various devices used to interface to USB. I also have some spare FPGA > boards, but not really logic analyzers specific board, so I am not > sure if they fit.
Iztok, That's great to hear. As a way to get started with a portable source base, would porting the demon core be a good start? It's what we have already, after all. What would be the best way to structure a repository with different vendor targets, in your opinion? -- Bert Vermeulen [email protected] email/xmpp ------------------------------------------------------------------------------ Try New Relic Now & We'll Send You this Cool Shirt New Relic is the only SaaS-based application performance monitoring service that delivers powerful full stack analytics. Optimize and monitor your browser, app, & servers with just a few lines of code. Try New Relic and get this awesome Nerd Life shirt! http://p.sf.net/sfu/newrelic_d2d_apr _______________________________________________ sigrok-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/sigrok-devel
