Hi,
pulled Daniel's lwla-hackery branch from git and compiled without incident.
I tried 4 cases:
1. The same USB2 port I had previously had success with using master branch.
2. The USB2 port with a 4-port hub.
3. The USB3 port that originally gave me trouble.
4. The USB3 port with 4-port hub.
In all cases it worked flawlessly and found the LWLA1034 every time. I also
checked sample acquisition with treiggering in Pulseview and this went
well.
Great work! :)
/Magnus
Below is a log:
magnus@m6600:~/src/sigrok/lwla_hack/libsigrok$ sigrok-cli -d sysclk-lwla
--show -l 5
sr: [00:00.000001] log: libsigrok loglevel set to 5.
sr: [00:00.000109] backend: libsigrok 0.4.0-git-f1e9c5f/2:0:0 (rt:
0.4.0-git-f1e9c5f/2:0:0).
sr: [00:00.000167] backend: Libs: glib 2.40.2 (rt: 2.40.2/4002:0), libzip
0.10.1, libserialport 0.1.1/0:0:0 (rt: 0.1.1/0:0:0), libusb-1.0
1.0.17.10830, libftdi 0.20.
sr: [00:00.000205] backend: Host: x86_64-unknown-linux-gnu, little-endian.
sr: [00:00.000239] backend: SCPI backends: TCP, RPC, serial, USBTMC.
sr: [00:00.000300] backend: Sanity-checking all drivers.
sr: [00:00.000372] backend: Sanity-checking all input modules.
sr: [00:00.000416] backend: Sanity-checking all output modules.
sr: [00:00.000444] backend: Sanity-checking all transform modules.
srd: libsigrokdecode loglevel set to 5.
sr: [00:00.006661] hwdriver: Initializing driver 'sysclk-lwla'.
Driver functions:
Logic analyzer
sr: [00:00.006834] hwdriver: sr_config_list(): key 40000 (scan_options) sdi
(nil) cg NULL -> [uint32 20000]
Scan options:
conn
sr: [00:00.006920] hwdriver: Initializing driver 'sysclk-lwla'.
sr: [00:00.007040] hwdriver: Scan of 'sysclk-lwla' found 1 devices.
sysclk-lwla - SysClk LWLA1034 with 34 channels: CH1 CH2 CH3 CH4 CH5 CH6 CH7
CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 CH16 CH17 CH18 CH19 CH20 CH21 CH22
CH23 CH24 CH25 CH26 CH27 CH28 CH29 CH30 CH31 CH32 CH33 CH34
sr: [00:00.007195] usb: Trying to open USB device 4.7.
sr: [00:00.007299] usb: Opened USB device (VID:PID = 2961:6689, bus.address
= 4.7).
sr: [00:05.180864] resource: Opened
'/home/magnus/.local/share/sigrok-firmware/sysclk-lwla1034-int.rbf'.
sr: [00:05.181145] sysclk-lwla: Downloading FPGA bitstream
'sysclk-lwla1034-int.rbf'.
sr: [00:06.075259] sysclk-lwla: FPGA bitstream download of 81464 bytes done.
Supported configuration options:
sr: [00:06.108400] hwdriver: sr_config_get(): key 50001 (limit_samples) sdi
0x2185c20 cg NULL -> uint64 0
limit_samples: 0 (current)
sr: [00:06.108463] hwdriver: sr_config_get(): key 50000 (limit_time) sdi
0x2185c20 cg NULL -> uint64 0
limit_time: 0 (current)
sr: [00:06.108617] hwdriver: sr_config_list(): key 30000 (samplerate) sdi
0x2185c20 cg NULL -> {'samplerates': <[uint64 125000000, 100000000,
50000000, 20000000, 10000000, 5000000, 2000000, 1000000, 500000, 200000,
100000, 50000, 20000, 10000, 5000, 2000, 1000, 500, 200, 100]>}
samplerate - supported samplerates:
125 MHz
100 MHz
50 MHz
20 MHz
10 MHz
5 MHz
2 MHz
1 MHz
500 kHz
200 kHz
100 kHz
50 kHz
20 kHz
10 kHz
5 kHz
2 kHz
1 kHz
500 Hz
200 Hz
100 Hz
sr: [00:06.108801] hwdriver: sr_config_list(): key 30014 (triggermatch) sdi
0x2185c20 cg NULL -> [1, 2, 3, 4]
Supported triggers: 0 1 r f
sr: [00:06.108835] hwdriver: sr_config_get(): key 30024 (external_clock)
sdi 0x2185c20 cg NULL -> false
external_clock: on, off (current)
sr: [00:06.108867] hwdriver: sr_config_get(): key 30041 (clock_edge) sdi
0x2185c20 cg NULL -> 'r'
sr: [00:06.108900] hwdriver: sr_config_list(): key 30041 (clock_edge) sdi
0x2185c20 cg NULL -> ['r', 'f']
clock_edge: r (current), f
sr: [00:06.108947] hwdriver: sr_config_get(): key 30007 (triggersource) sdi
0x2185c20 cg NULL -> 'CH'
sr: [00:06.108975] hwdriver: sr_config_list(): key 30007 (triggersource)
sdi 0x2185c20 cg NULL -> ['CH', 'TRG']
triggersource: CH (current), TRG
sr: [00:06.109012] hwdriver: sr_config_get(): key 30004 (triggerslope) sdi
0x2185c20 cg NULL -> 'r'
sr: [00:06.109039] hwdriver: sr_config_list(): key 30004 (triggerslope) sdi
0x2185c20 cg NULL -> ['r', 'f']
triggerslope: r (current), f
sr: [00:06.109107] resource: Opened
'/home/magnus/.local/share/sigrok-firmware/sysclk-lwla1034-off.rbf'.
sr: [00:06.109229] sysclk-lwla: Downloading FPGA bitstream
'sysclk-lwla1034-off.rbf'.
sr: [00:06.618519] sysclk-lwla: FPGA bitstream download of 48525 bytes done.
sr: [00:06.648771] usb: Closed USB device 4.7.
sr: [00:06.648863] sysclk-lwla: Device already closed.
sr: [00:06.648875] sysclk-lwla: Device context cleared.
magnus@m6600:~/src/sigrok/lwla_hack/libsigrok$
On Sat, Nov 28, 2015 at 12:05 PM, Daniel Elstner <daniel.ki...@gmail.com>
wrote:
> Hi Magnus,
>
> On Fri, 2015-11-20 at 03:14 +0100, Magnus Lundmark wrote:
> > I just got my Sysclk LWLA1034 and was looking forward to using it. I
> > pullled all the sigrok code from git and it compiled without problem.
> > Unfortunately I can't connect, see listing below.
> [...]
>
> if you can spare the time, it would be cool if you could test your
> LWLA1034 on the USB 3 port (where it did not work) with this branch:
>
> https://github.com/danielkitta/libsigrok/tree/lwla-hackery
>
> Whether it works or not, a spew-level log created with this code would
> be greatly appreciated.
>
> Cheers and thanks,
> --Daniel
>
>
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