I registerd in this mailing list for the only purpose to express my
interess (i'm new and not an active developer.. just a lurker)
> 1. New packet type which would carry a number of bits for each sample
> 2. Code for VCD import/export
>
> There is already a vcd inporter/exporter.. it doesn't work really well and
does not support vectors
(i saw some workaround discussed in the "[sigrok-devel] VCD input
improvements, vector support (RFC)
<https://sourceforge.net/p/sigrok/mailman/message/35766952/> " but did not
get very far)
The workaround is to create a single channel for every bit in the vector,
and use the parallel protocol decoder for the grouping part.
If someday Sigrok will have good support for VCD import/export, I think it
will be a very valuable tool for the fpga/vlsi programmer/designer.
I could try to dust my C and see what I can do... but unfortunately I don't
have much time nor the basic knowledge of the Sigrok code-base.
------------------------------------------------------------------------------
Check out the vibrant tech community on one of the world's most
engaging tech sites, Slashdot.org! http://sdm.link/slashdot
_______________________________________________
sigrok-devel mailing list
sigrok-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/sigrok-devel
