Hello,

Thanks for your message.

Concerning your first question: yes, all the messages exchanged through this 
list are in one of those archives. For technical reasons
we decided to split them into two separate archives (the old and the new 
archive).

Regarding your second question: I don't think you need to implement anything to 
have a NUCA simulator. NUCA systems have
been already implemented (actually, almost all simulators we use in Flexus are 
NUCA simulators). 
The ones you listed bellow ( flexus-4.0/simulators/CMP.L2SharedNUCA.Inorder and 
 flexus-4.0/simulators/CMP.L2SharedNUCA.OoO)
are examples of such architectures with a shared and tiled L2 cache. So, things 
have already been implemented, there's no need to 
reimplement it.

However, if you are interested to know more details of the implementations, you 
can look at the source code and find some useful comments there.
If you are examining the source code, it's a good idea to look at the code of 
individual components included in the simulator, not the simulator directory 
itself.  
You might also want to check the getting started guide on our website. Besides 
that and the Simflex publications, we don't maintain any further documentation.

Also, keep in mind that the current version of Flexus works only with Simics 3. 
Whatever you try to do with Simics 4 highly likely will not work.
We are planning to move to Simics 4 soon.

Regards,
Djordje

________________________________________
From: el06041 [[email protected]]
Sent: Saturday, March 19, 2011 9:57 PM
To: [email protected]
Subject: NUCA Cache implementation in SimFlex 4

 Hello,

 I am currently working on NUCA cache implementation and I am new to
 SimFlex. First of all, I would like to ask whether the complete list of
 archive mails is the one found in the following links:

 http://www.mail-archive.com/[email protected] (current)
 http://www.mail-archive.com/[email protected] (old)

 Or if I am missing anything.


 I am trying to figure out how can I implement NUCA caches in SimFlex
 4.0 (which will be built on Simics 4.0). That is, individual L2 cache
 slices wired together and probably attached to different CPU cores.

 I have searched in archive mails for similar questions and have only
 found the following relevant threads:

 * http://www.mail-archive.com/[email protected]/msg00243.html
 * http://www.mail-archive.com/[email protected]/msg00247.html

 Though they are based on SimFlex 3, and models in SimFlex 4 could be
 different. I have read the available documentation
 (http://parsa.epfl.ch/simflex/doc.html), though I haven't figured out
 what models should I alter.

 Moreover, I have been trying to find documentation for the L2 NUCA
 caches that come with the Flexus codebase
 (http://parsa.epfl.ch/simflex/software/Flexus-4.0.0.tar.gz), namely
 flexus-4.0/simulators/CMP.L2SharedNUCA.Inorder and
 flexus-4.0/simulators/CMP.L2SharedNUCA.OoO, but without success.


 Thank you in advance and I am at your disposal for any further
 information.

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