Hi Henrik, Henrik Brix Andersen wrote: > Hi Soren, > > On Apr 2, 2011, at 17:29, Soren Kristensen wrote: >> The Lattice FPGA is part of CPU control and power manangement. > > I am confused by the above statement. Is the FPGA available for > custom, user-defined functionality or is it pre-programmed with > functionality required by the board (CPU control and power > management), and thus "only" providing 16 bit GPIO on the 24 pins > header?
The Lattice FPGA is only for CPU and Power Management. The Xilinx XC3S50A is user programable. Best Regards, Soren Kristensen CEO & Chief Engineer Soekris Engineering, Inc. _______________________________________________ Soekris-tech mailing list [email protected] http://lists.soekris.com/mailman/listinfo/soekris-tech
