On Sat, Apr 02, 2011 at 08:29:10AM -0700, Soren Kristensen wrote:
> The user programble FPGA is a Xilinx XC3S50A, connected to the systems 
> medium speed LPC bus. A custom option would also be a pin compatible 
> XC2S200A.

Soren,

Can the FPGA act as a bus master on the LPC bus?

Dave

-- 
David Young             OJC Technologies
[email protected]      Urbana, IL * (217) 344-0444 x24
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