Nowhere do I see it saying that a DDS can not have good phase noise
characteristics. In fact, the opposite is true - a DDS will normally have
lower phase noise than a PLL. 

Not efficient? In what way? A DDS is a single chip solution, so you can't
mean real estate. Power consumption is quite reasonable these days, so I
don't suppose you mean that. A DDS produces smaller tuning steps than you
are likely to achieve with a PLL, so that's not what you meant.

If you're going to be scared by all the words describing DDS in the HB, I
suppose you better toss out PLL's. After all, they have damping factors,
fractional N dividers, lock range, etc. 

In the end, a DDS is quite a fine VFO for applications that require small
tuning steps or the lowest possible phase noise. The SFDR is the weak spot,
yet oddly your post didn't mention that.


Chuck

-----Original Message-----
From: [email protected] [mailto:[EMAIL PROTECTED] On
Behalf Of [EMAIL PROTECTED]
Sent: Saturday, June 10, 2006 2:52 PM
To: [email protected]
Cc: [EMAIL PROTECTED]
Subject: Re: [soft_radio] Re: A/D Idea - New proposal for PLL to replace DDS

DDS Notes from Chp. 16, ARRL HB 2005

Summary of this will show that the DDS is a polluted method of signal
generation!

It might be interesting but it surely is not efficient.  
Too many processes and things to over come here!
So argue amongst yourselves. As you read this, count all of the problems and
technical difficulties this method is plagued with!
Then vote!

Note that there is no such thing in this article as good DDS phase noise
characteristics!  Very little appears to be good once you begin reading
this!

<CLIP>





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