I have finished a preliminary schematic for my UHF-SDR. It will use the Si570(LVDS or PECL) to feed a pair of 4 GHZ PECL flip-flops to generate I and Q LO signals for a pair of Minicircuits DBM's. It will cover from 1.8 MHz to 700 MHz(except a few holes the Si570 doesn't cover) with a power output of 100+ mW. Line in and Line out connections to a PC sound card are utilized as in the Softrocks. A 1.7dB noise figure receive pre-amp is also included. If interested please look over the schematic and the operaton document and pass on any comments or concerns. I have not yet started the PCB layout. I like to try and get the schematic as right as possible first. The UHF-SDR documention is available from my "Under Development" page or directly at <http://wb6dhw.com/UHF-SDR/UHF_SDR.zip>
Dave - WB6DHW <http://wb6dhw.com>
