Module Name:    src
Committed By:   matt
Date:           Tue Dec 27 01:56:33 UTC 2011

Modified Files:
        src/sys/arch/mips/include [matt-nb5-mips64]: cache.h cache_mipsNN.h
            cache_r4k.h mips_param.h pmap.h proc.h vmparam.h

Log Message:
Make these play nice with modules.


To generate a diff of this commit:
cvs rdiff -u -r1.9.96.5 -r1.9.96.6 src/sys/arch/mips/include/cache.h
cvs rdiff -u -r1.4 -r1.4.126.1 src/sys/arch/mips/include/cache_mipsNN.h
cvs rdiff -u -r1.11.96.1 -r1.11.96.2 src/sys/arch/mips/include/cache_r4k.h
cvs rdiff -u -r1.23.78.9 -r1.23.78.10 src/sys/arch/mips/include/mips_param.h
cvs rdiff -u -r1.54.26.20 -r1.54.26.21 src/sys/arch/mips/include/pmap.h
cvs rdiff -u -r1.21.36.10 -r1.21.36.11 src/sys/arch/mips/include/proc.h
cvs rdiff -u -r1.41.28.23 -r1.41.28.24 src/sys/arch/mips/include/vmparam.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/include/cache.h
diff -u src/sys/arch/mips/include/cache.h:1.9.96.5 src/sys/arch/mips/include/cache.h:1.9.96.6
--- src/sys/arch/mips/include/cache.h:1.9.96.5	Fri Dec 23 18:49:02 2011
+++ src/sys/arch/mips/include/cache.h	Tue Dec 27 01:56:32 2011
@@ -138,9 +138,13 @@ struct mips_cache_ops {
 	void	(*mco_pdcache_wb_range)(vaddr_t, vsize_t);
 
 	/* These are called only by the (mipsNN) icache functions. */
-	void	(*mco_intern_pdcache_wbinv_all)(void);
+	void	(*mco_intern_icache_sync_range_index)(vaddr_t, vsize_t);
+	void	(*mco_intern_icache_sync_range)(vaddr_t, vsize_t);
+	void	(*mco_intern_pdcache_sync_all)(void);
+	void	(*mco_intern_pdcache_sync_range_index)(vaddr_t, vsize_t);
+	void	(*mco_intern_pdcache_sync_range)(vaddr_t, vsize_t);
+	/* This is used internally by the (mipsNN) pdcache functions. */
 	void	(*mco_intern_pdcache_wbinv_range_index)(vaddr_t, vsize_t);
-	void	(*mco_intern_pdcache_wb_range)(vaddr_t, vsize_t);
 
 	void	(*mco_sdcache_wbinv_all)(void);
 	void	(*mco_sdcache_wbinv_range)(vaddr_t, vsize_t);
@@ -149,9 +153,12 @@ struct mips_cache_ops {
 	void	(*mco_sdcache_wb_range)(vaddr_t, vsize_t);
 
 	/* These are called only by the (mipsNN) icache functions. */
-	void	(*mco_intern_sdcache_wbinv_all)(void);
+	void	(*mco_intern_sdcache_sync_all)(void);
+	void	(*mco_intern_sdcache_sync_range_index)(vaddr_t, vsize_t);
+	void	(*mco_intern_sdcache_sync_range)(vaddr_t, vsize_t);
+
+	/* This is used internally by the (mipsNN) sdcache functions. */
 	void	(*mco_intern_sdcache_wbinv_range_index)(vaddr_t, vsize_t);
-	void	(*mco_intern_sdcache_wb_range)(vaddr_t, vsize_t);
 };
 
 extern struct mips_cache_ops mips_cache_ops;
@@ -290,14 +297,26 @@ do {									\
  * Private D-cache functions only called from (currently only the
  * mipsNN) I-cache functions.
  */
-#define	mips_intern_dcache_wbinv_all()					\
-	__mco_noargs(intern_, dcache_wbinv_all)
+#define	mips_intern_dcache_sync_all()					\
+	__mco_noargs(intern_, dcache_sync_all)
+
+#define	mips_intern_dcache_sync_range_index(v, s)			\
+	__mco_2args(intern_, dcache_sync_range_index, (v), (s))
+
+#define	mips_intern_dcache_sync_range(v, s)				\
+	__mco_2args(intern_, dcache_sync_range, (v), (s))
+
+#define	mips_intern_pdcache_wbinv_range_index(v, s)			\
+	(*mips_cache_ops.mco_intern_pdcache_wbinv_range_index)((v), (s))
+
+#define	mips_intern_sdcache_wbinv_range_index(v, s)			\
+	(*mips_cache_ops.mco_intern_sdcache_wbinv_range_index)((v), (s))
 
-#define	mips_intern_dcache_wbinv_range_index(v, s)			\
-	__mco_2args(intern_, dcache_wbinv_range_index, (v), (s))
+#define	mips_intern_icache_sync_range(v, s)				\
+	(*mips_cache_ops.mco_intern_icache_sync_range)((v), (s))
 
-#define	mips_intern_dcache_wb_range(v, s)				\
-	__mco_2args(intern_, dcache_wb_range, (v), (s))
+#define	mips_intern_icache_sync_range_index(v, s)			\
+	(*mips_cache_ops.mco_intern_icache_sync_range_index)((v), (s))
 
 void	mips_config_cache(void);
 void	mips_dcache_compute_align(void);

Index: src/sys/arch/mips/include/cache_mipsNN.h
diff -u src/sys/arch/mips/include/cache_mipsNN.h:1.4 src/sys/arch/mips/include/cache_mipsNN.h:1.4.126.1
--- src/sys/arch/mips/include/cache_mipsNN.h:1.4	Mon Feb 17 11:35:02 2003
+++ src/sys/arch/mips/include/cache_mipsNN.h	Tue Dec 27 01:56:33 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: cache_mipsNN.h,v 1.4 2003/02/17 11:35:02 simonb Exp $	*/
+/*	$NetBSD: cache_mipsNN.h,v 1.4.126.1 2011/12/27 01:56:33 matt Exp $	*/
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -35,21 +35,19 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#ifndef _MIPS_CACHE_MIPSNN_H_
+#define _MIPS_CACHE_MIPSNN_H_
+
 void	mipsNN_cache_init(uint32_t, uint32_t);
 
-void	mipsNN_icache_sync_all_16(void);
-void	mipsNN_icache_sync_all_32(void);
-void	mipsNN_icache_sync_range_16(vaddr_t, vsize_t);
-void	mipsNN_icache_sync_range_32(vaddr_t, vsize_t);
-void	mipsNN_icache_sync_range_index_16(vaddr_t, vsize_t);
-void	mipsNN_icache_sync_range_index_32(vaddr_t, vsize_t);
-void	mipsNN_pdcache_wbinv_all_16(void);
-void	mipsNN_pdcache_wbinv_all_32(void);
-void	mipsNN_pdcache_wbinv_range_16(vaddr_t, vsize_t);
-void	mipsNN_pdcache_wbinv_range_32(vaddr_t, vsize_t);
-void	mipsNN_pdcache_wbinv_range_index_16(vaddr_t, vsize_t);
-void	mipsNN_pdcache_wbinv_range_index_32(vaddr_t, vsize_t);
-void	mipsNN_pdcache_inv_range_16(vaddr_t, vsize_t);
-void	mipsNN_pdcache_inv_range_32(vaddr_t, vsize_t);
-void	mipsNN_pdcache_wb_range_16(vaddr_t, vsize_t);
-void	mipsNN_pdcache_wb_range_32(vaddr_t, vsize_t);
+void	mipsNN_picache_sync_all(void);
+void	mipsNN_picache_sync_range(vaddr_t, vsize_t);
+void	mipsNN_picache_sync_range_index(vaddr_t, vsize_t);
+
+void	mipsNN_pdcache_wbinv_all(void);
+void	mipsNN_pdcache_wbinv_range_index(vaddr_t, vsize_t);
+
+void	mipsNN_sdcache_wbinv_all(void);
+void	mipsNN_sdcache_wbinv_range_index(vaddr_t, vsize_t);
+
+#endif /* _MIPS_CACHE_MIPSNN_H_ */

Index: src/sys/arch/mips/include/cache_r4k.h
diff -u src/sys/arch/mips/include/cache_r4k.h:1.11.96.1 src/sys/arch/mips/include/cache_r4k.h:1.11.96.2
--- src/sys/arch/mips/include/cache_r4k.h:1.11.96.1	Sat Dec 24 09:51:51 2011
+++ src/sys/arch/mips/include/cache_r4k.h	Tue Dec 27 01:56:33 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: cache_r4k.h,v 1.11.96.1 2011/12/24 09:51:51 matt Exp $	*/
+/*	$NetBSD: cache_r4k.h,v 1.11.96.2 2011/12/27 01:56:33 matt Exp $	*/
 
 /*
  * Copyright 2001 Wasabi Systems, Inc.
@@ -335,4 +335,22 @@ void	r4k_sdcache_wbinv_range_index_gener
 void	r4k_sdcache_inv_range_generic(vaddr_t, vsize_t);
 void	r4k_sdcache_wb_range_generic(vaddr_t, vsize_t);
 
+/* cache_r4k_pcache16.S */
+
+void	cache_r4k_icache_index_inv_16(vaddr_t, vsize_t);
+void	cache_r4k_icache_hit_inv_16(vaddr_t, vsize_t);
+void	cache_r4k_pdcache_index_wb_inv_16(vaddr_t, vsize_t);
+void	cache_r4k_pdcache_hit_inv_16(vaddr_t, vsize_t);
+void	cache_r4k_pdcache_hit_wb_inv_16(vaddr_t, vsize_t);
+void	cache_r4k_pdcache_hit_wb_16(vaddr_t, vsize_t);
+
+/* cache_r4k_pcache32.S */
+
+void	cache_r4k_icache_index_inv_32(vaddr_t, vsize_t);
+void	cache_r4k_icache_hit_inv_32(vaddr_t, vsize_t);
+void	cache_r4k_pdcache_index_wb_inv_32(vaddr_t, vsize_t);
+void	cache_r4k_pdcache_hit_inv_32(vaddr_t, vsize_t);
+void	cache_r4k_pdcache_hit_wb_inv_32(vaddr_t, vsize_t);
+void	cache_r4k_pdcache_hit_wb_32(vaddr_t, vsize_t);
+
 #endif /* !_LOCORE */

Index: src/sys/arch/mips/include/mips_param.h
diff -u src/sys/arch/mips/include/mips_param.h:1.23.78.9 src/sys/arch/mips/include/mips_param.h:1.23.78.10
--- src/sys/arch/mips/include/mips_param.h:1.23.78.9	Fri Dec 23 18:54:50 2011
+++ src/sys/arch/mips/include/mips_param.h	Tue Dec 27 01:56:33 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: mips_param.h,v 1.23.78.9 2011/12/23 18:54:50 matt Exp $	*/
+/*	$NetBSD: mips_param.h,v 1.23.78.10 2011/12/27 01:56:33 matt Exp $	*/
 
 #ifdef _KERNEL
 #include <machine/cpu.h>
@@ -39,6 +39,7 @@
 #define	SSIZE		1		/* initial stack size/NBPG */
 #define	SINCR		1		/* increment of stack/NBPG */
 
+#if defined(_KERNEL) && !defined(_MODULE)
 #ifdef PAGE_SHIFT
 #if MIPS_PAGE_SHIFT != PAGE_SHIFT
 #error MIPS_PAGE_SHIFT != PAGE_SHIFT
@@ -48,6 +49,7 @@
 #else
 #define	PAGE_SHIFT	12
 #endif
+#endif /* _KERNEL && !_MODULE */
 
 #if PAGE_SHIFT & 1
 #define	UPAGES		1		/* pages of u-area */

Index: src/sys/arch/mips/include/pmap.h
diff -u src/sys/arch/mips/include/pmap.h:1.54.26.20 src/sys/arch/mips/include/pmap.h:1.54.26.21
--- src/sys/arch/mips/include/pmap.h:1.54.26.20	Fri Dec 23 22:31:30 2011
+++ src/sys/arch/mips/include/pmap.h	Tue Dec 27 01:56:33 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.h,v 1.54.26.20 2011/12/23 22:31:30 matt Exp $	*/
+/*	$NetBSD: pmap.h,v 1.54.26.21 2011/12/27 01:56:33 matt Exp $	*/
 
 /*
  * Copyright (c) 1992, 1993
@@ -81,6 +81,7 @@
 #include <mips/cpuregs.h>	/* for KSEG0 below */
 //#include <mips/pte.h>
 
+#if !defined(_MODULE)
 /*
  * The user address space is 2Gb (0x0 - 0x80000000).
  * User programs are laid out in memory as follows:
@@ -120,6 +121,12 @@ union segtab {
 #endif
 	union pt_entry	*seg_tab[PMAP_SEGTABSIZE];
 };
+#else
+/*
+ * Modules don't need to know this.
+ */
+union segtab;
+#endif
 
 /*
  * Structure defining an tlb entry data set.

Index: src/sys/arch/mips/include/proc.h
diff -u src/sys/arch/mips/include/proc.h:1.21.36.10 src/sys/arch/mips/include/proc.h:1.21.36.11
--- src/sys/arch/mips/include/proc.h:1.21.36.10	Fri Apr 29 08:26:22 2011
+++ src/sys/arch/mips/include/proc.h	Tue Dec 27 01:56:33 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: proc.h,v 1.21.36.10 2011/04/29 08:26:22 matt Exp $	*/
+/*	$NetBSD: proc.h,v 1.21.36.11 2011/12/27 01:56:33 matt Exp $	*/
 
 /*
  * Copyright (c) 1992, 1993
@@ -56,7 +56,7 @@ struct mdlwp {
 	vaddr_t	md_ss_addr;		/* single step address for ptrace */
 	int	md_ss_instr;		/* single step instruction for ptrace */
 	volatile int md_astpending;	/* AST pending on return to userland */
-	int	md_upte[USPACE/4096];	/* ptes for mapping u page */
+	int	md_upte[2];		/* ptes for mapping u page */
 };
 
 struct mdproc {

Index: src/sys/arch/mips/include/vmparam.h
diff -u src/sys/arch/mips/include/vmparam.h:1.41.28.23 src/sys/arch/mips/include/vmparam.h:1.41.28.24
--- src/sys/arch/mips/include/vmparam.h:1.41.28.23	Fri Dec 23 18:54:50 2011
+++ src/sys/arch/mips/include/vmparam.h	Tue Dec 27 01:56:33 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: vmparam.h,v 1.41.28.23 2011/12/23 18:54:50 matt Exp $	*/
+/*	$NetBSD: vmparam.h,v 1.41.28.24 2011/12/27 01:56:33 matt Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -54,6 +54,7 @@
  * We normally use a 4K page but may use 8K, 16K, or 32K on MIPS systems.
  * Override PAGE_* definitions to compile-time constants.
  */
+#if defined(_KERNEL_OPT) && defined(_KERNEL) && !defined(_MODULE)
 #ifdef MIPS_PAGE_SHIFT
 #define	PAGE_SHIFT	MIPS_PAGE_SHIFT
 #else
@@ -61,6 +62,10 @@
 #endif
 #define	PAGE_SIZE	(1 << PAGE_SHIFT)
 #define	PAGE_MASK	(PAGE_SIZE - 1)
+#else
+#define	MIN_PAGE_SIZE	4096
+#define	MAX_PAGE_SIZE	32768
+#endif /* _KERNEL_OPT && _KERNEL && !_MODULE */
 
 /*
  * USRSTACK is the top (end) of the user stack.

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