Module Name: src
Committed By: jakllsch
Date: Wed Nov 18 17:01:39 UTC 2015
Modified Files:
src/sys/arch/arm/nvidia: tegra_intr.h
Log Message:
Complete the interrupt definitions list from the Tertiary Interrupt
Controller range of the Tegra K1.
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/nvidia/tegra_intr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/nvidia/tegra_intr.h
diff -u src/sys/arch/arm/nvidia/tegra_intr.h:1.9 src/sys/arch/arm/nvidia/tegra_intr.h:1.10
--- src/sys/arch/arm/nvidia/tegra_intr.h:1.9 Thu Oct 22 23:30:15 2015
+++ src/sys/arch/arm/nvidia/tegra_intr.h Wed Nov 18 17:01:39 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_intr.h,v 1.9 2015/10/22 23:30:15 jmcneill Exp $ */
+/* $NetBSD: tegra_intr.h,v 1.10 2015/11/18 17:01:39 jakllsch Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcne...@invisible.ca>
@@ -55,14 +55,33 @@
#define TEGRA_INTR_UARTC TEGRA_INTR(46)
#define TEGRA_INTR_I2C5 TEGRA_INTR(53)
#define TEGRA_INTR_I2C6 TEGRA_INTR(63)
+#define TEGRA_INTR_HOST1X_SYNCPT_COP TEGRA_INTR(64)
+#define TEGRA_INTR_HOST1X_SYNCPT_CPU TEGRA_INTR(65)
+#define TEGRA_INTR_HOST1X_GEN_COP TEGRA_INTR(66)
+#define TEGRA_INTR_HOST1X_GEN_CPU TEGRA_INTR(67)
+#define TEGRA_INTR_MSENC TEGRA_INTR(68)
+#define TEGRA_INTR_VI TEGRA_INTR(69)
+#define TEGRA_INTR_ISPB TEGRA_INTR(70)
+#define TEGRA_INTR_ISP TEGRA_INTR(71)
+#define TEGRA_INTR_VIC TEGRA_INTR(72)
#define TEGRA_INTR_DISPLAYA TEGRA_INTR(73)
#define TEGRA_INTR_DISPLAYB TEGRA_INTR(74)
#define TEGRA_INTR_HDMI TEGRA_INTR(75)
#define TEGRA_INTR_SOR TEGRA_INTR(76)
+#define TEGRA_INTR_MC TEGRA_INTR(77)
+#define TEGRA_INTR_EMC TEGRA_INTR(78)
+#define TEGRA_INTR_SPI6 TEGRA_INTR(79)
#define TEGRA_INTR_HDA TEGRA_INTR(81)
+#define TEGRA_INTR_SPI2 TEGRA_INTR(82)
+#define TEGRA_INTR_SPI3 TEGRA_INTR(83)
#define TEGRA_INTR_I2C2 TEGRA_INTR(84)
+#define TEGRA_INTR_PMU_EXT TEGRA_INTR(86)
+#define TEGRA_INTR_GPIO6 TEGRA_INTR(87)
+#define TEGRA_INTR_GPIO7 TEGRA_INTR(89)
#define TEGRA_INTR_UARTD TEGRA_INTR(90)
#define TEGRA_INTR_I2C3 TEGRA_INTR(92)
+#define TEGRA_INTR_SW_INTR TEGRA_INTR(95)
+#define TEGRA_INTR_SNOR TEGRA_INTR(96)
#define TEGRA_INTR_USB3 TEGRA_INTR(97)
#define TEGRA_INTR_PCIE_INT TEGRA_INTR(98)
#define TEGRA_INTR_PCIE_MSI TEGRA_INTR(99)
