Module Name: src
Committed By: msaitoh
Date: Wed Apr 27 08:47:03 UTC 2016
Modified Files:
src/sys/arch/x86/include: cacheinfo.h
Log Message:
Add new desc 0x64 and 0xc4.
To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/x86/include/cacheinfo.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/include/cacheinfo.h
diff -u src/sys/arch/x86/include/cacheinfo.h:1.21 src/sys/arch/x86/include/cacheinfo.h:1.22
--- src/sys/arch/x86/include/cacheinfo.h:1.21 Fri Jan 8 02:25:15 2016
+++ src/sys/arch/x86/include/cacheinfo.h Wed Apr 27 08:47:03 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: cacheinfo.h,v 1.21 2016/01/08 02:25:15 msaitoh Exp $ */
+/* $NetBSD: cacheinfo.h,v 1.22 2016/04/27 08:47:03 msaitoh Exp $ */
#ifndef _X86_CACHEINFO_H_
#define _X86_CACHEINFO_H_
@@ -234,6 +234,7 @@ __CI_TBL(CAI_DTLB, 0x5c, 0xff, 64,
__CI_TBL(CAI_DTLB, 0x5d, 0xff, 64, 4 * 1024, "4K/4M: 256 entries"),\
__CI_TBL(CAI_ITLB, 0x61, 0xff, 48, 4 * 1024, NULL), \
__CI_TBL(CAI_L1_1GBDTLB,0x63, 4, 4,1024*1024 * 1024, NULL), \
+__CI_TBL(CAI_DTLB, 0x64, 4,512, 4 * 1024, NULL), \
__CI_TBL(CAI_ITLB, 0x6a, 8, 64, 4 * 1024, NULL), \
__CI_TBL(CAI_DTLB, 0x6b, 8,256, 4 * 1024, NULL), \
__CI_TBL(CAI_L2_DTLB2, 0x6c, 8,128, 0, "2M/4M: 128 entries"),\
@@ -252,6 +253,7 @@ __CI_TBL(CAI_DTLB2, 0xc0, 4, 8,
__CI_TBL(CAI_L2_STLB2, 0xc1, 8,1024, 4 * 1024, "4K/2M: 1024 entries"), \
__CI_TBL(CAI_DTLB2, 0xc2, 4, 16, 4 * 1024, "4K/2M: 16 entries"), \
__CI_TBL(CAI_L2_STLB, 0xc3, 6,1536, 4 * 1024, NULL), \
+__CI_TBL(CAI_DTLB2, 0xc4, 4, 32, 4 * 1024, "2M/4M: 32 entries"), \
__CI_TBL(CAI_L2_STLB, 0xca, 4,512, 4 * 1024, NULL), \
__CI_TBL(CAI_ICACHE, 0x06, 4, 8 * 1024, 32, NULL), \
__CI_TBL(CAI_ICACHE, 0x08, 4, 16 * 1024, 32, NULL), \
