On Tue, 11 Dec 2012 10:00:16 +0800, chao bi <chao...@intel.com> wrote:
> > > +static void dump_trailer(const struct device *dev, char *buf, int len,
> > > int sz)
> > > +{
> > > + int tlen1 = (len < sz ? len : sz);
> > > + int tlen2 = ((len - sz) > sz) ? sz : (len - sz);
> > > + unsigned char *p;
> > > + static char msg[MAX_SPI_TRANSFER_SIZE];
> >
> > Is this size a limitation of the hardware, of of the driver?
>
> I think this size is attributed to the DMA controller's maximum block size.
> On Medfield platform, the DMA controller used by SSP SPI has defined its
> maximum
> block size and word width, so SPI transfer size should not exceed the maximum
> size that
> DMA could transfer in one block.
Typically what a driver should do here is to split up the transfer into
multiple DMA operations. I won't nack the driver over this issue, but
the driver should not have a maximum transfer size limitation in this
way.
g.
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