Attila,

> Just an update:
> I finally had some time to do a little testing with vdbench, and it seems 
> that when slice0 begins at cyl 8 (on my setup!) I get the best numbers.
> Interestingly the numbers are not too different* , but aligned to cyl 8, I 
> get the higher values at align=0000 and align=4096.

Can you post your vdbench results from offset=0000 to offset=4096, as it would 
be interesting to see all reported columns for a single run.

- Jim

> 
> * I mean definitely not a 5 times difference, as shown on Henk's page. I get 
> around 10% difference both in IOPS and transfer rate at most. I think this 
> might be a controller speed issue (ICH7, 975x chipset - maybe oldish :)) Next 
> week or so I'll get a PCIe LSI SAS 3Gb/s controller, and going to test with 
> that too - we'll see...
> 
> Thanks very much for your help!
> -- 
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