Hi, TLDR:
1. When did PCs stop using ISA Timer 1 to trigger DRAM refresh? 2. Are any PCs that rely on ISA Timer 1 for DRAM refresh capable of running OpenBSD as it exists today? Long version: I have a history question for the list. Maybe one of you hardware jocks or history buffs can help me out. So, in the IBM AT/PC and, later, all ISA-compatible systems, the ISA timer (an i8253 or compatible clock) has 3 independent 16-bit counters. The first, Timer 0, is available for use by the operating system. The second, Timer 1, was traditionally programmed by the BIOS at a particular rate to trigger DRAM refresh. The third, Timer 2, is usually wired up to the PC speaker and may be used by the operating system to produce primitive sound effects. I found a more detailed explanation of what Timer 1 actually did in this book: https://ia601901.us.archive.org/12/items/ISA_System_Architecture/ISA_System_Architecture.pdf > ISA System Architecture Third Edition (1995) > Chapter 24: ISA Timers > p. 471 > > Refresh Timer (Timer 1) > > The refresh timer, or timer 1, is a programmable frequency source. The > same 1.19318MHz signal (used by timer 0) provides the refresh timer's > clock input. The programmer specifies a divisor to be divided into > the input clock to yield the desired output frequency. During the > POST, a divisor of 0012h, or a decimal 18, is written to the refresh > timer at I/O address 0041h. The input clock frequency of 1.19318MHz is > therefore divided by 18 to yield an output frequency of 66287.77Hz, > or a pulse every 15.09 microseconds. > > This is the refresh request signal that triggers the DRAM refresh > logic to become bus master once every 15.09 microseconds so it can > refresh another row in DRAM memory throughout the system. For more > information on DRAM refresh, refer to the chapter entitled "RAM > Memory: Theory of Operation." This is fascinating. But obviously this is no longer true in modern PCs. The ISA bus is still emulated in modern PCs, and DRAM in modern PCs still needs refreshing, but they don't rely on the emulated ISA timer to make it happen. So, when did PCs stop using ISA Timer 1 for DRAM refresh? The IBM AT/PC was built around the 80286. Was it with the advent of the 80386 (1985)? The 80486 (1989)? P5 (1993)? P6 (1995)? Later? Was the change independent of a particular processor generation jump? Like, maybe a technological advance in the state of the art in DRAM obsoleted the use of ISA Timer 1 for refresh? And then, more importantly, are any machines that rely on ISA Timer 1 for DRAM refresh actually capable of running OpenBSD as it exists today? -Scott
