On Fri, Aug 26, 2022 at 10:21:32PM -0500, Scott Cheloha wrote: > I noticed that on non-LAPIC systems we program channel 0 in periodic > mode with an initial count of 11932 to effect a 100hz clock interrupt. > And then we also use that same channel to count time, but because we > aren't using the full 16-bit range we need to do all this checking and > incrementing to handle premature overflow to make it appear as though > the full counter is being used. > > And I had this whimsical idea: gee, wouldn't it be so much easier to > use channel 0 for clock interrupts and a different channel for > counting time? > > But then I started reading and saw that channel 1 had a dedicated > purpose in the bad old days. > > So I was left wondering when channel 1 stopped performing that task, > and whether those systems (a) predate the APIC and (b) can even run > OpenBSD at all.
Attempting to use counter 1 would be more trouble than it is worth. > > What is the minimum chipset? 486? 586? You've been doing some > sprucing, so I am unsure. I know the 80386 is out. We have a minimum architecture level, not chipset. Our toolchain defaults to 586. This ensures that 64-bit atomic builtins are available. 586 includes cr4, cpuid, rdtsc, rdmsr etc As to when the APIC was introduced vol 3b of Intel's x86 SDM has: "The Advanced Programmable Interrupt Controller (APIC), referred to in this book as the local APIC, was introduced into the IA-32 processors with the Pentium processor (beginning with the 735/90 and 815/100 models) and is included in the Pentium 4, Intel Xeon, and P6 family processors. The features and functions of the local APIC are derived from the Intel 82489DX external APIC, which was used with the Intel486 and early Pentium processors. Additional refinements of the local APIC architecture were incorporated in the Pentium 4 and Intel Xeon processors." > > > The PCH datasheets from 100 series and later only document counter 0 > > and counter 2. > > > > 9 series and earlier datasheet has > > "The PCH contains three counters that have fixed uses." > > 100 series and later > > "The PCH contains two counters that have fixed uses." > > What does the PCH 9 series and earlier pertain to? What socket would > have it? 9 series is H97/Z97/X99 https://ark.intel.com/content/www/us/en/ark/products/series/98458/intel-9-series-chipsets.html https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/9-series-chipset-pch-datasheet.pdf
