Hi Ulrich, Thanks for the tip. And, also many thanks to Magnus for introducing me to the concept of Time-to-Digital conversion. It is a brilliant and yet so simple technique. (Until yesterday, I blissfully believed that a fast clocking counter was one's best bet.)
Accordingly, I did a bit of research on the topic: Google took me to a lot of interesting sites (as Tom van Baak noted). However, I found only one company, Acam (which is the one you also pointed out), that sell these things inside an IC. I also read the article posted earlier by Tom van Baak (Thanks Tom! This is indeed a very comprehensive article.) It turns out that you can implement a very elegant linear interpolator using a digital delay line inside a FPGA. It is called the Vernier technique. From the article I understand that resolutions of between 10s and 100s of picoseconds have been achieved for various designs. Has anyone else used this Vernier technique with delay lines? I seems pretty neat to me. It means my hardware doesn't need to change. A software update will do the trick :) Regards, Stephan. PS: Thanks Ulrich for the link to your M12+T results. I was looking all over the place for these results for a long time now. _______________________________________________ time-nuts mailing list [email protected] https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
