Hal Murray wrote: >> So use a gate array to implement a multichannel time stamp device. >> > > FPGA development boards are readily available and some people consider the > price within range. > > Would digital inputs be good enough? Suppose you feed several 10 MHz signals > into a FPGA and program it so each input signal drives a counter. Ignoring > implementation details like synchronization, is that good enough to be > interesting? I'm assuming you have a PC that grabs all the counters every N > ticks/seconds/hours/whatever. > > Note that there is another clock involved. It's the one driving the FPGA or > PC. > > How much would it help if there was an A/D on each input channel and the FPGA > could capture a dozen samples on each signal around the time that it latches > a copy the counters? > > > Hal
Use a mixer for each input frequency source together with an common offset source not an FPGA if you really want high resolution. However you will need to use low phase noise distribution amplifiers with crosstalk and reverse isolation better than 120dB. Feeding several different clocks into the same FPGA is somewhat counterproductive as they will all interact to produce rather high jitter. Using an A/D can be somewhat futile unless it has noise and resolution of an ideal 24bit (or more) ADC. If you want to use an ADC then its best to use a technique employed by the 5120. However a well designed dual/multiple mixer system will outperform this instrument. A well designed zero crossing detector can easily exceed the resolution of virtually any available ADC. Bruce _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
