Stanley,

Sometimes I get tunnel vision by looking for 
easy answers in "big box" solutions.

Your 1GHz clock solution may be a simpler
approach for 1ns resolution & provide a
straightforward result. The ECL part you've
selected seems to simplify interfacing with
its synchronous enables.

Perhaps interpolation could be used to 
enhance resolution if 1ns isn't adequate.

Pete Rawson 

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