> Warren > > Another potential issue is crosstalk between flipflops in the same > package, in particular between the 2 clock signals. > Such effects will not be evident when using a single clock source to > evaluate the system noise. > Using fully differential logic such as ECL will reduce such coupling at > the expense on increased power dissipation and relatively high logic > level tempcos. > Dithering one or both of the clocks may help. > > Bruce > > The effect of cross coupling between the clocks will be more significant as the phase shift between the clocks approaches 0 or 180 degrees (for 50% duty cycle clocks). Dividing the input frequencies by 4 to produce quadrature phase outputs wont help. You would need to actually use a pair of phase shifted clocks from one of the input sources feeding separate dividers so that clock transitions of the 2 clocks within a chip do not coincide. Either a selected length of coax or a quadrature hybrid would suffice for producing the 2 clocks with a near 90 degree phase shift.
Bruce _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
