Bill Hawkins wrote: > Bruce Griffiths wrote: > >> Poul-Henning Kamp wrote: >> >>> In message <[email protected]>, Kasper Pedersen writes: >>> >>> >>>> Bruce Griffiths wrote: >>>> The charge redistribution adc would have been good, true, but there >>>> wasn't one in my junkbox. >>>> > > If it wouldn't be too much trouble, could you change the Subject line? > This is not about happy days at all. > > Bill Hawkins > > > To account for charge injection effects from the ADC multiplexer and the residual voltage on the ADC sampling capacitor as well as the inevitable gain mismatch between the 2 channels a more comprehensive model of the TAC's + ADC will be required. To a first order approximation such effects will be small and linear a model something like
t2-t1 = G*(V2-V1) + e*V1 may suffice. Where V2 is the voltage across the second TAC ramp cap as measured by the ADC V1 is the voltage across the second TAC ramp cap as measured by the ADC This equation will need to be elaborated slightly when the initial voltages across the TAC capacitors (during reset) are also measured. The exact form of the correction will depend on the order in which the voltage measurements are made. Ideally the 2 synchroniser circuits would be include the capability of producing calibration signals of known duration to facilitate calibration of the gains of the 2 TACs whenever required. Bruce _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
