Bill Janssen wrote: > I want to construct a divide by ten or a divide by 100 frequency > divider. This is to take my 10 MHz. from my > Rubidium to 1 MHz. or 100 KHz. > I could use the spare 74xx90 chips ( which I have) but I would like to > make some thing useful for future > uses. What would be a "through the hole" type of IC that would have less > jitter than a 74xx90. I CAN do > surface mount if I have to. > > Thanks > Bill K7NOM > > _______________________________________________ > time-nuts mailing list -- [email protected] > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > Bill
If you want as low a jitter as is possible with a given logic family don't use a ripple carry (between the divide by 5 and divide by 2 sections) device like a 74XX90. unless you use an external flipflop to resynchronise the divided output to the 10MHz clock. CMOS logic families like the 74AC can have a cycle to cycle jitter for an inverter clock buffer as low as 1ps. (Even HCMOS inverters can have a cycle to cycle jitter of around 4ps). However achieving this requires a suitable clock shaper and a low phase noise source. Bruce _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
