Group,
If Dave P's current divider design has design jitter specs approaching SOTA vvs cost levels whilst the TAPR board is (perhaps) slightly inferior in performance, where does that leave Tom's venerable 1pps PIC divider in the pecking order ? Will all designs be subjected to a "back-to-back" run-off sometime soon ? This would save us mere mortals without the means of verifying actual jitter performance much angst and gnashing of teeth ! Good work chaps. Kit VK2LL -----Original Message----- From: [email protected] [mailto:[email protected]] On Behalf Of Tom Van Baak Sent: 19 March 2010 21:33 To: Discussion of precise time and frequency measurement Subject: Re: [time-nuts] Schematic and BOM David, Did you see the TAPR TADD board(s) before you started your divider project? I'm curious what features (or missing features) led you to your board design. Thanks, /tvb _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
