I'd love to see the results of some well designed and controlled jitter
measurements. I did a bunch on the TADD-2 and a single-channel
prototype, but they weren't as rigorous as this group deserves. (The
short version is that the tests pretty consistently show jitter standard
deviation of less than 20ps or so, but how much of that is
instrumentation versus the divider itself is unknown.)
One suggestion is to check the tempco as the folklore is that the
cascaded-chip designs can have significant drift over temperature.
Finally, if the hardware is available, a suggestion for the methodology
is to use a pair of same-design dividers fed from a common 5 MHz or 10
MHz source, but with unequal coax length to introduce a few nanoseconds
delay between them. Then use one on the start channel, the other on the
stop, and divide the results by sqrt(2).
John
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