FPGA time interval counter? With an analog interpolator? No? Then, at most, you will get a nS resolution. I have a 2.5nS resolution TIC with 100MHz clock using four phases from the Xilinx DCM in a Spartan3.
On Tue, Nov 29, 2011 at 1:23 AM, Michael Malloy <[email protected]> wrote: > Ok great thank you very much I will go get some 74HC14 today if possible > and replace them, I will also upload a schematic, and a smaller picture > > i tried running on a bread board with a 4000 CMOS CD40106 > the output looked like a square wave through a diode to LP filter not > good, like spikes > not what I want I suspect something to do with the 4000 CMOS circuitry?? > 4000 CMOS is good because you can do cool stuff with it as it will > work up to 15 volts or maybe more > great for hybrid analog and digital designs, especially for audio > applications, you can use 4000 CMOS > to build very good VCO, but low frequencies.. if you would like a > circuit for that > I can give you this also if interested? I have about 6 different > design for VCO using hybrid design like this? > > > off topic I am also building a VHDL/FPGA time interval counter, I will > be happy to share the code and the schematics if your interested > the FPGA is great fast, and I can do all the pre scaling and down > converting within the hardware. concurrently as you know > downside FPGA are expensive for what they are. > > the TI logic design guidelines said specifically that 4000 cmos is > good for low frequencies sub 1MHZ > for anything above different logic families. > > I will get back to you all later with schematic and pictures > thanks again for all your help. > > let me know if you want schematics for my other designs > > also forgive my ignorance and don't judge me but what is a "line-receiver" > never heard of this is this jargon, I am australian, or is this just > my ignorance > remember I am a newbie to time and frequency but I am fascinated > > > On Mon, Nov 28, 2011 at 10:23 PM, ehydra <[email protected]> wrote: > > A 50K picture should fit the problem. > > > > I successfully use 4000 series for amplifying a 5MHz PSK signal. The > HEF4x > > is a little faster than HCFx. > > > > Or use a line-receiver if the oscillators is not buffered internal. > > > > - Henry > > > > > > Michael Malloy schrieb: > >> > >> its a shame i cannot post the picture i took is there any way to be > >> able to send my oscilloscope picture its 800k thats the problem > > > > -- > > ehydra.dyndns.info > > > > _______________________________________________ > > time-nuts mailing list -- [email protected] > > To unsubscribe, go to > > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > > and follow the instructions there. > > > > > > -- > #include <sig.h> > /* ================ */ > Michael > /*How crazy does it get on the moon, when theres a full Earth?*/ > > _______________________________________________ > time-nuts mailing list -- [email protected] > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
