Is it possible to sketch the circuit? I can SPICE it.
Symmetry limiting is the holy grail and it is questionable if a discrete
design is way better than one of the chips.
Here is another limiter circuit (by Chris Trask):
http://ehydra.dyndns.info/NG/LTspice/Negative%20Impedance%20LO%20Driver.pdf
- Henry
David schrieb:
What kind of performance would you expect in this application? Low
jitter? 50 ohm output? TTL or better signal levels? Fast rise and
fall times? Duty cycle correction?
After reading your post I was thinking about how to go about it and
ended up with an 8 transistor discrete design using a differential
amplifier input and pair of current mirror transconductance amplifiers
for the output. I have been looking into designing a pulse generator
for oscilloscope calibration and have an interest in GPSDOs so maybe I
will prototype this as well just to see what kind of performance a
bunch of 2N3904 and 2N4401 jelly bean transistors can provide.
On Thu, 29 Dec 2011 21:14:30 -0800, John Beale <[email protected]>
wrote:
In case it's useful... there are many ways to get a square wave out from a
sine wave in, but one straightforward way is with a comparator. Some work
better than others. The slow ones won't work at all at 10 MHz, and the very
fast comparators (MAX999, ADCMP600, LT1116 etc.) are more expensive, and
perhaps harder to work with. I tried a MAX9013 in SO-8 package and it works
well for the job. You can see my schematic, circuit and scope plots at the
bottom of this page:
--
ehydra.dyndns.info
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