Use LT Spice. It has a convenient schematic capture, and you can analyze it directly.
Didier KO4BB Sent from my BlackBerry Wireless thingy while I do other things... -----Original Message----- From: David <[email protected]> Sender: [email protected] Date: Mon, 02 Jan 2012 11:28:10 To: Discussion of precise time and frequency measurement<[email protected]> Reply-To: Discussion of precise time and frequency measurement <[email protected]> Subject: Re: [time-nuts] FE-5680A clock shaping (sine -> square wave) I could analyze it on SPICE but I suspect the real world construction parasitics will be what limits the performance. I just sketched it out in my notebook but I will see if I can post it somewhere. Is there a quick and dirty online schematic capture site? It is not that complicated being a differential amplifier driving complementary pair of emitter followers, a pair of voltage clamps, and then a pair of complementary current mirrors configured as transconductance amplifiers. When you say symmetry limiting do you mean to prevent second harmonic distortion like for driving a mixer? I was thinking of this more for driving a single ended transmission line cleanly while maximizing the edge rates and minimizing jitter. Duty cycle correction could be added pretty easily. The circuit you linked is going to have a little problem since both the 2N5769 and the 2N5770 are NPN and the circuit requires a pair of PNPs. Other than that it looks perfect for driving a high level mixer. On Mon, 02 Jan 2012 15:52:18 +0100, ehydra <[email protected]> wrote: >Is it possible to sketch the circuit? I can SPICE it. > >Symmetry limiting is the holy grail and it is questionable if a discrete >design is way better than one of the chips. > > >Here is another limiter circuit (by Chris Trask): >http://ehydra.dyndns.info/NG/LTspice/Negative%20Impedance%20LO%20Driver.pdf > > >- Henry > > >David schrieb: >> What kind of performance would you expect in this application? Low >> jitter? 50 ohm output? TTL or better signal levels? Fast rise and >> fall times? Duty cycle correction? >> >> After reading your post I was thinking about how to go about it and >> ended up with an 8 transistor discrete design using a differential >> amplifier input and pair of current mirror transconductance amplifiers >> for the output. I have been looking into designing a pulse generator >> for oscilloscope calibration and have an interest in GPSDOs so maybe I >> will prototype this as well just to see what kind of performance a >> bunch of 2N3904 and 2N4401 jelly bean transistors can provide. >> >> On Thu, 29 Dec 2011 21:14:30 -0800, John Beale <[email protected]> >> wrote: >> >>> In case it's useful... there are many ways to get a square wave out from a >>> sine wave in, but one straightforward way is with a comparator. Some work >>> better than others. The slow ones won't work at all at 10 MHz, and the very >>> fast comparators (MAX999, ADCMP600, LT1116 etc.) are more expensive, and >>> perhaps harder to work with. I tried a MAX9013 in SO-8 package and it works >>> well for the job. You can see my schematic, circuit and scope plots at the >>> bottom of this page: _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
