On Thu, Apr 5, 2012 at 11:11 AM, Hal Murray <[email protected]> wrote: > > My guess on the original question is that keeping the CPU busy puts junk into > the cache so the whole interrupt processing path takes every possible cache > miss.
Cache misses are nanosecond level events not tens of microseconds. If you see the interrupt hander it is clear that it fits entirely in one cache line. However it could be unlucky seattle a foundry and then two line would need to be loaded. It's a two level cache so a "miss" only means going to the secondary which is still very fast. I think recovering from sleep mode is the most likely explanation. We STILL don't know the exact make and model CPU so we don't know if sleep can be disabled. Chris Albertson Redondo Beach, California _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
