Yes Robert, the 59.4444 kHz is effectively added to the 10.0000 MHz, but
not by direct mixing. The 1 or 10 MHz reference drives a D-flop flop,
which samples the 10.059444 MHz, leaving the difference frequency
59.4444 kHz, the feedback signal in the second PLL. The direct way to do
it would be with very accurate, full I-Q mixing to get only one
sideband, but that gets very complicated. The current scheme is simpler,
and works quite well. The main pieces are decade dividers (74HC390),
dividers for 107 and 180 (74HC393 or 74HC4040 each), a D-FF (74HC74), a
CD4046B for each PLL, and gates for the oscillators (74HC04 or 74HC86).
Using an '86 allows for getting push-pull output with equal prop delays,
in case I need to run it through some differential LAN LPF modules that
I have on hand.
It took some effort to come up with workable numbers that all fit within
the constraints, but I'm sure there are many other undiscovered sets
that would do it. I like your single-PLL 300/953 idea - it may be doable
within 74HC speeds, and I think ceramic resonators are available at 32.0
MHz. The PLO would like the much higher reference frequency - I think
any n from 8 to 150 or so will work.
Scaling that by two to 600/953 , making 15.88333 MHz, with a 16 MHz
resonator (I have some), fc=16.6666 kHz, and n=76 should work too. It
would be OK with 74HC for sure, and it would just fit through the LPFs,
which cut off at 17 MHz. The comparison frequency fc is getting kind of
low, but may be OK, depending on how much near-in phase noise I have to
contend with. That was one of the reasons I opted for the two-stage
approach - to avoid having a very small fc, or dealing with fractional-n
ripple.
I will investigate these possibilities and put together some
experiments. I can directly drive the microwave section from an external
synthesizer to try various reference frequencies.
Ed
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