Hi All of the MCU based 1588 interfaces I have seen allow you to "get at" the internal 1588 stamping clock. You can stuff your pps in there and compare it directly to the stamps it puts on the incoming and outgoing packets. If you are on an MCU, the 1588 clock can easily be the same as your CPU clock (or at least derived from the same source). Stamping with the 1588 counter in that case is no different than stamping with the cpu clock.
Doing the same thing on a pc is a bit more complex. If you can get at the stamping inputs and outputs, it's another layer, but still doable. Bob Get the free running 1588 counter 1 pps output to agree with your local clock output. On Jun 7, 2013, at 12:16 AM, Chris Albertson <[email protected]> wrote: > Network time stamping is a different issue. You are thinking of time > transfer over a network. What the above is about is capture the pulse per > second from a GPS. We actually do NOT want to time stamp the PPS. We > want to capture the computer's internal clock so that it can be compared to > the PPS. The purpose is to adjust that internal clock. > > Then one this is none is some set of stratum 1 NTP server, then you can > transfer the time over Ethernet. > > > On Thu, Jun 6, 2013 at 5:48 PM, Bob Camp <[email protected]> wrote: > >> Hi >> >> 1588 compatible network cards are capable of time stamping everything that >> goes in and out. They are pretty common these days both as stand alone >> cards and as peripherals on MCU's. There's no real need to do hardware, >> just come up with drivers (and all the other software goop) to make them >> work with NTP. More or less the same work you would have had to do once the >> FPGA was done and debugged. >> >> Bob >> >> On Jun 6, 2013, at 8:32 PM, Ralph Smith <[email protected]> wrote: >> >>> On Jun 6, 2013, at 1:59 AM, Chris Albertson <[email protected]> >> wrote: >>> >>>> Yes, that is exactly what I meant by "remove the temperature issue" >> that >>>> means using a clock derived from a laboratory standard like GPS >> disciplined >>>> OCXO or a rubidium oscillator. Once you do this the next bottle next is >>>> the uncertainty in the interrupt latency and the granularity of the >> clock >>>> that is being sampled. So practically you are limited to about >> microsecond >>>> level performance. >>> >>> The Net4501 is capable of about 1/8 microsecond performance, the >> limiting factor here is clock granularity. >>> >>>> I think to get better than that you need to eliminate the interrupt and >>>> have some kind of deterministic hardware where the PPS directly samples >> the >>>> counter. Perhaps hosting NTP on a soft CPU inside an FPGA, then you >> could >>>> implement the PPS interrupt in gates rather then in software. I've not >>>> read of anyone doing this yet. >>> >>> If you look at PHK's code in FreeBSD this is what is done. The PPS >> signal gates the timer, so no interrupt is involved in the time stamp >> precision. But yes, it would be interesting to do something on a FPGA. >> Unfortunately I wouldn't be able to get to anything like that myself in >> this lifetime. >>> >>> Ralph >>> _______________________________________________ >>> time-nuts mailing list -- [email protected] >>> To unsubscribe, go to >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >> >> _______________________________________________ >> time-nuts mailing list -- [email protected] >> To unsubscribe, go to >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> > > > > -- > > Chris Albertson > Redondo Beach, California > _______________________________________________ > time-nuts mailing list -- [email protected] > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
