Hi


Rise and fall times are not the thing to worry about on the gates. Look at the 
propagation delay. That's what will vary. 


On Sep 27, 2013, at 2:11 AM, Tom Minnis <[email protected]> wrote:

> Thanks for all your thoughts on the subject.  Let me play back what I have 
> learned and how it may apply to my challenge.  One of my first applications 
> is to use a 10MHz output to phaselock a VCXO master clock in a radio 
> transceiver.  The VCXO is the Christek CVHD-950 which has a noise floor of 
> -164dBc and is -86dBc at 10Hz.  The source I want to use is the Jackson Labs 
> GPSTCXO which has a noise floor of -155dBc and is -73dBc at 1Hz and 103dBc at 
> 10Hz.  i did a quick survey of the phase noise specs on various Jackson 
> products that claim to be ultra low phase noise and found similar numbers.  
> One was -100dBc at 1Hz but only -145dBc at 100KHz.  Another was down -90dBc 
> at 1Hz and -160dBc at 100KHz.  It would appear that even the best parts I 
> could find quickly would not merit the fancy analog gizmo and that a good 
> stiff logic buffer would work.  Next I went to IDT to find the best logic 
> buffer I could find.

The phase noise out of a TBolt is roughly -165 to -170 floor and -155 to -160 
at 100 Hz. (plus spurs of course)

>  I am looking at the IDT 74FCT38072 2 channel clock driver for PPS.  It can 
> drive about 50mA if needed with 1nS rise and fall times.  The one I am 
> looking at for 10MHz is the ICS553 4 channel clock driver.  This one is good 
> for 25mA drive and they actually give a typical output impedance spec of 20 
> Ohms.  With a 3.3V supply, it has 1nS rise and fall times and a little faster 
> with a 5V supply, 0.7nS and 35mA drive.  

Rise and fall times are not the thing to worry about on the gates. Look at the 
propagation delay. That's what will vary. If a 3 ns delay varies 1% (30 ps) 
over 1,000 seconds that's going to give you 3x10^-14 in your ADEV. Are your 
sources good to 3x10^-14 at 1,000 seconds? If not, don't worry about it. 

 
> To make a sine wave should I use one of the 4 ports on the 4 port driver to 
> input to the filter or should I try to hook the filter input directly to the 
> clock driver input?
> Are there tried and true 10MHz filter circuits or is that a non issue?  After 
> the filter would come the video amp set up for a 50 Ohm drive and into a 
> splitter.  That sound simple enough.  What am I missing?

Simply use a three element Tee on the output of a logic gate. Run one per 
output. Don't split for multiple output. That way you will have much better 
isolation (which very much does matter). 

Bob

> 
> Tom
> 
> On 9/26/2013 3:05 PM, Bob Camp wrote:
>> Hi
>> 
>> How clean is your clock source? If you have something that is -150 dbc at 1 
>> Hz, then you probably need some fancy analog gizmos. If you can make do with 
>> "only" -110 to -120 dbc/Hz at 1 Hz, then properly driven LVC CMOS will do 
>> just fine. That's true for a square or a sine output. Since you pretty much 
>> can't find an OCXO better than -120 at 1 Hz, I'd bet you'll be ok. 5 volt 
>> logic will be a little more quiet than 3.3V. More or less faster is quieter 
>> as long as you stay with saturated silicon CMOS. Change materials and all 
>> bets are off.
>> 
>> For square wave cable drive you can parallel up a couple of the '125 or '126 
>> gates to get how ever much power you want to put into the cable. You can 
>> source or load terminate (or both). If you source and load terminate, your 
>> logic levels will be 1/2 the output. With either source only or load only 
>> termination you can get full swing logic levels. More drive will always be 
>> required with load termination (you are putting current into 50 ohms).
>> 
>> Logic IC's are cheap, easy to use, and simple to find. A low voltage single 
>> supply drives them and they aren't current hogs unless heavily loaded. 
>> What's not to like?
>> 
>> Bob
>> 
>> 
>> On Sep 26, 2013, at 1:28 PM, Tom Minnis <[email protected]> wrote:
>> 
>>> I am looking into various degrees of craziness.  The source is CMOS and 
>>> there are plenty of 1 in to N out parts designed to drive clocks on a PCB 
>>> but not much is said about driving clocks on to a random length of coax to 
>>> another piece of equipment and what additional precautions that might 
>>> warrant.  I am also considering making a sine wave output and maybe other 
>>> frequencies.
>>> Tom
>>> 
>>> On 9/26/2013 4:34 AM, Bob Camp wrote:
>>>> Hi
>>>> 
>>>> Standard high speed CMOS logic works pretty well. How crazy are you trying 
>>>> to get?
>>>> 
>>>> Bob
>>>> 
>>>> On Sep 26, 2013, at 1:48 AM, Tom Minnis <[email protected]> wrote:
>>>> 
>>>>> I am working on a small clock distributor and wanted to get some ideas on 
>>>>> what works best for 10MHz and 1PPS driver circuits.  I remember sifting 
>>>>> through the archives a year or so ago and tripped on some discussion of 
>>>>> this but I can't find it anymore.
>>>>> Tom
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