I have quite often seen the simple D FF lead/lag phase comparator mentioned but 
not found any practical implementation in a GPSDO. Has anyone a schematic and 
hopefully real data? What is the performance? Is it better than a conventional 
GPSDO with a TIC+uP+DAC or is it only simpler?

Lars

On Fri, Mar 7, 2014 at 2:25 PM, Jim Miller <[email protected]> wrote:
> I think the hardware delay line approach is the only solution for a simple
> D FF lead/lag phase comparator. It would be placed ahead of the FF.
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