Hello Said,
Thanks for the answer.
Sounds interresting. Do you have a description of that ? Especially a
phase noise plot ?
As said, I'm planning to use a VCXO (low cost and low noise) at 100 MHz
followed by a MMIC (ERA) and a 500 MHz 3-cells helical filter from
Temwell. Then a doubler from minicircuit, an other MMIC and a 3-cell
helical filter at 1 GHz...
Cheers
Stephane
On Mon, 15 Sep 2014 09:17:01 -0700, Said Jackson via time-nuts
<[email protected]> wrote:
Hi Stephanie,
Welcome to the list!
We designed a 1GHz crystal LO for PLLs (the ULN-1G) using an off the
shelf miniature 500MHz crystal oscillator which is run at 3 rd
overtone internally then using a diode doubler and a steep bandpass
filter using several Mini Circuits ceramic filters and a 20dBm amp.
Works like a charm and has phase noise very close to theoretical..
Bye,
Said
Sent From iPhone
On Sep 15, 2014, at 5:50, "steph.rey" <[email protected]> wrote:
Hi the list,
Just wanted to introduce myself for my 1st message.
I'm Stephane, 40, living in France, at the moment working in RF &
electronics for a particles accelerator lab. I'm hamradio as well, and
I do enjoy especially weak and accurate signals.
I'm desiging various RF circuits. Current design is a universal PLL
able to operate from 0.5 to 6 GHz depending on the VCO and supposed to
be "low-jitter" (<1ps) regarding the application.
I'm also starting a new design of low noise PLL and there will be
probably a lot of question arising... I'm starting with the 1 GHz LO
made upon a 100 MHz VCXO + multipliers/filters/MMICs.
I want to focus deeper on low phase noise/jitter, synchronization
and low-noise PLL techniques.
I believe this is a good place for most of these topics.
Cheers
Stephane
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