The Schmitt trigger mostly avoids glitches on the output. Does it do
anything to reduce timing noise if the input signal is clean enough that it
doesn't make any glitches?
No, it just avoids flipping state at the transition point(s).
Note also that the hysteresis of logic gates with Schmitt inputs is
WAY too much to be optimal for squaring sine waves (300mV minimum,
typically 400 to 450mV, for the 74LVC14). Fast comparators with
internal hysteresis are optimized for that sort of thing (the LT1719
and LT1720 have a few mV of hysteresis).
Best regards,
Charles
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