Hi Charles,
On 02/26/2015 02:46 AM, Charles Steinmetz wrote:
The Schmitt trigger mostly avoids glitches on the output. Does it do
anything to reduce timing noise if the input signal is clean enough
that it
doesn't make any glitches?
No, it just avoids flipping state at the transition point(s).
Note also that the hysteresis of logic gates with Schmitt inputs is WAY
too much to be optimal for squaring sine waves (300mV minimum, typically
400 to 450mV, for the 74LVC14). Fast comparators with internal
hysteresis are optimized for that sort of thing (the LT1719 and LT1720
have a few mV of hysteresis).
Indeed.
If you think about what large hysteresis does on a sine, it moves the
trigger points further up and down on the sine from the mid-point, which
moves them into lower slew-rate areas.
If you are picky, amplitude variations will then also move the phase
more than mid-point triggers.
A bit of hysteresis can help to avoid flipping back, but considering the
type of signal, it passes the mid-point (0 V) at highest slew-rate, so
there is very little risk of flipping back and fourth in the first
place, so hysteresis may not even be needed.
Cheers,
Magnus
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